diff --git a/arch/arm/src/stm32f0/stm32f0_clockconfig.c b/arch/arm/src/stm32f0/stm32f0_clockconfig.c
index f8a8a59c9b8..4a9407e706e 100644
--- a/arch/arm/src/stm32f0/stm32f0_clockconfig.c
+++ b/arch/arm/src/stm32f0/stm32f0_clockconfig.c
@@ -95,7 +95,7 @@ void stm32f0_clockconfig(void)
 
   regval  = getreg32(STM32F0_RCC_CFGR);
   regval &= ~RCC_CFGR_PLLMUL_MASK;
-  regval |= RCC_CFGR_PLLMUL_CLKx6
+  regval |= RCC_CFGR_PLLMUL_CLKx6;
   putreg32(regval, STM32F0_RCC_CFGR);
 
   /* Enable the PLL */