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Cortex-M7: Add support for enabled the D-Cache in write only mode.
SAMV7 Ethernet: I- and D-Cache are now enabled in the netnsh/ configuration. D-Cache is enabled in write-though mode. This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.
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@@ -122,8 +122,9 @@ CONFIG_ARCH_DPFPU=y
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#
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CONFIG_ARMV7M_HAVE_ICACHE=y
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CONFIG_ARMV7M_HAVE_DCACHE=y
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# CONFIG_ARMV7M_ICACHE is not set
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# CONFIG_ARMV7M_DCACHE is not set
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CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
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CONFIG_ARMV7M_HAVE_ITCM=y
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CONFIG_ARMV7M_HAVE_DTCM=y
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# CONFIG_ARMV7M_ITCM is not set
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@@ -572,6 +573,7 @@ CONFIG_ETH0_PHY_KSZ8061=y
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# CONFIG_ETH0_PHY_DP83848C is not set
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# CONFIG_ETH0_PHY_LAN8720 is not set
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# CONFIG_ETH0_PHY_LAN8740 is not set
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# CONFIG_ETH0_PHY_LAN8740A is not set
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# CONFIG_ETH0_PHY_DM9161 is not set
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# CONFIG_PIPES is not set
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# CONFIG_PM is not set
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