Cortex-M7: Add support for enabled the D-Cache in write only mode.

SAMV7 Ethernet:  I- and D-Cache are now enabled in the netnsh/ configuration.  D-Cache is enabled in write-though mode.  This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.
This commit is contained in:
Gregory Nutt
2015-03-29 14:42:03 -06:00
parent 7a636fdb13
commit 55a7065f07
2 changed files with 15 additions and 20 deletions
+4 -2
View File
@@ -122,8 +122,9 @@ CONFIG_ARCH_DPFPU=y
#
CONFIG_ARMV7M_HAVE_ICACHE=y
CONFIG_ARMV7M_HAVE_DCACHE=y
# CONFIG_ARMV7M_ICACHE is not set
# CONFIG_ARMV7M_DCACHE is not set
CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_HAVE_ITCM=y
CONFIG_ARMV7M_HAVE_DTCM=y
# CONFIG_ARMV7M_ITCM is not set
@@ -572,6 +573,7 @@ CONFIG_ETH0_PHY_KSZ8061=y
# CONFIG_ETH0_PHY_DP83848C is not set
# CONFIG_ETH0_PHY_LAN8720 is not set
# CONFIG_ETH0_PHY_LAN8740 is not set
# CONFIG_ETH0_PHY_LAN8740A is not set
# CONFIG_ETH0_PHY_DM9161 is not set
# CONFIG_PIPES is not set
# CONFIG_PM is not set