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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3116 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2010-11-17 03:16:26 +00:00
parent 6bf1522d75
commit 54e86016ae
3 changed files with 35 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/lpc17xx/lpc17_ethernet.c
+6 -5
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@@ -714,10 +714,10 @@ static int lpc17_transmit(struct lpc17_driver_s *priv)
(priv->lp_dev.d_len - 1); (priv->lp_dev.d_len - 1);
/* Copy the packet data into the Tx buffer assignd to this descriptor. It /* Copy the packet data into the Tx buffer assignd to this descriptor. It
* should fit because each packet buffer is the MTU size and breaking up larger * should fit because each packet buffer is the MTU size and breaking up
* TCP messasges is handled by higher level logic. The hardware does, however,t * largerTCP messasges is handled by higher level logic. The hardware
* support breaking up larger messages into many fragments, however, that * does, however, support breaking up larger messages into many fragments,
* capability is not exploited here. * however, that capability is not exploited here.
* *
* This would be a great performance improvement: Remove the buffer from * This would be a great performance improvement: Remove the buffer from
* the lp_dev structure and replace it a pointer directly into the EMAC * the lp_dev structure and replace it a pointer directly into the EMAC
@@ -744,7 +744,8 @@ static int lpc17_transmit(struct lpc17_driver_s *priv)
/* Setup the TX timeout watchdog (perhaps restarting the timer) */ /* Setup the TX timeout watchdog (perhaps restarting the timer) */
(void)wd_start(priv->lp_txtimeout, LPC17_TXTIMEOUT, lpc17_txtimeout, 1, (uint32_t)priv); (void)wd_start(priv->lp_txtimeout, LPC17_TXTIMEOUT, lpc17_txtimeout,
1, (uint32_t)priv);
return OK; return OK;
} }
arch/arm/src/lpc17xx/lpc17_irq.c
+28
View File
@@ -259,6 +259,33 @@ static int lpc17_irqinfo(int irq, uint32_t *regaddr, uint32_t *bit)
return OK; return OK;
} }
/****************************************************************************
* Name: lpc17_clrpend
*
* Description:
* Clear a pending interrupt.
*
****************************************************************************/
static inline void lpc17_clrpend(int irq)
{
#if 0 /* Necessary? */
/* Check for external interrupt */
if (irq >= LPC17_IRQ_EXTINT)
{
if (irq < (LPC17_IRQ_EXTINT+32))
{
putreg32(1 << (irq - LPC17_IRQ_EXTINT), NVIC_IRQ0_31_CLRPEND);
}
else if (irq < LPC17_IRQ_NIRQS)
{
putreg32(1 << (irq - LPC17_IRQ_EXTINT - 32), NVIC_IRQ32_63_CLRPEND);
}
}
#endif
}
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
****************************************************************************/ ****************************************************************************/
@@ -426,6 +453,7 @@ void up_enable_irq(int irq)
void up_maskack_irq(int irq) void up_maskack_irq(int irq)
{ {
up_disable_irq(irq); up_disable_irq(irq);
lpc17_clrpend(irq);
} }
/**************************************************************************** /****************************************************************************
arch/arm/src/lpc17xx/lpc17_vectors.S
+1 -1
View File
@@ -295,7 +295,7 @@ lpc17_common:
2: 2:
msr msp, r1 /* Recover the return MSP value */ msr msp, r1 /* Recover the return MSP value */
/* Do we need to restore interrupts? */ /* Do we need to restore interrupts? Why not just: msr primask, r3 */
tst r3, #1 /* PRIMASK bit 1=1 means that interrupts are masked */ tst r3, #1 /* PRIMASK bit 1=1 means that interrupts are masked */
bne 3f bne 3f