diff --git a/arch/arm/src/armv6-m/Toolchain.defs b/arch/arm/src/armv6-m/Toolchain.defs
index 82484e367d6..ab43bed3077 100644
--- a/arch/arm/src/armv6-m/Toolchain.defs
+++ b/arch/arm/src/armv6-m/Toolchain.defs
@@ -23,7 +23,9 @@
 TOOLCHAIN_MTUNE  := -mcpu=cortex-m0 -mthumb
 TOOLCHAIN_MFLOAT := -mfloat-abi=soft
 
-ZARCHCPUFLAGS := -mcpu=cortex_m0
+LLVM_ARCHTYPE := thumbv6m
+LLVM_ABITYPE  := eabi
+LLVM_CPUTYPE  := cortex-m0
 
 # Clang Configuration files
 
diff --git a/arch/arm/src/armv7-a/Toolchain.defs b/arch/arm/src/armv7-a/Toolchain.defs
index fe6e0a3c9a0..a66aae75bad 100644
--- a/arch/arm/src/armv7-a/Toolchain.defs
+++ b/arch/arm/src/armv7-a/Toolchain.defs
@@ -20,16 +20,22 @@
 
 ifeq ($(CONFIG_ARCH_CORTEXA5),y)
   ARCHCPUFLAGS += -mcpu=cortex-a5
-  ZARCHCPUFLAGS := -mcpu=cortex_a5
+  LLVM_CPUTYPE := cortex-a5
 else ifeq ($(CONFIG_ARCH_CORTEXA7),y)
   ARCHCPUFLAGS += -mcpu=cortex-a7
-  ZARCHCPUFLAGS := -mcpu=cortex_a7
+  LLVM_CPUTYPE := cortex-a7
 else ifeq ($(CONFIG_ARCH_CORTEXA8),y)
   ARCHCPUFLAGS += -mcpu=cortex-a8
-  ZARCHCPUFLAGS := -mcpu=cortex_a8
+  LLVM_CPUTYPE := cortex-a8
 else ifeq ($(CONFIG_ARCH_CORTEXA9),y)
   ARCHCPUFLAGS += -mcpu=cortex-a9
-  ZARCHCPUFLAGS := -mcpu=cortex_a9
+  LLVM_CPUTYPE := cortex-a9
+endif
+
+ifeq ($(CONFIG_ARM_THUMB),y)
+  LLVM_ARCHTYPE := thumbv7
+else
+  LLVM_ARCHTYPE := armv7a
 endif
 
 ifneq ($(CONFIG_ARM_DPFPU32),y)
@@ -43,6 +49,7 @@ endif
 # Cortex-A15 | -mfpu=vfpv4      |                      | -mfpu=neon-vfpv4
 
 ifeq ($(CONFIG_ARCH_FPU),y)
+  LLVM_ABITYPE := eabihf
   ifeq ($(CONFIG_ARM_FPU_ABI_SOFT),y)
     ARCHCPUFLAGS += -mfloat-abi=softfp
   else
@@ -62,6 +69,7 @@ ifeq ($(CONFIG_ARCH_FPU),y)
   ARCHCPUFLAGS += -mfpu=$(ARCHNEON)$(ARCHFPU)$(ARCHFPUD16)
 
 else
+  LLVM_ABITYPE := eabi
   ARCHCPUFLAGS += -mfloat-abi=soft
 endif
 
diff --git a/arch/arm/src/armv7-m/Toolchain.defs b/arch/arm/src/armv7-m/Toolchain.defs
index 9cbace079a5..d5a5a151b9a 100644
--- a/arch/arm/src/armv7-m/Toolchain.defs
+++ b/arch/arm/src/armv7-m/Toolchain.defs
@@ -24,14 +24,15 @@ ifeq ($(CONFIG_ARCH_CORTEXM4),y)
   TOOLCHAIN_ARM7EM   := y
   TOOLCHAIN_MTUNE    := -mtune=cortex-m4
   TOOLCHAIN_MARCH    := -march=armv7e-m
+  LLVM_CPUTYPE       := cortex-m4
   ifeq ($(CONFIG_ARCH_FPU),y)
     TOOLCHAIN_MFLOAT := -mfpu=fpv4-sp-d16
   endif
-  ZARCHCPUFLAGS := -mcpu=cortex_m4
 else ifeq ($(CONFIG_ARCH_CORTEXM7),y)
   TOOLCHAIN_ARM7EM   := y
   TOOLCHAIN_MTUNE    := -mtune=cortex-m7
   TOOLCHAIN_MARCH    := -march=armv7e-m
+  LLVM_CPUTYPE       := cortex-m7
   ifeq ($(CONFIG_ARCH_FPU),y)
     ifeq ($(CONFIG_ARCH_DPFPU),y)
       TOOLCHAIN_MFLOAT := -mfpu=fpv5-d16
@@ -39,25 +40,32 @@ else ifeq ($(CONFIG_ARCH_CORTEXM7),y)
       TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16
     endif
   endif
-  ZARCHCPUFLAGS := -mcpu=cortex_m7
 else # ifeq ($(CONFIG_ARCH_CORTEXM3),y)
   TOOLCHAIN_ARM7EM   := n
   TOOLCHAIN_MTUNE    := -mtune=cortex-m3
   TOOLCHAIN_MARCH    := -march=armv7-m
   TOOLCHAIN_MFLOAT   := -mfloat-abi=soft
-  ZARCHCPUFLAGS      := -mcpu=cortex_m3
+  LLVM_CPUTYPE       := cortex-m3
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
+  LLVM_ABITYPE := eabihf
   ifeq ($(CONFIG_ARM_FPU_ABI_SOFT),y)
     TOOLCHAIN_MFLOAT += -mfloat-abi=softfp
   else
     TOOLCHAIN_MFLOAT += -mfloat-abi=hard
   endif
 else
+  LLVM_ABITYPE 		 := eabi
   TOOLCHAIN_MFLOAT += -mfloat-abi=soft
 endif
 
+ifeq ($(CONFIG_ARCH_CORTEXM3),y)
+  LLVM_ARCHTYPE := thumbv7m
+else
+  LLVM_ARCHTYPE := thumbv7em
+endif
+
 # Clang Configuration files
 
 ifeq ($(CONFIG_ARM_TOOLCHAIN_CLANG),y)
diff --git a/arch/arm/src/armv7-r/Toolchain.defs b/arch/arm/src/armv7-r/Toolchain.defs
index f1a19983c08..ae5d349bf31 100644
--- a/arch/arm/src/armv7-r/Toolchain.defs
+++ b/arch/arm/src/armv7-r/Toolchain.defs
@@ -20,16 +20,17 @@
 
 ifeq ($(CONFIG_ARCH_CORTEXR4),y)
   ARCHCPUFLAGS += -mcpu=cortex-r4
-  ZARCHCPUFLAGS := -mcpu=cortex_r4
+  LLVM_CPUTYPE := cortex-r4
 else ifeq ($(CONFIG_ARCH_CORTEXR5),y)
   ARCHCPUFLAGS += -mcpu=cortex-r5
-  ZARCHCPUFLAGS := -mcpu=cortex_r5
+  LLVM_CPUTYPE := cortex-r5
 else ifeq ($(CONFIG_ARCH_CORTEXR7),y)
   ARCHCPUFLAGS += -mcpu=cortex-r7
-  ZARCHCPUFLAGS := -mcpu=cortex_r7
+  LLVM_CPUTYPE := cortex-r7
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)
+  LLVM_ABITYPE := eabihf
   ARCHCPUFLAGS += -mfpu=vfpv3-d16
   ifeq ($(CONFIG_ARM_FPU_ABI_SOFT),y)
     ARCHCPUFLAGS += -mfloat-abi=softfp
@@ -37,9 +38,16 @@ ifeq ($(CONFIG_ARCH_FPU),y)
     ARCHCPUFLAGS += -mfloat-abi=hard
   endif
 else
+  LLVM_ABITYPE := eabi
   ARCHCPUFLAGS += -mfloat-abi=soft
 endif
 
+ifeq ($(CONFIG_ARM_THUMB),y)
+  LLVM_ARCHTYPE := thumbv7r
+else
+  LLVM_ARCHTYPE := armv7r
+endif
+
 ifeq ($(CONFIG_ARM_TOOLCHAIN_ARMCLANG),y)
 
   ifeq ($(CONFIG_ARCH_CORTEXR4),y)
diff --git a/arch/arm/src/armv8-m/Toolchain.defs b/arch/arm/src/armv8-m/Toolchain.defs
index 72f3081a6cd..74f23de0616 100644
--- a/arch/arm/src/armv8-m/Toolchain.defs
+++ b/arch/arm/src/armv8-m/Toolchain.defs
@@ -59,44 +59,48 @@ ifeq ($(CONFIG_ARCH_CORTEXM23),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m23
   TOOLCHAIN_MARCH    := -march=armv8-m.main
   TOOLCHAIN_MFLOAT   := -mfloat-abi=soft
-  ZARCHCPUFLAGS      := -mcpu=cortex_m23
+  LLVM_CPUTYPE       := cortex-m23
 else ifeq ($(CONFIG_ARCH_CORTEXM33),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m33
   TOOLCHAIN_MARCH    := -march=armv8-m.main$(EXTCPUFLAGS)
+  LLVM_CPUTYPE       := cortex-m33
   ifeq ($(CONFIG_ARCH_FPU),y)
     TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16
   endif
-  ZARCHCPUFLAGS      := -mcpu=cortex_m33
 else ifeq ($(CONFIG_ARCH_CORTEXM35P),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m35p
   TOOLCHAIN_MARCH    := -march=armv8-m.main$(EXTCPUFLAGS)
+  LLVM_CPUTYPE       := cortex-m35p
   ifeq ($(CONFIG_ARCH_FPU),y)
     TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16
   endif
-  ZARCHCPUFLAGS := -mcpu=cortex_m35p
 else ifeq ($(CONFIG_ARCH_CORTEXM55),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m55
   TOOLCHAIN_MARCH    := -march=armv8.1-m.main$(EXTCPUFLAGS)
+  LLVM_CPUTYPE       := cortex-m55
   ifeq ($(CONFIG_ARCH_FPU),y)
     TOOLCHAIN_MFLOAT := -mfpu=fpv5-d16
   endif
-  ZARCHCPUFLAGS := -mcpu=cortex_m55
 else ifeq ($(CONFIG_ARCH_CORTEXM85),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m85
   TOOLCHAIN_MARCH    := -march=armv8.1-m.main$(EXTCPUFLAGS)
+  LLVM_CPUTYPE       := cortex-m85
   ifeq ($(CONFIG_ARCH_FPU),y)
     TOOLCHAIN_MFLOAT := -mfpu=fpv5-d16
   endif
-  ZARCHCPUFLAGS := -mcpu=cortex_m85
 endif
 
+LLVM_ARCHTYPE := thumbv8m.main$(EXTCPUFLAGS)
+
 ifeq ($(CONFIG_ARCH_FPU),y)
+  LLVM_ABITYPE := eabihf
   ifeq ($(CONFIG_ARM_FPU_ABI_SOFT),y)
     TOOLCHAIN_MFLOAT += -mfloat-abi=softfp
   else
     TOOLCHAIN_MFLOAT += -mfloat-abi=hard
   endif
 else
+  LLVM_ABITYPE := eabi
   TOOLCHAIN_MFLOAT += -mfloat-abi=soft
 endif
 
diff --git a/arch/arm/src/common/Toolchain.defs b/arch/arm/src/common/Toolchain.defs
index a35e0aabb8f..3360e39572d 100644
--- a/arch/arm/src/common/Toolchain.defs
+++ b/arch/arm/src/common/Toolchain.defs
@@ -243,10 +243,6 @@ else
 
 endif
 
-# Zig compiler
-
-ZIG := zig
-
 ifeq ($(CONFIG_ARCH_TOOLCHAIN_CLANG),y)
   ARCHOPTIMIZATION += -fshort-enums
 endif
@@ -341,3 +337,7 @@ endif
 ifeq ($(CONFIG_ARCH_COVERAGE),y)
   EXTRA_LIBS += $(wildcard $(shell $(CC) $(ARCHCPUFLAGS) --print-file-name=libgcov.a))
 endif
+
+# Zig toolchain
+
+include $(TOPDIR)/tools/Zig.defs
diff --git a/arch/risc-v/src/common/Toolchain.defs b/arch/risc-v/src/common/Toolchain.defs
index c5a6351aa0f..1d794539f61 100644
--- a/arch/risc-v/src/common/Toolchain.defs
+++ b/arch/risc-v/src/common/Toolchain.defs
@@ -160,11 +160,11 @@ ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVG)
   ifeq ($(CONFIG_ARCH_RV32),y)
     ARCHTYPE = rv32
     ARCHABITYPE = ilp32
-    ZARCHTYPE := riscv32
+    LLVM_ARCHTYPE := riscv32
   else ifeq ($(CONFIG_ARCH_RV64),y)
     ARCHTYPE = rv64
     ARCHABITYPE = lp64
-    ZARCHTYPE := riscv64
+    LLVM_ARCHTYPE := riscv64
   endif
 
   # Construct arch flags
@@ -175,10 +175,13 @@ ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVG)
 
   ifeq ($(CONFIG_ARCH_DPFPU),y)
     ARCHCPUFLAGS += -mabi=$(ARCHABITYPE)d
+    LLVM_ABITYPE := $(ARCHABITYPE)d
   else ifeq ($(CONFIG_ARCH_FPU),y)
     ARCHCPUFLAGS += -mabi=$(ARCHABITYPE)f
+    LLVM_ABITYPE := $(ARCHABITYPE)f
   else
     ARCHCPUFLAGS += -mabi=$(ARCHABITYPE)
+    LLVM_ABITYPE := $(ARCHABITYPE)
   endif
 
 endif
@@ -195,8 +198,6 @@ ifeq ($(CONFIG_MM_UBSAN_TRAP_ON_ERROR),y)
   ARCHOPTIMIZATION += -fsanitize-undefined-trap-on-error
 endif
 
-ZIGFLAGS = -target $(ZARCHTYPE)-freestanding-none -mcpu generic_$(ARCHTYPE)$(ZARCHRVISAM)$(ZARCHRVISAA)$(ZARCHRVISAF)$(ZARCHRVISAF)$(ZARCHRVISAC) -mcmodel=medium
-
 # Default toolchain
 
 CC      = $(CROSSDEV)gcc
@@ -208,7 +209,6 @@ OBJDUMP = $(CROSSDEV)objdump
 LD      = $(CROSSDEV)ld
 AR      = $(CROSSDEV)ar rcs
 NM      = $(CROSSDEV)nm
-ZIG     = zig
 
 # Link Time Optimization
 
@@ -238,3 +238,7 @@ endif
 ifeq ($(CONFIG_ARCH_COVERAGE),y)
   EXTRA_LIBS += $(wildcard $(shell $(CC) $(ARCHCPUFLAGS) --print-file-name=libgcov.a))
 endif
+
+# Zig toolchain
+
+include $(TOPDIR)/tools/Zig.defs
diff --git a/boards/sim/sim/sim/scripts/Make.defs b/boards/sim/sim/sim/scripts/Make.defs
index f53b955a269..b0ecfb931c5 100644
--- a/boards/sim/sim/sim/scripts/Make.defs
+++ b/boards/sim/sim/sim/scripts/Make.defs
@@ -20,6 +20,7 @@
 
 include $(TOPDIR)/.config
 include $(TOPDIR)/tools/Config.mk
+include $(TOPDIR)/tools/Zig.defs
 
 # NuttX is sometimes built as a native target.
 # In that case, the __NuttX__ macro is predefined by the compiler.
@@ -124,9 +125,6 @@ endif
 ifeq ($(CONFIG_SIM_M32),y)
   ARCHCFLAGS += -m32
   ARCHCXXFLAGS += -m32
-  ZARCH := x86
-else
-  ZARCH := x86_64
 endif
 
 ARCHPICFLAGS = -fpic
@@ -153,7 +151,6 @@ CXXFLAGS := $(ARCHOPTIMIZATION) $(ARCHCXXFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES)
 CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
 AFLAGS := $(CFLAGS) -D__ASSEMBLY__
 RUSTFLAGS := $(ARCHOPTIMIZATIONRUST)
-ZIGFLAGS := -target $(ZARCH)-freestanding-gnu
 
 ifeq ($(CONFIG_LIBCXX),y)
   ifeq ($(CONFIG_HOST_MACOS),y)
diff --git a/tools/Zig.defs b/tools/Zig.defs
new file mode 100644
index 00000000000..3be58407709
--- /dev/null
+++ b/tools/Zig.defs
@@ -0,0 +1,69 @@
+############################################################################
+# tools/Zig.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+ZIG := zig
+
+ifeq ($(CONFIG_ARCH_RISCV),y)
+
+  ZIGFLAGS := -target $(LLVM_ARCHTYPE)-freestanding-none
+
+  # Detect cpu ISA support flags for risc-v
+
+  ifeq ($(CONFIG_ARCH_RV_ISA_M),y)
+    ZARCHRVISAM := +m
+  endif
+
+  ifeq ($(CONFIG_ARCH_RV_ISA_A),y)
+    ZARCHRVISAA := +a
+  endif
+
+  ifeq ($(CONFIG_ARCH_RV_ISA_C),y)
+    ZARCHRVISAC := +c
+  endif
+
+  ifeq ($(CONFIG_ARCH_FPU),y)
+    ZARCHRVISAF := +f
+  endif
+
+  ifeq ($(CONFIG_ARCH_DPFPU),y)
+    ZARCHRVISAD := +d
+  endif
+
+  ZIGFLAGS += -mcpu generic$(ZARCHRVISAM)$(ZARCHRVISAA)$(ZARCHRVISAF)$(ZARCHRVISAD)$(ZARCHRVISAC)
+  ZIGFLAGS += -mcmodel=medium
+
+else ifeq ($(CONFIG_ARCH_ARM),y)
+
+  ifeq ($(CONFIG_ARM_THUMB),y)
+    ZIGFLAGS := -target thumb-freestanding-$(LLVM_ABITYPE)
+  else
+    ZIGFLAGS := -target arm-freestanding-$(LLVM_ABITYPE)
+  endif
+
+  # Convert cortex-xxx to cortex_xxx for zig
+  ZIGFLAGS += -mcpu $(subst -,_,$(LLVM_CPUTYPE))
+
+else ifeq ($(CONFIG_ARCH_SIM),y)
+  ifeq ($(CONFIG_SIM_M32),y)
+    ZIGFLAGS := -target x86-freestanding-gnu
+  else
+    ZIGFLAGS := -target x86_64-freestanding-gnu
+  endif
+endif