Kconfig: improve uniformity

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
This commit is contained in:
Petro Karashchenko
2021-12-14 09:52:49 +02:00
committed by Xiang Xiao
parent 3b3cebdd3e
commit 51a2db6ffc
45 changed files with 686 additions and 686 deletions
+2 -2
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@@ -65,13 +65,13 @@ menu "SPI Flash configuration"
config BL602_MTD_OFFSET config BL602_MTD_OFFSET
hex "MTD base address in SPI Flash" hex "MTD base address in SPI Flash"
default 0x001c5000 default 0x001c5000
help ---help---
MTD base address in SPI Flash. MTD base address in SPI Flash.
config BL602_MTD_SIZE config BL602_MTD_SIZE
hex "MTD size in SPI Flash" hex "MTD size in SPI Flash"
default 0x30000 default 0x30000
help ---help---
MTD size in SPI Flash. MTD size in SPI Flash.
endmenu # BL602_SPIFLASH endmenu # BL602_SPIFLASH
+1 -1
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@@ -830,7 +830,7 @@ choice ESP32C3_WIFI_LOG_LEVEL
depends on DEBUG_INFO depends on DEBUG_INFO
prompt "WiFi debug log level" prompt "WiFi debug log level"
default WIFI_LOG_LEVEL_INFO default WIFI_LOG_LEVEL_INFO
help ---help---
The WiFi log is divided into the following levels: ERROR,WARNING,INFO,DEBUG,VERBOSE. The WiFi log is divided into the following levels: ERROR,WARNING,INFO,DEBUG,VERBOSE.
config WIFI_LOG_LEVEL_NONE config WIFI_LOG_LEVEL_NONE
+2 -2
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@@ -201,7 +201,7 @@ config XTENSA_INTBACKTRACE
config XTENSA_IMEM_USE_SEPARATE_HEAP config XTENSA_IMEM_USE_SEPARATE_HEAP
bool "Use a separate heap for internal memory" bool "Use a separate heap for internal memory"
default n default n
help ---help---
This is a separate internal heap that's used by drivers when certain operations This is a separate internal heap that's used by drivers when certain operations
are not possible with the provided buffer(s). are not possible with the provided buffer(s).
Mainly, when the provided buffer comes from external RAM and a DMA or flash Mainly, when the provided buffer comes from external RAM and a DMA or flash
@@ -216,7 +216,7 @@ config XTENSA_IMEM_REGION_SIZE
config XTENSA_EXTMEM_BSS config XTENSA_EXTMEM_BSS
bool "Allow BSS section in external memory" bool "Allow BSS section in external memory"
default n default n
help ---help---
Adds a section and an attribute that allows to force variables into Adds a section and an attribute that allows to force variables into
the external memory. the external memory.
+6 -6
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@@ -44,7 +44,7 @@ config D0WD_PSRAM_CLK_IO
int "PSRAM CLK IO number" int "PSRAM CLK IO number"
range 0 33 range 0 33
default 17 default 17
help ---help---
The PSRAM CLOCK IO can be any unused GPIO, user can config it The PSRAM CLOCK IO can be any unused GPIO, user can config it
based on hardware design. If user use 1.8V flash and 1.8V psram, based on hardware design. If user use 1.8V flash and 1.8V psram,
this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17. this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
@@ -53,7 +53,7 @@ config D0WD_PSRAM_CS_IO
int "PSRAM CS IO number" int "PSRAM CS IO number"
range 0 33 range 0 33
default 16 default 16
help ---help---
The PSRAM CS IO can be any unused GPIO, user can config it based The PSRAM CS IO can be any unused GPIO, user can config it based
on hardware design. If user use 1.8V flash and 1.8V psram, this on hardware design. If user use 1.8V flash and 1.8V psram, this
value can only be one of 6, 7, 8, 9, 10, 11, 16, 17. value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
@@ -64,7 +64,7 @@ config D2WD_PSRAM_CLK_IO
int "PSRAM CLK IO number" int "PSRAM CLK IO number"
range 0 33 range 0 33
default 9 default 9
help ---help---
User can config it based on hardware design. For ESP32-D2WD chip, User can config it based on hardware design. For ESP32-D2WD chip,
the psram can only be 1.8V psram, so this value can only be one the psram can only be 1.8V psram, so this value can only be one
of 6, 7, 8, 9, 10, 11, 16, 17. of 6, 7, 8, 9, 10, 11, 16, 17.
@@ -73,7 +73,7 @@ config D2WD_PSRAM_CS_IO
int "PSRAM CS IO number" int "PSRAM CS IO number"
range 0 33 range 0 33
default 10 default 10
help ---help---
User can config it based on hardware design. For ESP32-D2WD chip, User can config it based on hardware design. For ESP32-D2WD chip,
the psram can only be 1.8V psram, so this value can only be one the psram can only be 1.8V psram, so this value can only be one
of 6, 7, 8, 9, 10, 11, 16, 17. of 6, 7, 8, 9, 10, 11, 16, 17.
@@ -84,7 +84,7 @@ config PICO_PSRAM_CS_IO
int "PSRAM CS IO number" int "PSRAM CS IO number"
range 0 33 range 0 33
default 10 default 10
help ---help---
The PSRAM CS IO can be any unused GPIO, user can config it based on The PSRAM CS IO can be any unused GPIO, user can config it based on
hardware design. hardware design.
For ESP32-PICO chip, the psram share clock with flash, so user do For ESP32-PICO chip, the psram share clock with flash, so user do
@@ -97,7 +97,7 @@ config ESP32_SPIRAM_SPIWP_SD3_PIN
int "SPI PSRAM WP(SD3) Pin when customising pins via eFuse (read help)" int "SPI PSRAM WP(SD3) Pin when customising pins via eFuse (read help)"
range 0 33 range 0 33
default 7 default 7
help ---help---
This value is ignored unless flash mode is set to DIO or DOUT and This value is ignored unless flash mode is set to DIO or DOUT and
the SPI flash pins have been overridden by setting the eFuses the SPI flash pins have been overridden by setting the eFuses
SPI_PAD_CONFIG_xxx. SPI_PAD_CONFIG_xxx.
+1 -1
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@@ -6,7 +6,7 @@
config ALLSYMS config ALLSYMS
bool "Load all symbols for debugging" bool "Load all symbols for debugging"
default n default n
help ---help---
Say Y here to let the nuttx print out symbolic crash information and Say Y here to let the nuttx print out symbolic crash information and
symbolic stack backtraces. This increases the size of the nuttx symbolic stack backtraces. This increases the size of the nuttx
somewhat, as all symbols have to be loaded into the nuttx image. somewhat, as all symbols have to be loaded into the nuttx image.