Convert the 64-bit usec limit to a 32-bit tick limit

arch/arm/src/sam34/Kconfig

@@ -930,7 +930,7 @@ endif # SAM34_GPIO_IRQ
 endmenu # AT91SAM3/4 GPIO Interrupt Configuration
 
 menu "AT91SAM3/4 Timer/Counter Configuration"
-	depends on SAM34_TC
+	depends on SAM34_TC && ARCH_CHIP_SAM4CM
 
 config SAM34_TC0_CLK
 	bool "Enable TC channel 0 clock input pin"
@@ -1058,8 +1058,7 @@ config SAM34_TICKLESS_FREERUN
 		If the Tickless OS feature is enabled, the one clock must be
 		assigned to provided the free-running timer needed by the OS.
 
-endif
-
+endif # SCHED_TICKLESS
 endmenu # AT91SAM3/4 Timer/Counter Configuration
 
 if SAM34_SPI0 || SAM34_SPI1

arch/arm/src/sam34/sam4cm_tickless.c

@@ -231,6 +231,9 @@ static void sam_oneshot_handler(void *arg)
 
 void up_timer_initialize(void)
 {
+#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
+  uint64_t max_delay;
+#endif
   int ret;
 
   /* Initialize the one-shot timer */
@@ -245,12 +248,26 @@ void up_timer_initialize(void)
     }
 
 #ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
-  ret = sam_oneshot_max_delay(&g_tickless.oneshot, &g_oneshot_max_delay_usec);
+  /* Get the maximum delay of the one-shot timer in microseconds */
+
+  ret = sam_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
   if (ret < 0)
     {
       tclldbg("ERROR: sam_oneshot_max_delay failed\n");
       PANIC();
     }
+
+  /* Convert this to configured clock ticks for use by the OS timer logic */
+
+  max_delay /= CONFIG_USEC_PER_TICK;
+  if (max_delay > UINT32_MAX)
+    {
+      g_oneshot_maxticks = UINT32_MAX
+    }
+  else
+    {
+      g_oneshot_maxticks = max_delay;
+    }
 #endif
 
   /* Initialize the free-running timer */