mirror of
https://github.com/apache/nuttx.git
synced 2026-06-04 23:03:27 +08:00
STM32 Kconfig looks good. STM32 external ram configuration changed.
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5100 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
@@ -58,11 +58,13 @@ config ARCH_X86
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config ARCH_Z16
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config ARCH_Z16
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bool "ZNEO"
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bool "ZNEO"
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select ARCH_HAVE_HEAP2
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---help---
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---help---
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ZiLOG ZNEO 16-bit architectures (z16f).
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ZiLOG ZNEO 16-bit architectures (z16f).
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config ARCH_Z80
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config ARCH_Z80
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bool "z80"
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bool "z80"
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select ARCH_HAVE_HEAP2
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---help---
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---help---
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ZiLOG 8-bit architectures (z80, ez80, z8).
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ZiLOG 8-bit architectures (z80, ez80, z8).
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@@ -17,6 +17,7 @@ config ARCH_CHIP_C5471
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config ARCH_CHIP_CALYPSO
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config ARCH_CHIP_CALYPSO
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bool "Calypso"
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bool "Calypso"
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select ARCH_ARM7TDMI
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select ARCH_ARM7TDMI
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select ARCH_HAVE_HEAP2
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---help---
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---help---
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TI Calypso-based cell phones (ARM7TDMI)
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TI Calypso-based cell phones (ARM7TDMI)
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@@ -29,6 +30,7 @@ config ARCH_CHIP_DM320
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config ARCH_CHIP_IMX
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config ARCH_CHIP_IMX
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bool "Freescale iMX"
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bool "Freescale iMX"
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select ARCH_ARM920T
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select ARCH_ARM920T
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select ARCH_HAVE_HEAP2
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---help---
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---help---
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Freescale iMX architectures (ARM920T)
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Freescale iMX architectures (ARM920T)
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@@ -37,6 +37,10 @@
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*
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*
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****************************************************************************/
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/config.h>
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#include <nuttx/mm.h>
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#include <nuttx/mm.h>
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@@ -52,6 +56,14 @@
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#include "up_arch.h"
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#include "up_arch.h"
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#include "up_internal.h"
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#include "up_internal.h"
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/****************************************************************************
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* Preprocessor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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/****************************************************************************
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* Name: up_addregion
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* Name: up_addregion
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*
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*
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@@ -84,7 +96,7 @@ void up_addregion(void)
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/* Configure the RHEA bridge with some sane default values */
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/* Configure the RHEA bridge with some sane default values */
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calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0);
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calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0);
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mm_addregion((FAR void*)CONFIG_HEAP2_START, CONFIG_HEAP2_END-CONFIG_HEAP2_START);
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mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
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}
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}
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#endif
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#endif
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@@ -111,8 +111,8 @@ void up_addregion(void)
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/* Check for any additional memory regions */
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/* Check for any additional memory regions */
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#if defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END)
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#if defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_SIZE)
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mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
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mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
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#endif
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#endif
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}
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}
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#endif
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#endif
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+45
-19
@@ -84,7 +84,42 @@ config STM32_STM32F20XX
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config STM32_STM32F40XX
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config STM32_STM32F40XX
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bool
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bool
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default y if ARCH_CHIP_STM32F405RG || ARCH_CHIP_STM32F405VG || ARCH_CHIP_STM32F405ZG || ARCH_CHIP_STM32F407VE || ARCH_CHIP_STM32F407VG || ARCH_CHIP_STM32F407ZE || ARCH_CHIP_STM32F407ZG || ARCH_CHIP_STM32F407IE || ARCH_CHIP_STM32F407IE
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default y if ARCH_CHIP_STM32F405RG || ARCH_CHIP_STM32F405VG || ARCH_CHIP_STM32F405ZG || ARCH_CHIP_STM32F407VE || ARCH_CHIP_STM32F407VG || ARCH_CHIP_STM32F407ZE || ARCH_CHIP_STM32F407ZG || ARCH_CHIP_STM32F407IE || ARCH_CHIP_STM32F407IG
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choice
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prompt "Toolchain Selection"
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default STM32_CODESOURCERYW
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depends on ARCH_CHIP_STM32
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config STM32_CODESOURCERYW
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bool "CodeSourcery for Windows"
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config STM32_CODESOURCERYL
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bool "CodeSourcery for Linux"
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config STM32_ATOLLIC_LITE
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bool "Atollic Lite for Windows"
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config STM32_ATOLLIC_PRO
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bool "Atollic Pro for Windows"
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config STM32_DEVKITARM
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bool "DevkitARM (Windows)"
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config STM32_RAISONANCE
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bool "STMicro Raisonance for Windows"
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config STM32_BUILDROOT
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bool "NuttX buildroot (Cygwin or Linux)"
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endchoice
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config STM32_DFU
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bool "DFU bootloader"
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default n
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---help---
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Configure and position code for use with the STMicro DFU bootloader. Do
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not select this option if you will load code using JTAG/SWM.
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menu "STM32 Peripheral Support"
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menu "STM32 Peripheral Support"
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@@ -228,7 +263,7 @@ config STM32_SPI4
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config STM32_SYSCFG
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config STM32_SYSCFG
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bool "SYSCFG"
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bool "SYSCFG"
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default n
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default y
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depends on STM32_STM32F20XX || STM32_STM32F40XX
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depends on STM32_STM32F20XX || STM32_STM32F40XX
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config STM32_TIM1
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config STM32_TIM1
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@@ -517,24 +552,11 @@ config STM32_CCMEXCLUDE
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config STM32_FSMC_SRAM
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config STM32_FSMC_SRAM
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bool "External SRAM on FSMC"
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bool "External SRAM on FSMC"
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default n
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default n
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depends on FSMC
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depends on STM32_FSMC
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select ARCH_HAVE_HEAP2
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---help---
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---help---
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In addition to internal SRAM, SRAM may also be available through the FSMC.
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In addition to internal SRAM, SRAM may also be available through the FSMC.
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config HEAP2_BASE
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hex "FSMC SRAM base address"
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default 0x00000000
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depends on STM32_FSMC_SRAM
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---help---
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The base address of the SRAM in the FSMC address space.
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config HEAP2_END
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hex "FSMC SRAM end+1 address"
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default 0x00000000
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depends on STM32_FSMC_SRAM
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---help---
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The end (+1) of the SRAM in the FSMC address space
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config STM32_TIM1_PWM
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config STM32_TIM1_PWM
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bool "TIM1 PWM"
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bool "TIM1 PWM"
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default n
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default n
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@@ -1536,6 +1558,7 @@ config STM32_PHYADDR
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config STM32_MII
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config STM32_MII
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bool "Use MII interface"
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bool "Use MII interface"
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default n
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default n
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depends on STM32_ETHMAC
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---help---
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---help---
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Support Ethernet MII interface.
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Support Ethernet MII interface.
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@@ -1549,13 +1572,14 @@ config STM32_MII_MCO2
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config STM32_AUTONEG
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config STM32_AUTONEG
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bool "Use autonegtiation"
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bool "Use autonegtiation"
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default y
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default y
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depends on STM32_ETHMAC
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---help---
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---help---
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Use PHY autonegotion to determine speed and mode
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Use PHY autonegotion to determine speed and mode
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config STM32_ETHFD
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config STM32_ETHFD
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bool "Full duplex"
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bool "Full duplex"
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default n
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default n
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depends on !STM32_AUTONEG
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depends on STM32_ETHMAC && !STM32_AUTONEG
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---help---
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---help---
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If STM32_AUTONEG is not defined, then this may be defined to select full duplex
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If STM32_AUTONEG is not defined, then this may be defined to select full duplex
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mode. Default: half-duplex
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mode. Default: half-duplex
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@@ -1563,7 +1587,7 @@ config STM32_ETHFD
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config STM32_ETH100MBPS
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config STM32_ETH100MBPS
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bool "100 Mbps"
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bool "100 Mbps"
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default n
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default n
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depends on !STM32_AUTONEG
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depends on STM32_ETHMAC && !STM32_AUTONEG
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---help---
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---help---
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If STM32_AUTONEG is not defined, then this may be defined to select 100 MBps
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If STM32_AUTONEG is not defined, then this may be defined to select 100 MBps
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speed. Default: 10 Mbps
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speed. Default: 10 Mbps
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@@ -1607,6 +1631,7 @@ config STM32_PHYSR_FULLDUPLEX
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config STM32_ETH_PTP
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config STM32_ETH_PTP
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bool "Precision Time Protocol (PTP)"
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bool "Precision Time Protocol (PTP)"
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default n
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default n
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depends on STM32_ETHMAC
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---help---
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---help---
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Precision Time Protocol (PTP). Not supported but some hooks are indicated
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Precision Time Protocol (PTP). Not supported but some hooks are indicated
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with this condition.
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with this condition.
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@@ -1616,6 +1641,7 @@ endmenu
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config STM32_RMII
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config STM32_RMII
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bool
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bool
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default y if !STM32_MII
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default y if !STM32_MII
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depends on STM32_ETHMAC
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config STM32_MII_MCO1
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config STM32_MII_MCO1
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bool
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bool
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@@ -76,10 +76,11 @@
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* FSMC (as opposed to an LCD or FLASH).
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* FSMC (as opposed to an LCD or FLASH).
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* CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC
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* CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC
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* address space
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* address space
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* CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC
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* CONFIG_HEAP2_SIZE : The size of the SRAM in the FSMC
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* address space
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* address space
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* CONFIG_MM_REGIONS : Must be set to a large enough value to
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* CONFIG_MM_REGIONS : Must be set to a large enough value to
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* include the FSMC SRAM (as determined by the rules provided below)
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* include the FSMC SRAM (as determined by
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* the rules provided below)
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*/
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*/
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#ifndef CONFIG_STM32_FSMC
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#ifndef CONFIG_STM32_FSMC
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@@ -256,12 +257,12 @@
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/* If FSMC SRAM is going to be used as heap, then verify that the starting
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/* If FSMC SRAM is going to be used as heap, then verify that the starting
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* address and size of the external SRAM region has been provided in the
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* address and size of the external SRAM region has been provided in the
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* configuration (as CONFIG_HEAP2_BASE and CONFIG_HEAP2_END).
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* configuration (as CONFIG_HEAP2_BASE and CONFIG_HEAP2_SIZE).
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*/
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*/
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#ifdef CONFIG_STM32_FSMC_SRAM
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#ifdef CONFIG_STM32_FSMC_SRAM
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# if !defined(CONFIG_HEAP2_BASE) || !defined(CONFIG_HEAP2_END)
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# if !defined(CONFIG_HEAP2_BASE) || !defined(CONFIG_HEAP2_SIZE)
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# error "CONFIG_HEAP2_BASE and CONFIG_HEAP2_END must be provided"
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# error "CONFIG_HEAP2_BASE and CONFIG_HEAP2_SIZE must be provided"
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# undef CONFIG_STM32_FSMC_SRAM
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# undef CONFIG_STM32_FSMC_SRAM
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# endif
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# endif
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#endif
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#endif
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@@ -317,7 +318,7 @@ void up_addregion(void)
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/* Add the external FSMC SRAM heap region. */
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/* Add the external FSMC SRAM heap region. */
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#ifdef CONFIG_STM32_FSMC_SRAM
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#ifdef CONFIG_STM32_FSMC_SRAM
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mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
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mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
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#endif
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#endif
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}
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}
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#endif
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#endif
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@@ -107,6 +107,6 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
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#if CONFIG_MM_REGIONS > 1
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#if CONFIG_MM_REGIONS > 1
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void up_addregion(void)
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void up_addregion(void)
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{
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{
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mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
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mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
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}
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}
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#endif
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#endif
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@@ -109,6 +109,6 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
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#if CONFIG_MM_REGIONS > 1
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#if CONFIG_MM_REGIONS > 1
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void up_addregion(void)
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void up_addregion(void)
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{
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{
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mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
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mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
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}
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}
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#endif
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#endif
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Block a user