diff --git a/arch/arm/src/samd/chip/sam_pm.h b/arch/arm/src/samd/chip/sam_pm.h index 67f1d6b370d..226c9121c39 100644 --- a/arch/arm/src/samd/chip/sam_pm.h +++ b/arch/arm/src/samd/chip/sam_pm.h @@ -181,11 +181,12 @@ #define PM_APBCMASK_PAC2 (1 << 0) /* Bit 0: PAC2 */ #define PM_APBCMASK_EVSYS (1 << 1) /* Bit 1: EVSYS */ -#define PM_APBCMASK_SERCOM0 (1 << 2) /* Bit 2: SERCOM0 */ -#define PM_APBCMASK_SERCOM1 (1 << 3) /* Bit 3: SERCOM1 */ -#define PM_APBCMASK_SERCOM2 (1 << 4) /* Bit 4: SERCOM2 */ -#define PM_APBCMASK_SERCOM3 (1 << 5) /* Bit 5: SERCOM3 */ -#define PM_APBCMASK_SERCOM4 (1 << 6) /* Bit 6: SERCOM4 */ +#define PM_APBCMASK_SERCOM(n) (1 << ((n)+2)) +# define PM_APBCMASK_SERCOM0 (1 << 2) /* Bit 2: SERCOM0 */ +# define PM_APBCMASK_SERCOM1 (1 << 3) /* Bit 3: SERCOM1 */ +# define PM_APBCMASK_SERCOM2 (1 << 4) /* Bit 4: SERCOM2 */ +# define PM_APBCMASK_SERCOM3 (1 << 5) /* Bit 5: SERCOM3 */ +# define PM_APBCMASK_SERCOM4 (1 << 6) /* Bit 6: SERCOM4 */ #define PM_APBCMASK_SERCOM5 (1 << 7) /* Bit 7: SERCOM5 */ #define PM_APBCMASK_TC0 (1 << 8) /* Bit 8: TC0 */ #define PM_APBCMASK_TC1 (1 << 9) /* Bit 9: TC1 */ diff --git a/arch/arm/src/samd/sam_usart.c b/arch/arm/src/samd/sam_usart.c index 2d3fe86b351..2d9180eb985 100644 --- a/arch/arm/src/samd/sam_usart.c +++ b/arch/arm/src/samd/sam_usart.c @@ -43,6 +43,7 @@ #include #include "chip/sam_pinmap.h" +#include "chip/sam_gclk.h" #include "chip/sam_usart.h" #include @@ -64,6 +65,7 @@ const struct sam_usart_config_s g_usart0config = .parity = CONFIG_USART0_PARITY, .bits = CONFIG_USART0_BITS, .irq = SAM_IRQ_SERCOM0, + .gclk = (BOARD_SERCOM0_SRCGCLKGEN >> GCLK_CLKCTRL_GEN_SHIFT), .stopbits2 = CONFIG_USART0_2STOP, .baud = CONFIG_USART0_BAUD, .pad0 = BOARD_SERCOM0_PINMAP_PAD0, @@ -82,6 +84,7 @@ const struct sam_usart_config_s g_usart1config = .parity = CONFIG_USART1_PARITY, .bits = CONFIG_USART1_BITS, .irq = SAM_IRQ_SERCOM1, + .gclk = (BOARD_SERCOM1_SRCGCLKGEN >> GCLK_CLKCTRL_GEN_SHIFT), .stopbits2 = CONFIG_USART1_2STOP, .baud = CONFIG_USART1_BAUD, .pad0 = BOARD_SERCOM1_PINMAP_PAD0, @@ -100,6 +103,7 @@ const struct sam_usart_config_s g_usart2config = .parity = CONFIG_USART2_PARITY, .bits = CONFIG_USART2_BITS, .irq = SAM_IRQ_SERCOM2, + .gclk = (BOARD_SERCOM2_SRCGCLKGEN >> GCLK_CLKCTRL_GEN_SHIFT), .stopbits2 = CONFIG_USART2_2STOP, .baud = CONFIG_USART2_BAUD, .pad0 = BOARD_SERCOM2_PINMAP_PAD0, @@ -118,6 +122,7 @@ const struct sam_usart_config_s g_usart3config = .parity = CONFIG_USART3_PARITY, .bits = CONFIG_USART3_BITS, .irq = SAM_IRQ_SERCOM3, + .gclk = (BOARD_SERCOM3_SRCGCLKGEN >> GCLK_CLKCTRL_GEN_SHIFT), .stopbits2 = CONFIG_USART3_2STOP, .baud = CONFIG_USART3_BAUD, .pad0 = BOARD_SERCOM3_PINMAP_PAD0, @@ -136,6 +141,7 @@ const struct sam_usart_config_s g_usart4config = .parity = CONFIG_USART4_PARITY, .bits = CONFIG_USART4_BITS, .irq = SAM_IRQ_SERCOM4, + .gclk = (BOARD_SERCOM4_SRCGCLKGEN >> GCLK_CLKCTRL_GEN_SHIFT), .stopbits2 = CONFIG_USART4_2STOP, .baud = CONFIG_USART4_BAUD, .pad0 = BOARD_SERCOM4_PINMAP_PAD0, @@ -154,6 +160,7 @@ const struct sam_usart_config_s g_usart5config = .parity = CONFIG_USART5_PARITY, .bits = CONFIG_USART5_BITS, .irq = SAM_IRQ_SERCOM5, + .gclk = (BOARD_SERCOM5_SRCGCLKGEN >> GCLK_CLKCTRL_GEN_SHIFT), .stopbits2 = CONFIG_USART5_2STOP, .baud = CONFIG_USART5_BAUD, .pad0 = BOARD_SERCOM5_PINMAP_PAD0, diff --git a/arch/arm/src/samd/sam_usart.h b/arch/arm/src/samd/sam_usart.h index a8585ae2d2d..b61a45b46aa 100644 --- a/arch/arm/src/samd/sam_usart.h +++ b/arch/arm/src/samd/sam_usart.h @@ -82,6 +82,7 @@ struct sam_usart_config_s uint8_t parity; /* 0=none, 1=odd, 2=even */ uint8_t bits; /* Number of bits (5-9) */ uint8_t irq; /* SERCOM IRQ number */ + uint8_t gclk; /* Source GCLK generator */ bool isconsole; /* True: The USART is the console device */ bool stopbits2; /* True: Configure with 2 stop bits instead of 1 */ uint32_t baud; /* Configured baud */