litex: Support for kernel build with vexriscv-smp.

Documentation/platforms/risc-v/litex/cores/vexriscv/index.rst

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+=============
+Vexriscv Core
+=============
+
+The vexriscv core only supports standard "Flat builds", consisting of a single binary.
+
+Building
+--------
+
+Build the minimal NSH application::
+
+   # Configure for NSH
+   $ ./tools/configure.sh arty_a7:nsh
+
+   # Build Nuttx
+   $ make
+
+
+Booting
+--------
+
+Create a file, 'boot.json' in the Nuttx root directory, with the following content::
+
+  {
+    "nuttx.bin": "0x40000000"
+  }
+
+Load the application over serial with::
+
+   $ litex_term --images=boot.json --speed=1e6 /dev/ttyUSB0
+
+Update the baud rate and serial port to suit your configuration.
+
+
+

Documentation/platforms/risc-v/litex/cores/vexriscv_smp/index.rst

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+==================
+VexRISCV_SMP Core
+==================
+
+The vexrisc_smp core supports a two-pass build, producing the kernel (nuttx.bin), and a number of applications, 
+compiled into the apps/bin directory. In the standard configuration, the applications are loaded to the FPGA in a RAMdisk. 
+Although, for custom boards this could be extended to loading from SDCards, flash, or other mediums.
+
+Building
+--------
+
+Nuttx uses openSBI to configure and prepare the vexriscv_smp core. With this configuration, 
+the Nuttx kernel is a binary payload for OpenSBI. The configuration used is
+identical to that used for Linux on Litex project (https://github.com/litex-hub/linux-on-litex-vexriscv).
+
+To build OpenSBI::
+
+   $ git clone https://github.com/litex-hub/opensbi --branch 0.8-linux-on-litex-vexriscv
+   $ cd opensbi
+   $ make CROSS_COMPILE=riscv64-unknown-elf- PLATFORM=litex/vexriscv
+   $ cp build/platform/litex/vexriscv/firmware/fw_jump.bin ../opensbi.bin"
+
+Build the Nuttx kernel::
+
+   $ ./tools/configure.sh arty_a7:knsh
+   $ make
+
+Build the loadable applications::
+
+   $ make export -j16
+   $ cd ../apps
+   $ make ./tools/mkimport.sh -z -x ../nuttx/nuttx-export-*.tar.gz
+   $ make import
+
+Generate a romfs to be loaded to the FPGA as a ramdisk::
+
+   $ cd nuttx
+   $ genromfs -f romfs.img -d ../apps/bin -V "NuttXBootVol"
+
+Booting
+--------
+
+Create a file, 'boot.json' in the Nuttx root directory, with the following content::
+
+  {
+    "romfs.img":   "0x40C00000",
+    "nuttx.bin":   "0x40000000",
+    "opensbi.bin": "0x40f00000"
+  }
+
+Load the application over serial with::
+
+  litex_term --images=boot.json --speed=1e6 /dev/ttyUSB0
+
+Update the baud rate and serial port to suit your configuration.

Documentation/platforms/risc-v/litex/index.rst

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+======================================
+Enjoy Digital LiteX FPGA's
+======================================
+
+The LiteX framework provides a convenient and efficient infrastructure to create FPGA Cores/SoCs, to explore various digital design architectures and create full FPGA based systems. 
+
+Information specific to Litex and supported boards can be found on the project's homepage: https://github.com/enjoy-digital/litex
+
+Nuttx has basic support for two softcores
+
+ - vexriscv: FPGA friendly RISC-V ISA CPU implementation
+ - vexriscv_smp: A more fully featured, Linux compatible core.
+
+Currently, the only configured development board in the Arty A7 https://digilent.com/reference/programmable-logic/arty-a7/start. However, many Litex supported boards 
+should work with either core, requiring minimal adjustment to the configuration.
+
+
+Toolchain
+==============
+
+Litex projects can be built with a generic RISC-V GCC toolchain. There are currently two options.
+
+Prebuilt toolchain
+------------------
+
+A prebuilt RISC-V toolchain from SiFive can be used to build Litex projects::
+
+ # Download the prebuilt toolchain
+ $ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz \ 
+                   > riscv64-unknown-elf-gcc.tar.gz
+
+ # Unpack the archive
+ $ tar -xf riscv64-unknown-elf-gcc.tar.gz 
+
+ # Add to path
+ $ export PATH="$HOME/path/to/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14/bin:$PATH
+
+Custom built toolchain
+----------------------
+
+The toolchain needs to be compiled locally in order to use a more modern version. At the time of writing, 
+the source can be obtained from https://github.com/riscv-collab/riscv-gnu-toolchain and built with the following configuration::
+
+  $ CFLAGS="-g0 -Os"
+  $ CXXFLAGS="-g0 -Os"
+  $ LDFLAGS="-s"
+
+  $ ./configure \
+    CFLAGS_FOR_TARGET='-O2 -mcmodel=medany' \
+    CXXFLAGS_FOR_TARGET='-O2 -mcmodel=medany' \
+    --prefix=path/to/install/to \
+    --with-system-zlib \
+    --with-arch=rv32ima \
+    --with-abi=ilp32
+
+   $ make
+
+.. important:: The vexriscv_smp core requires `with-arch=rv32imac`. 
+   
+Check the linked github repository for other options, including building with multilib enabled.
+
+Core specific information
+=========================
+
+.. toctree::
+   :glob:
+   :maxdepth: 1
+
+   cores/*/*
+