xtensa/esp32: Add AES hardware accelerator driver

arch/xtensa/src/esp32/Kconfig

@@ -280,6 +280,10 @@ config ESP32_I2C1
 	select I2C
 	select I2C_DRIVER
 
+config ESP32_AES_ACCELERATOR
+	bool "AES Accelerator"
+	default n
+
 endmenu # ESP32 Peripheral Selection
 
 menu "Memory Configuration"
@@ -759,4 +763,13 @@ config ESP32_PARTITION_MOUNT
 
 endmenu # ESP32_PARTITION
 
+menu "AES accelerate"
+	depends on ESP32_AES_ACCELERATOR
+
+config ESP32_AES_ACCELERATOR_TEST
+	bool "AES driver test"
+	default n
+
+endmenu # ESP32_AES_ACCELERATOR
+
 endif # ARCH_CHIP_ESP32

arch/xtensa/src/esp32/Make.defs

@@ -178,6 +178,10 @@ ifeq ($(CONFIG_ESP32_RT_TIMER),y)
 CHIP_CSRCS += esp32_rt_timer.c
 endif
 
+ifeq ($(CONFIG_ESP32_AES_ACCELERATOR),y)
+CHIP_CSRCS += esp32_aes.c
+endif
+
 ifeq ($(CONFIG_ESP32_WIRELESS),y)
 WIRELESS_DRV_UNPACK  = esp-wireless-drivers-3rdparty
 WIRELESS_DRV_ID      = 4a352be

arch/xtensa/src/esp32/esp32_aes.h

@@ -0,0 +1,216 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/esp32_aes.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_AES_H
+#define __ARCH_XTENSA_SRC_ESP32_ESP32_AES_H
+
+#include <nuttx/config.h>
+#include <stdint.h>
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/* AES private description */
+
+struct esp32_aes_s
+{
+  uint32_t  key[8];     /* Key data value */
+  uint16_t  keybits;    /* Key data bits */
+};
+
+/* AES XTS private description */
+
+struct esp32_aes_xts_s
+{
+  struct esp32_aes_s  crypt;  /* AES block encryption/decryption */
+  struct esp32_aes_s  tweak;  /* AES tweak encryption/decryption */
+};
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32_aes_ecb_cypher
+ *
+ * Description:
+ *   Process AES ECB encryption/decryption.
+ *
+ * Input Parameters:
+ *   aes     - AES object data pointer
+ *   encrypt - True: encryption mode; False: decryption mode
+ *   input   - Input data pointer
+ *   output  - Output buffer pointer
+ *   size    - Data size in bytes
+ *
+ * Returned Value:
+ *   OK is returned on success. Otherwise, a negated errno value is returned.
+ *
+ ****************************************************************************/
+
+int esp32_aes_ecb_cypher(struct esp32_aes_s *aes, bool encrypt,
+                         const void *input, void *output, uint32_t size);
+
+/****************************************************************************
+ * Name: esp32_aes_cbc_cypher
+ *
+ * Description:
+ *   Process AES CBC encryption/decryption.
+ *
+ * Input Parameters:
+ *   aes     - AES object data pointer
+ *   encrypt - True: encryption mode; False: decryption mode
+ *   ivptr   - Initialization vector pointer
+ *   input   - Input data pointer
+ *   output  - Output buffer pointer
+ *   size    - Data size in bytes
+ *
+ * Returned Value:
+ *   OK is returned on success. Otherwise, a negated errno value is returned.
+ *
+ ****************************************************************************/
+
+int esp32_aes_cbc_cypher(struct esp32_aes_s *aes, bool encrypt, void *ivptr,
+                         const void *input, void *output, uint32_t size);
+
+/****************************************************************************
+ * Name: esp32_aes_ctr_cypher
+ *
+ * Description:
+ *   Process AES CTR encryption/decryption.
+ *
+ * Input Parameters:
+ *   aes      - AES object data pointer
+ *   offptr   - Offset buffer pointer
+ *   cntptr   - Counter buffer pointer
+ *   cacheptr - Counter calculation buffer pointer
+ *   input    - Input data pointer
+ *   output   - Output buffer pointer
+ *   size     - Data size in bytes
+ *
+ * Returned Value:
+ *   OK is returned on success. Otherwise, a negated errno value is returned.
+ *
+ ****************************************************************************/
+
+int esp32_aes_ctr_cypher(struct esp32_aes_s *aes, uint32_t *offptr,
+                         void *cntptr, void *cacheptr, const void *input,
+                         void *output, uint32_t size);
+
+/****************************************************************************
+ * Name: esp32_aes_xts_cypher
+ *
+ * Description:
+ *   Process AES XTS encryption/decryption.
+ *
+ * Input Parameters:
+ *   aes     - AES object data pointer
+ *   encrypt - True: encryption mode; False: decryption mode
+ *   unitptr - Unit data buffer pointer
+ *   input   - Input data pointer
+ *   output  - Output buffer pointer
+ *   size    - Data size in bytes
+ *
+ * Returned Value:
+ *   OK is returned on success. Otherwise, a negated errno value is returned.
+ *
+ ****************************************************************************/
+
+int esp32_aes_xts_cypher(struct esp32_aes_xts_s *aes, bool encrypt,
+                         void *unitptr, const void *input, void *output,
+                         uint32_t size);
+
+/****************************************************************************
+ * Name: esp32_aes_setkey
+ *
+ * Description:
+ *   Configurate AES key.
+ *
+ * Input Parameters:
+ *   aes     - AES object data pointer
+ *   keyptr  - Key data pointer
+ *   keybits - Key data bits
+ *
+ * Returned Value:
+ *   OK is returned on success. Otherwise, a negated errno value is returned.
+ *
+ ****************************************************************************/
+
+int esp32_aes_setkey(struct esp32_aes_s *aes, const void *keyptr,
+                     uint16_t keybits);
+
+/****************************************************************************
+ * Name: esp32_aes_xts_setkey
+ *
+ * Description:
+ *   Configurate AES XTS key.
+ *
+ * Input Parameters:
+ *   aes     - AES object data pointer
+ *   keyptr  - Key data pointer
+ *   keybits - Key data bits
+ *
+ * Returned Value:
+ *   OK is returned on success. Otherwise, a negated errno value is returned.
+ *
+ ****************************************************************************/
+
+int esp32_aes_xts_setkey(struct esp32_aes_xts_s *aes, const void *keyptr,
+                         uint16_t keybits);
+
+/****************************************************************************
+ * Name: esp32_aes_init
+ *
+ * Description:
+ *   Initialize ESP32 AES hardware.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   OK is returned on success. Otherwise, a negated errno value is returned.
+ *
+ ****************************************************************************/
+
+int esp32_aes_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+#undef EXTERN
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_AES_H */

arch/xtensa/src/esp32/hardware/esp32_aes.h

@@ -0,0 +1,47 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32/hardware/esp32_aes.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_XTENSA_SRC_ESP32_HARDWARE_ESP32_AES_H
+#define __ARCH_XTENSA_SRC_ESP32_HARDWARE_ESP32_AES_H
+
+/* AES acceleration registers */
+
+#define DR_REG_AES_BASE         (0x3ff01000)
+
+#define AES_START_REG           ((DR_REG_AES_BASE) + 0x00)
+#define AES_IDLE_REG            ((DR_REG_AES_BASE) + 0x04)
+#define AES_MODE_REG            ((DR_REG_AES_BASE) + 0x08)
+#define AES_KEY_BASE            ((DR_REG_AES_BASE) + 0x10)
+#define AES_TEXT_BASE           ((DR_REG_AES_BASE) + 0x30)
+#define AES_ENDIAN              ((DR_REG_AES_BASE) + 0x40)
+
+/* AES start register */
+
+#define AES_START_OPT           (BIT(0))
+
+/* AES idle register */
+
+#define AES_IDLE_STATE          (BIT(0))
+
+/* AES mode register */
+
+#define AES_MODE_DECRYPT        (BIT(2))
+
+#endif /* __ARCH_XTENSA_SRC_ESP32_HARDWARE_ESP32_AES_H */

arch/xtensa/src/esp32/hardware/esp32_dport.h

@@ -111,6 +111,10 @@
 
 /* DPORT_PERI_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
 
+#define DPORT_PERI_CLK_EN_AES (1 << 0)
+#define DPORT_PERI_CLK_EN_SHA (1 << 1)
+#define DPORT_PERI_CLK_EN_RSA (1 << 2)
+
 #define DPORT_PERI_CLK_EN  0xFFFFFFFF
 #define DPORT_PERI_CLK_EN_M  ((DPORT_PERI_CLK_EN_V)<<(DPORT_PERI_CLK_EN_S))
 #define DPORT_PERI_CLK_EN_V  0xFFFFFFFF
@@ -120,6 +124,10 @@
 
 /* DPORT_PERI_RST_EN : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
 
+#define DPORT_PERI_RST_EN_AES (1 << 0)
+#define DPORT_PERI_RST_EN_SHA (1 << 1)
+#define DPORT_PERI_RST_EN_RSA (1 << 2)
+
 #define DPORT_PERI_RST_EN  0xFFFFFFFF
 #define DPORT_PERI_RST_EN_M  ((DPORT_PERI_RST_EN_V)<<(DPORT_PERI_RST_EN_S))
 #define DPORT_PERI_RST_EN_V  0xFFFFFFFF

boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig

@@ -0,0 +1,56 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_ARCH_LEDS is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_NSH_CMDPARMS is not set
+CONFIG_ARCH="xtensa"
+CONFIG_ARCH_BOARD="esp32-devkitc"
+CONFIG_ARCH_BOARD_ESP32_DEVKITC=y
+CONFIG_ARCH_CHIP="esp32"
+CONFIG_ARCH_CHIP_ESP32=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARCH_XTENSA=y
+CONFIG_BOARD_LOOPSPERMSEC=16717
+CONFIG_BUILTIN=y
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_ALGTEST=y
+CONFIG_CRYPTO_CRYPTODEV=y
+CONFIG_CRYPTO_SW_AES=y
+CONFIG_DEBUG_ASSERTIONS=y
+CONFIG_DEBUG_FEATURES=y
+CONFIG_ESP32_AES_ACCELERATOR=y
+CONFIG_ESP32_AES_ACCELERATOR_TEST=y
+CONFIG_ESP32_UART0=y
+CONFIG_FS_PROCFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_IDLETHREAD_STACKSIZE=3072
+CONFIG_INTELHEX_BINARY=y
+CONFIG_MAX_TASKS=16
+CONFIG_MM_REGIONS=2
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=114688
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_START_DAY=6
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2011
+CONFIG_SYSTEM_NSH=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+CONFIG_USER_ENTRYPOINT="esp32_aes_main"

boards/xtensa/esp32/esp32-devkitc/src/esp32_bringup.c

@@ -73,6 +73,10 @@
 #  include "esp32_board_wdt.h"
 #endif
 
+#ifdef CONFIG_ESP32_AES_ACCELERATOR
+#  include "esp32_aes.h"
+#endif
+
 #include "esp32-devkitc.h"
 
 /****************************************************************************
@@ -148,6 +152,15 @@ int esp32_bringup(void)
 
 #endif
 
+#ifdef CONFIG_ESP32_AES_ACCELERATOR
+  ret = esp32_aes_init();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to initialize AES: %d\n", ret);
+    }
+#endif
+
 #if defined(CONFIG_ESP32_SPIRAM) && \
     defined(CONFIG_ESP32_SPIRAM_BANKSWITCH_ENABLE)
   ret = esp_himem_init();