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https://github.com/apache/nuttx.git
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esp32/rmt: Remove outdated RMT driver
The new common RMT driver - already available for ESP32-S2 and ESP32-S3 - will be implemented in another commit for ESP32.
This commit is contained in:
Tiago Medicci Serrano
committed by
Xiang Xiao
Xiang Xiao
parent
573e1a255f
commit
4b3b22cbeb
@@ -1,282 +0,0 @@
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/****************************************************************************
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* boards/xtensa/esp32/common/src/esp32_rmt.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <errno.h>
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#include <debug.h>
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#include <stdio.h>
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#include "xtensa.h"
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#include <nuttx/kmalloc.h>
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#include "esp32_rmt.h"
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#ifdef CONFIG_ESP32_RMT
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define APB_PERIOD (12.5)
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#define T0H ((uint16_t)(350 / APB_PERIOD)) // ns
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#define T0L ((uint16_t)(900 / APB_PERIOD)) // ns
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#define T1H ((uint16_t)(900 / APB_PERIOD)) // ns
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#define T1L ((uint16_t)(350 / APB_PERIOD)) // ns
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#define RES ((uint16_t)(60000 / APB_PERIOD)) // ns
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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static int rmt_open(struct file *filep)
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{
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struct inode *inode = filep->f_inode;
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struct rmt_dev_channel_s *dev_data = inode->i_private;
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struct rmt_dev_s *parent_dev =
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(struct rmt_dev_s *)dev_data->parent_dev;
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int ret;
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irqstate_t flags;
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DEBUGASSERT(parent_dev);
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nxsem_wait(&dev_data->tx_sem);
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flags = spin_lock_irqsave(&parent_dev->lock);
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if (dev_data->open_count == 0)
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{
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int ch_idx = dev_data->ch_idx;
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uint32_t reg0_addr = RMT_CHNCONF0_REG(ch_idx);
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uint32_t reg1_addr = RMT_CHNCONF1_REG(ch_idx);
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uint32_t reg_val = 0x00;
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/* a single memory block with double buffering is enough */
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uint32_t mem_blocks = 1;
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dev_data->available_words = RMT_DATA_MEMORY_BLOCK_WORDS*mem_blocks;
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dev_data->reload_thresh = dev_data->available_words / 2;
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uint32_t start_addr_chn = RMT_DATA_BASE_ADDR +
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RMT_DATA_MEMORY_BLOCK_WORDS * 4 * ch_idx;
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dev_data->start_address = start_addr_chn;
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reg_val = (mem_blocks) << 24;
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uint32_t clock_divider = 1;
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reg_val |= (clock_divider);
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putreg32(reg_val, reg0_addr);
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reg_val = 0;
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/* use APB clock */
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reg_val |= RMT_REF_ALWAYS_ON_CHN;
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/* memory block in transmission mode */
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reg_val &= ~RMT_MEM_OWNER_CHN;
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putreg32(reg_val, reg1_addr);
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/* set when the buffer swapping IRQ must be generated */
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uint32_t reload_addr = RMT_CHN_TX_LIM_REG(ch_idx);
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rmtinfo("Setting thr limit at %08X to %d",
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reload_addr, dev_data->reload_thresh);
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putreg32(dev_data->reload_thresh, reload_addr);
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/* allow direct access to RMT's memory */
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modifyreg32(RMT_APB_CONF_REG, 0, BIT(0));
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}
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else
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{
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rmtwarn("Be careful on opening this channel multiple times");
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}
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dev_data->open_count += 1;
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ret = OK;
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spin_unlock_irqrestore(&parent_dev->lock, flags);
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nxsem_post(&dev_data->tx_sem);
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return ret;
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}
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static int rmt_close(struct file *filep)
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{
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struct inode *inode = filep->f_inode;
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struct rmt_dev_channel_s *dev_data = inode->i_private;
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struct rmt_dev_s *parent_dev =
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(struct rmt_dev_s *)dev_data->parent_dev;
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int ret;
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irqstate_t flags;
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DEBUGASSERT(parent_dev);
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nxsem_wait(&dev_data->tx_sem);
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flags = spin_lock_irqsave(&parent_dev->lock);
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dev_data->open_count -= 1;
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ret = OK;
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spin_unlock_irqrestore(&parent_dev->lock, flags);
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nxsem_post(&dev_data->tx_sem);
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return ret;
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}
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static ssize_t rmt_write(struct file *filep,
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const char *data,
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size_t len)
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{
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struct inode *inode = filep->f_inode;
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struct rmt_dev_channel_s *dev_data = inode->i_private;
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struct rmt_dev_s *parent_dev =
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(struct rmt_dev_s *)dev_data->parent_dev;
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irqstate_t flags;
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size_t len_in_words = len / 4;
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DEBUGASSERT(parent_dev);
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if (data == NULL || (len_in_words == 0) || (len % 4))
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{
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return -EINVAL;
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}
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flags = spin_lock_irqsave(&parent_dev->lock);
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/* set RMT's memory as writable */
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uint32_t reg1_addr = RMT_CHNCONF1_REG(dev_data->ch_idx);
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modifyreg32(reg1_addr, 0, RMT_MEM_RD_RST_CHN);
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modifyreg32(reg1_addr, RMT_MEM_RD_RST_CHN, 0);
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dev_data->src = (uint32_t *)data;
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dev_data->src_offset = 0;
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dev_data->words_to_send = len_in_words;
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/* enable IRQs for buffer refill and End-of-Transmition (EOT) */
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modifyreg32(
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RMT_INT_ENA_REG,
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0,
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RMT_CHN_TX_THR_EVENT_INT_ENA(dev_data->ch_idx) |
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RMT_CHN_TX_END_INT_ENA(dev_data->ch_idx));
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rmt_load_tx_buffer(dev_data);
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/* tell RMT to start the transmition */
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modifyreg32(reg1_addr, 0, RMT_TX_START_CHN(dev_data->ch_idx));
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spin_unlock_irqrestore(&parent_dev->lock, flags);
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/* wait for the transmition to finish */
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nxsem_wait(&dev_data->tx_sem);
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nxsem_post(&dev_data->tx_sem);
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return len;
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}
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/****************************************************************************
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* Name: board_rmt_initialize
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*
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* Description:
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* Initialize and register the RMT driver
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*
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* Input Parameters:
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* devno - The device number, used to build the device path as /dev/rmtN
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* rmt_dev - Pointer to the RMT device that will be used
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* nleds - number of LEDs
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno value on failure.
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*
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****************************************************************************/
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static const struct file_operations g_rmt_channel_fops =
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{
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rmt_open, /* open */
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rmt_close, /* close */
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NULL, /* read */
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rmt_write, /* write */
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NULL, /* seek */
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NULL, /* ioctl */
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};
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int board_rmt_initialize(int channel, int output_pin)
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{
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struct rmt_dev_s *rmt_dev = esp32_rmtinitialize();
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DEBUGASSERT(rmt_dev);
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char devpath[13];
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int ret;
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rmt_attach_pin_to_channel(rmt_dev, channel, output_pin);
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struct rmt_dev_channel_s *channel_data = &(rmt_dev->channels[channel]);
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/* Register the RMT driver at the specified location. */
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snprintf(devpath, sizeof(devpath), "/dev/rmt%d", channel);
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/* Register the character driver */
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ret = register_driver(devpath, &g_rmt_channel_fops, 0666, channel_data);
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if (ret < 0)
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{
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rmterr("ERROR: board_rmt_initialize(%s) failed: %d\n",
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devpath, ret);
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return ret;
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}
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return OK;
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}
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#endif
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@@ -1,49 +0,0 @@
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#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_ARCH_LEDS is not set
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# CONFIG_NSH_ARGCAT is not set
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# CONFIG_NSH_CMDOPT_HEXDUMP is not set
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CONFIG_ARCH="xtensa"
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CONFIG_ARCH_BOARD="esp32-devkitc"
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CONFIG_ARCH_BOARD_COMMON=y
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CONFIG_ARCH_BOARD_ESP32_DEVKITC=y
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CONFIG_ARCH_CHIP="esp32"
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CONFIG_ARCH_CHIP_ESP32=y
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CONFIG_ARCH_CHIP_ESP32WROVER=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_XTENSA=y
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CONFIG_BOARD_LOOPSPERMSEC=16717
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CONFIG_BUILTIN=y
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CONFIG_ESP32_RMT=y
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CONFIG_ESP32_UART0=y
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CONFIG_EXAMPLES_WS2812_ESP32_RMT=y
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CONFIG_EXPERIMENTAL=y
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CONFIG_FS_PROCFS=y
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CONFIG_HAVE_CXX=y
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CONFIG_HAVE_CXXINITIALIZE=y
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CONFIG_IDLETHREAD_STACKSIZE=3072
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CONFIG_INIT_ENTRYPOINT="nsh_main"
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CONFIG_INIT_STACKSIZE=3072
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CONFIG_INTELHEX_BINARY=y
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CONFIG_MM_REGIONS=3
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_LINELEN=64
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CONFIG_NSH_READLINE=y
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_RAM_SIZE=114688
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CONFIG_RAM_START=0x20000000
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_WAITPID=y
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CONFIG_START_DAY=6
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CONFIG_START_MONTH=12
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CONFIG_START_YEAR=2011
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CONFIG_SYSLOG_BUFFER=y
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CONFIG_SYSTEM_NSH=y
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CONFIG_UART0_SERIAL_CONSOLE=y
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@@ -161,10 +161,6 @@
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# include "esp32_max6675.h"
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#endif
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#ifdef CONFIG_ESP32_RMT
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# include "esp32_rmt.h"
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#endif
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#ifdef CONFIG_DAC
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# include "esp32_board_dac.h"
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#endif
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@@ -649,14 +645,6 @@ int esp32_bringup(void)
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}
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#endif
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#ifdef CONFIG_ESP32_RMT
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ret = board_rmt_initialize(RMT_CHANNEL, RMT_OUTPUT_PIN);
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if (ret < 0)
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{
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syslog(LOG_ERR, "ERROR: board_rmt_initialize() failed: %d\n", ret);
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}
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#endif
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#ifdef CONFIG_DAC
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ret = board_dac_initialize(CONFIG_ESP32_DAC_DEVPATH);
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if (ret < 0)
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