mirror of
https://github.com/apache/nuttx.git
synced 2026-06-05 15:58:59 +08:00
arch/z80/src/ez80/ez80_i2c.c: Cosmetic changes from code review. Also makes I2C and SPI configurable options.
This commit is contained in:
@@ -22,6 +22,14 @@ config EZ80_UART2
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select UART2_SERIALDRIVER
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select UART2_SERIALDRIVER
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default n
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default n
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config EZ80_I2C
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bool "I2C"
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default n
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config EZ80_SPI
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bool "SPI"
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default n
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config EZ80_EMAC
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config EZ80_EMAC
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bool "Ethernet MAC"
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bool "Ethernet MAC"
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default n
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default n
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@@ -53,10 +53,14 @@ endif
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CHIP_SSRCS =
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CHIP_SSRCS =
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CHIP_CSRCS = ez80_clock.c ez80_initialstate.c ez80_irq.c ez80_copystate.c
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CHIP_CSRCS = ez80_clock.c ez80_initialstate.c ez80_irq.c ez80_copystate.c
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CHIP_CSRCS += ez80_schedulesigaction.c ez80_sigdeliver.c ez80_lowuart.c
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CHIP_CSRCS += ez80_schedulesigaction.c ez80_sigdeliver.c ez80_lowuart.c
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CHIP_CSRCS += ez80_serial.c ez80_spi.c ez80_i2c.c ez80_registerdump.c
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CHIP_CSRCS += ez80_serial.c ez80_registerdump.c
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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ifneq ($(CONFIG_EZ80_I2C),y)
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CHIP_CSRCS += ez80_timerisr.c
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CHIP_CSRCS += ez80_i2c.c
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endif
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ifneq ($(CONFIG_EZ80_SPI),y)
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CHIP_CSRCS += ez80_spi.c
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endif
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endif
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ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
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ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
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@@ -208,8 +208,8 @@ static uint16_t ez80_i2c_getccr(uint32_t fscl)
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* fscl = sysclock / 10 / (M + 1) / 2**N
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* fscl = sysclock / 10 / (M + 1) / 2**N
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* = fsamp / 10 / (M + 1)
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* = fsamp / 10 / (M + 1)
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*
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*
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* The fsmp must be >= 10 * fscl. The best solution is the smallest value of
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* The fsmp must be >= 10 * fscl. The best solution is the smallest value
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* N so that the sampling rate is the highest subject to:
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* of N so that the sampling rate is the highest subject to:
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*
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*
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* The minimum value of the fsamp is given by:
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* The minimum value of the fsamp is given by:
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*/
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*/
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@@ -291,9 +291,10 @@ static uint16_t ez80_i2c_getccr(uint32_t fscl)
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* Name: ez80_i2c_waitiflg
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* Name: ez80_i2c_waitiflg
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*
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*
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* Description:
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* Description:
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* In polled mode, we have to spin until the IFLG bit in the xxx register
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* In polled mode, we have to spin until the IFLG bit in the I2C_CTL
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* goes to 1, signalling that the last send or receive is complete. This
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* register goes to 1, signaling that the last send or receive is
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* could be used to generate an interrupt for a non-polled driver.
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* complete. This could be used to generate an interrupt for a non-
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* polled driver.
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*
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*
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* Input Parameters:
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* Input Parameters:
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* priv - Device-specific state data
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* priv - Device-specific state data
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@@ -410,7 +411,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
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{
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{
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/* This error should never occur */
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/* This error should never occur */
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_err("ERROR: Bad START status: %02x\n", sr);
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i2cerr("ERROR: Bad START status: %02x\n", sr);
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ez80_i2c_clriflg();
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ez80_i2c_clriflg();
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return -EIO;
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return -EIO;
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}
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}
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@@ -432,7 +433,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
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sr = ez80_i2c_waitiflg();
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sr = ez80_i2c_waitiflg();
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if (sr != I2C_SR_MADDRWRACK && sr != I2C_SR_MADDRWR)
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if (sr != I2C_SR_MADDRWRACK && sr != I2C_SR_MADDRWR)
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{
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{
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_err("ERROR: Bad ADDR8 status: %02x\n", sr);
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i2cerr("ERROR: Bad ADDR8 status: %02x\n", sr);
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goto failure;
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goto failure;
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}
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}
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}
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}
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@@ -451,7 +452,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
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sr = ez80_i2c_waitiflg();
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sr = ez80_i2c_waitiflg();
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if (sr != I2C_SR_MADDRWRACK && sr != I2C_SR_MADDRWR)
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if (sr != I2C_SR_MADDRWRACK && sr != I2C_SR_MADDRWR)
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{
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{
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_err("ERROR: Bad ADDR10H status: %02x\n", sr);
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i2cerr("ERROR: Bad ADDR10H status: %02x\n", sr);
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goto failure;
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goto failure;
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}
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}
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@@ -465,7 +466,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
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sr = ez80_i2c_waitiflg();
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sr = ez80_i2c_waitiflg();
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if (sr != I2C_SR_MADDR2WRACK && sr != I2C_SR_MADDR2WR)
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if (sr != I2C_SR_MADDR2WRACK && sr != I2C_SR_MADDR2WR)
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{
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{
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_err("ERROR: Bad ADDR10L status: %02x\n", sr);
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i2cerr("ERROR: Bad ADDR10L status: %02x\n", sr);
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goto failure;
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goto failure;
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}
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}
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}
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}
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@@ -480,17 +481,18 @@ failure:
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{
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{
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case I2C_SR_ARBLOST1: /* Arbitration lost in address or data byte */
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case I2C_SR_ARBLOST1: /* Arbitration lost in address or data byte */
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case I2C_SR_ARBLOST2: /* Arbitration lost in address as master, slave
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case I2C_SR_ARBLOST2: /* Arbitration lost in address as master, slave
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* address and Write bit received, ACK transmitted */
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* address and Write bit received, ACK
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* transmitted */
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case I2C_SR_ARBLOST3: /* Arbitration lost in address as master, General
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case I2C_SR_ARBLOST3: /* Arbitration lost in address as master, General
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* Call address received, ACK transmitted */
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* Call address received, ACK transmitted */
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case I2C_SR_ARBLOST4: /* Arbitration lost in address as master, slave
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case I2C_SR_ARBLOST4: /* Arbitration lost in address as master, slave
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* address and Read bit received, ACK transmitted */
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* address and Read bit received, ACK transmitted */
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_err("ERROR: Arbitration lost: %02x\n", sr);
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i2cerr("ERROR: Arbitration lost: %02x\n", sr);
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ez80_i2c_clriflg();
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ez80_i2c_clriflg();
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return -EAGAIN;
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return -EAGAIN;
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default:
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default:
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_err("ERROR: Unexpected status: %02x\n", sr);
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i2cerr("ERROR: Unexpected status: %02x\n", sr);
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ez80_i2c_clriflg();
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ez80_i2c_clriflg();
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return -EIO;
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return -EIO;
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}
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}
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@@ -511,7 +513,8 @@ failure:
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*
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*
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* Input Parameters:
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* Input Parameters:
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* dev - Device-specific state data
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* dev - Device-specific state data
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* buffer - A pointer to a buffer of data to receive the data from the device
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* buffer - A pointer to a buffer of data to receive the data from the
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* device
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* buflen - The requested number of bytes to be read
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* buflen - The requested number of bytes to be read
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* flags - Determines is a START and/or STOP indication is needed.
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* flags - Determines is a START and/or STOP indication is needed.
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*
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*
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@@ -599,7 +602,9 @@ static int ez80_i2c_read_transfer(FAR struct ez80_i2cdev_s *priv,
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if (regval == I2C_SR_MDATARDACK)
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if (regval == I2C_SR_MDATARDACK)
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{
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{
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/* Since we just ACKed the incoming byte, it must NOT be the last */
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/* Since we just ACKed the incoming byte, it must NOT be the
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* last
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*/
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DEBUGASSERT(count > 1);
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DEBUGASSERT(count > 1);
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@@ -622,7 +627,8 @@ static int ez80_i2c_read_transfer(FAR struct ez80_i2cdev_s *priv,
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/* When all bytes are received and the NACK has been sent,
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/* When all bytes are received and the NACK has been sent,
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* then the microcontroller must write 1 to the STP bit in
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* then the microcontroller must write 1 to the STP bit in
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* the I2C_CTL register. The I2C then transmits a STOP
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* the I2C_CTL register. The I2C then transmits a STOP
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* condition, clears the STP bit and returns to an idle state.
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* condition, clears the STP bit and returns to an idle
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* state.
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*/
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*/
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ez80_i2c_stop();
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ez80_i2c_stop();
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@@ -640,7 +646,7 @@ static int ez80_i2c_read_transfer(FAR struct ez80_i2cdev_s *priv,
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* this will cause the whole transfer to start over
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* this will cause the whole transfer to start over
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*/
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*/
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_err("ERROR: Arbitration lost: %02x\n", regval);
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i2cerr("ERROR: Arbitration lost: %02x\n", regval);
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ez80_i2c_clriflg();
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ez80_i2c_clriflg();
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break;
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break;
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}
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}
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@@ -649,9 +655,9 @@ static int ez80_i2c_read_transfer(FAR struct ez80_i2cdev_s *priv,
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else
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else
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{
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{
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_err("ERROR: Unexpected status: %02x\n", regval);
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i2cerr("ERROR: Unexpected status: %02x\n", regval);
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ez80_i2c_clriflg();
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ez80_i2c_clriflg();
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return-EIO;
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return -EIO;
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}
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}
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}
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}
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}
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}
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@@ -670,7 +676,8 @@ static int ez80_i2c_read_transfer(FAR struct ez80_i2cdev_s *priv,
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*
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*
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* Input Parameters:
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* Input Parameters:
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* dev - Device-specific state data
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* dev - Device-specific state data
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* buffer - A pointer to the read-only buffer of data to be written to device
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* buffer - A pointer to the read-only buffer of data to be written to
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* device
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* buflen - The number of bytes to send from the buffer
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* buflen - The number of bytes to send from the buffer
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* flags - Determines is a START and/or STOP indication is needed.
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* flags - Determines is a START and/or STOP indication is needed.
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*
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*
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@@ -725,8 +732,8 @@ static int ez80_i2c_write_transfer(FAR struct ez80_i2cdev_s *priv,
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ptr = buffer;
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ptr = buffer;
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for (count = buflen; count; count--)
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for (count = buflen; count; count--)
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{
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{
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/* Load the I2C_DR with next data byte and clear the IFLG. Clearing
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/* Load the I2C_DR with next data byte and clear the IFLG.
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* the IFLAG will cause the data to be transferred.
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* Clearing the IFLAG will cause the data to be transferred.
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*/
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*/
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outp(EZ80_I2C_DR, *ptr++);
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outp(EZ80_I2C_DR, *ptr++);
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@@ -737,7 +744,7 @@ static int ez80_i2c_write_transfer(FAR struct ez80_i2cdev_s *priv,
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sr = ez80_i2c_waitiflg();
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sr = ez80_i2c_waitiflg();
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if (sr != I2C_SR_MDATAWRACK && sr != I2C_SR_MDATAWR)
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if (sr != I2C_SR_MDATAWRACK && sr != I2C_SR_MDATAWR)
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{
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{
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_err("ERROR: Bad DATA status: %02x\n", sr);
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i2cerr("ERROR: Bad DATA status: %02x\n", sr);
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ez80_i2c_clriflg();
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ez80_i2c_clriflg();
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if (sr == I2C_SR_ARBLOST1)
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if (sr == I2C_SR_ARBLOST1)
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{
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{
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@@ -879,7 +886,8 @@ static int ez80_i2c_transfer(FAR struct i2c_master_s *dev,
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next = &msgs[i + 1];
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next = &msgs[i + 1];
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if ((msg->flags & I2C_M_NOSTART) != 0 &&
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if ((msg->flags & I2C_M_NOSTART) != 0 &&
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(msg->flags & (I2C_M_READ | I2C_M_TEN)) == (next->flags & (I2C_M_READ | I2C_M_TEN)) &&
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(msg->flags & (I2C_M_READ | I2C_M_TEN)) ==
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(next->flags & (I2C_M_READ | I2C_M_TEN)) &&
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msg->addr == next->addr)
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msg->addr == next->addr)
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{
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{
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nostop = true;
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nostop = true;
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@@ -891,11 +899,13 @@ static int ez80_i2c_transfer(FAR struct i2c_master_s *dev,
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flags |= (nostop) ? EZ80_NOSTOP : 0;
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flags |= (nostop) ? EZ80_NOSTOP : 0;
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if ((msg->flags & I2C_M_READ) != 0)
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if ((msg->flags & I2C_M_READ) != 0)
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{
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{
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ret = ez80_i2c_read_transfer(priv, msg->buffer, msg->length, flags);
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ret = ez80_i2c_read_transfer(priv, msg->buffer, msg->length,
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flags);
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}
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}
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else
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else
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{
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{
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ret = ez80_i2c_write_transfer(priv, msg->buffer, msg->length, flags);
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ret = ez80_i2c_write_transfer(priv, msg->buffer, msg->length,
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flags);
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}
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}
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/* Check for I2C transfer errors */
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/* Check for I2C transfer errors */
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@@ -930,10 +940,10 @@ static int ez80_i2c_transfer(FAR struct i2c_master_s *dev,
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* different frequency and slave address.
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* different frequency and slave address.
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*
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*
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* Input Parameters:
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* Input Parameters:
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* Port number (for hardware that has mutiple I2C interfaces)
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* Port number (for hardware that has multiple I2C interfaces)
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*
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*
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* Returned Value:
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* Returned Value:
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* Valid I2C device structre reference on succcess; a NULL on failure
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* Valid I2C device structure reference on success; a NULL on failure
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*
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*
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****************************************************************************/
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****************************************************************************/
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@@ -947,7 +957,7 @@ FAR struct i2c_master_s *ez80_i2cbus_initialize(int port)
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{
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{
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/* Set up some initial BRG value */
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/* Set up some initial BRG value */
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ccr = ez80_i2c_getccr(100*1000);
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ccr = ez80_i2c_getccr(100 * 1000);
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ez80_i2c_setccr(ccr);
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ez80_i2c_setccr(ccr);
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/* No GPIO setup is required -- I2C pints, SCL/SDA are not multiplexed */
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/* No GPIO setup is required -- I2C pints, SCL/SDA are not multiplexed */
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@@ -965,8 +975,9 @@ FAR struct i2c_master_s *ez80_i2cbus_initialize(int port)
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/* Now, allocate an I2C instance for this caller */
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/* Now, allocate an I2C instance for this caller */
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i2c = (FAR struct ez80_i2cdev_s *)kmm_zalloc(sizeof(FAR struct ez80_i2cdev_s));
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i2c = (FAR struct ez80_i2cdev_s *)
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if (i2c)
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kmm_zalloc(sizeof(FAR struct ez80_i2cdev_s));
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if (i2c != NULL)
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{
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{
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/* Initialize the allocated instance */
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/* Initialize the allocated instance */
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