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Add support for STM32F107 OTG FS (doesn't work) and update USB support for Viewtools STM32F107~

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This commit is contained in:
Gregory Nutt
2013-12-26 09:22:37 -06:00
parent e963a4d862
commit 4922f71703
10 changed files with 268 additions and 32 deletions
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arch/arm/src/stm32/chip/stm32f10xxx_rcc.h
+2 -1
View File
@@ -164,7 +164,7 @@
# define RCC_CFGR_PLLMUL_CLKx15 (13 << RCC_CFGR_PLLMUL_SHIFT) /* 1101: PLL input clock x 15 */
# define RCC_CFGR_PLLMUL_CLKx16 (14 << RCC_CFGR_PLLMUL_SHIFT) /* 111x: PLL input clock x 16 */
#ifndef CONFIG_STM32_VALUELINE
# define RCC_CFGR_USBPRE (1 << 22) /* Bit 22: USB prescaler */
# define RCC_CFGR_USBPRE (1 << 22) /* Bit 22: USB/OTG FS prescaler */
#endif
#define RCC_CFGR_MCO_SHIFT (24) /* Bits 27-24: Microcontroller Clock Output */
#define RCC_CFGR_MCO_MASK (15 << RCC_CFGR_MCO_SHIFT)
@@ -272,6 +272,7 @@
# define RCC_AHBENR_SDIOEN (1 << 10) /* Bit 10: SDIO clock enable */
#endif
#ifdef CONFIG_STM32_CONNECTIVITYLINE
# define RCC_AHBENR_OTGFSEN (1 << 12) /* Bit 12: USB OTG FS clock enable */
# define RCC_AHBENR_ETHMACEN (1 << 14) /* Bit 14: Ethernet MAC clock enable */
# define RCC_AHBENR_ETHMACTXEN (1 << 15) /* Bit 15: Ethernet MAC TX clock enable */
# define RCC_AHBENR_ETHMACRXEN (1 << 16) /* Bit 16: Ethernet MAC RX clock enable */
arch/arm/src/stm32/stm32f10xxx_rcc.c
+16 -5
View File
@@ -148,10 +148,18 @@ static inline void rcc_enableahb(void)
regval |= RCC_AHBENR_SDIOEN;
#endif
#if defined(CONFIG_STM32_ETHMAC) && defined(CONFIG_STM32_CONNECTIVITYLINE)
#ifdef CONFIG_STM32_CONNECTIVITYLINE
#ifdef CONFIG_STM32_OTGFS
/* USB OTG FS clock enable */
regval |= RCC_AHBENR_OTGFSEN;
#endif
#ifdef CONFIG_STM32_ETHMAC
/* Ethernet clock enable */
regval |= (RCC_AHBENR_ETHMACEN | RCC_AHBENR_ETHMACTXEN | RCC_AHBENR_ETHMACRXEN);
#endif
#endif
putreg32(regval, STM32_RCC_AHBENR); /* Enable peripherals */
@@ -169,10 +177,13 @@ static inline void rcc_enableapb1(void)
{
uint32_t regval;
#ifdef CONFIG_STM32_USB
/* USB clock divider. This bit must be valid before enabling the USB
* clock in the RCC_APB1ENR register. This bit can’t be reset if the USB
* clock is enabled.
#if defined(CONFIG_STM32_USB) || defined(CONFIG_STM32_OTGFS)
/* USB clock divider for USB FD device or USB OTG FS (OTGFS naming for this
* bit is different, but it is the same bit.
*
* This bit must be valid before enabling the either the USB clock in the
* RCC_APB1ENR register ro the OTG FS clock in the AHBENR reigser. This
* bit can’t be reset if the USB clock is enabled.
*/
regval = getreg32(STM32_RCC_CFGR);