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Fix some bad syscall dispatching log. This change is not testable until these is a tested NuttX kernel build.
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5713 42af7a65-404d-4744-a932-0658087f49c3
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@@ -1,4 +1,4 @@
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NuttX TODO List (Last updated March 5, 2013)
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NuttX TODO List (Last updated March 6, 2013)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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This file summarizes known NuttX bugs, limitations, inconsistencies with
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@@ -21,7 +21,7 @@ nuttx/
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(1) Documentation (Documentation/)
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(7) Build system / Toolchains
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(5) Linux/Cywgin simulation (arch/sim)
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(5) ARM (arch/arm/)
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(4) ARM (arch/arm/)
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(1) ARM/C5471 (arch/arm/src/c5471/)
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(3) ARM/DM320 (arch/arm/src/dm320/)
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(2) ARM/i.MX (arch/arm/src/imx/)
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@@ -1161,7 +1161,7 @@ o ARM (arch/arm/)
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Priority: Low
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Title: ARM INTERRUPTS AND USER MODE
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Description: The ARM interrupt handling (arch/arm/src/arm/up_vectors.S) returns
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Description: The ARM7/9 interrupt handling (arch/arm/src/arm/up_vectors.S) returns
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using 'ldmia sp, {r0-r15}^' My understanding is that this works
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fine because everything is in kernel-mode. In an operating model
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where applications run in user mode and interrupts/traps run in
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@@ -1170,8 +1170,8 @@ o ARM (arch/arm/)
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is built as a monolithic, protected kernel and user mode programs
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trap into the kernel.
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Status: Open
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Priority: Low until I get around to implementng security or kernel mode for
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the ARM platform.
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Priority: Low until I get around to implementing security or kernel mode for
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an ARM7/9 platform.
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Title: CORTEX-M3 STACK OVERFLOW
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Description: There is bit bit logic inf up_fullcontextrestore() that executes on
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@@ -1211,20 +1211,6 @@ o ARM (arch/arm/)
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If your design needs continous interrupts like this, please try
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the above change and, please, submit a patch with the working fix.
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Title: KERNEL MODE ISSUES - HANDLERS
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Description: The is a design flaw in the ARM/Cortex trap handlers. Currently,
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they try to process the SYSCALL within the trap handler. That
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cannot work. There are two possibilities to fix this.
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1) Just enable interrupts in the trap handler and make sure that
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that sufficient protection is in place to handler the nested
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interrupts, or
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3) Return from the exception via a trampoline (such as is
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currently done for signal handlers). In the trampoline,
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the trap would processed in supervisor mode with interrupts
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enabled.
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Status: Open
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Priority: medium-high.
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o ARM/C5471 (arch/arm/src/c5471/)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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