From 44da2c0add3492cefcb7a3681e489210e43a710b Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Wed, 8 Jun 2016 07:52:19 -0600 Subject: [PATCH] Refactored configs/nucleo-144 sub-directories to support additional nucleo-144 board. Add support for the Nucleo-F767ZI board. --- ChangeLog | 3 + configs/Kconfig | 11 +- configs/README.txt | 9 +- configs/nucleo-144/Kconfig | 215 ++++ configs/nucleo-144/README.txt | 251 +++- configs/nucleo-144/f746-evalos/Make.defs | 114 ++ .../{evalos => f746-evalos}/defconfig | 0 .../{evalos => f746-evalos}/setenv.sh | 2 +- .../nucleo-144/{nsh => f746-nsh}/Make.defs | 7 +- .../nucleo-144/{nsh => f746-nsh}/defconfig | 147 ++- .../nucleo-144/{nsh => f746-nsh}/setenv.sh | 2 +- configs/nucleo-144/f767-evalos/Make.defs | 114 ++ configs/nucleo-144/f767-evalos/defconfig | 1047 +++++++++++++++++ configs/nucleo-144/f767-evalos/setenv.sh | 78 ++ .../nucleo-144/{evalos => f767-nsh}/Make.defs | 9 +- configs/nucleo-144/f767-nsh/defconfig | 1021 ++++++++++++++++ configs/nucleo-144/f767-nsh/setenv.sh | 77 ++ configs/nucleo-144/include/board.h | 176 +-- .../scripts/{flash.ld => f746-flash.ld} | 25 +- configs/nucleo-144/scripts/f767-flash.ld | 146 +++ configs/nucleo-144/src/Makefile | 11 +- configs/nucleo-144/src/nucleo-144.h | 145 ++- configs/nucleo-144/src/stm32_appinitialize.c | 51 +- configs/nucleo-144/src/stm32_autoleds.c | 132 ++- configs/nucleo-144/src/stm32_boot.c | 22 +- configs/nucleo-144/src/stm32_buttons.c | 12 +- configs/nucleo-144/src/stm32_dma_alloc.c | 117 ++ configs/nucleo-144/src/stm32_sdio.c | 176 +++ configs/nucleo-144/src/stm32_spi.c | 216 +++- configs/nucleo-144/src/stm32_userleds.c | 30 +- 30 files changed, 4077 insertions(+), 289 deletions(-) create mode 100644 configs/nucleo-144/f746-evalos/Make.defs rename configs/nucleo-144/{evalos => f746-evalos}/defconfig (100%) rename configs/nucleo-144/{evalos => f746-evalos}/setenv.sh (98%) rename configs/nucleo-144/{nsh => f746-nsh}/Make.defs (96%) rename configs/nucleo-144/{nsh => f746-nsh}/defconfig (82%) rename configs/nucleo-144/{nsh => f746-nsh}/setenv.sh (98%) create mode 100644 configs/nucleo-144/f767-evalos/Make.defs create mode 100644 configs/nucleo-144/f767-evalos/defconfig create mode 100644 configs/nucleo-144/f767-evalos/setenv.sh rename configs/nucleo-144/{evalos => f767-nsh}/Make.defs (96%) create mode 100644 configs/nucleo-144/f767-nsh/defconfig create mode 100644 configs/nucleo-144/f767-nsh/setenv.sh rename configs/nucleo-144/scripts/{flash.ld => f746-flash.ld} (83%) create mode 100644 configs/nucleo-144/scripts/f767-flash.ld create mode 100644 configs/nucleo-144/src/stm32_dma_alloc.c create mode 100644 configs/nucleo-144/src/stm32_sdio.c diff --git a/ChangeLog b/ChangeLog index bbd62c3cc0a..b3ea24e3796 100755 --- a/ChangeLog +++ b/ChangeLog @@ -11919,3 +11919,6 @@ * include/signal.h: Change type of SIG_ERR, SIG_IGN, ... to _sa_handler_t. They type void does not work with the IAR toolchain. From Aleksandr Vyhovanec (2016-06-07). + * Refactoring configs/nucleo-144 sub-directories to support additional + nucleo-144 board. Add support for the Nucleo-F767ZI board. From David + Sidrane (2016-06-08). diff --git a/configs/Kconfig b/configs/Kconfig index c8169d0086f..e4d6ec4e5fd 100644 --- a/configs/Kconfig +++ b/configs/Kconfig @@ -649,14 +649,17 @@ config ARCH_BOARD_PIRELLI_DPL10 config ARCH_BOARD_NUCLEO_144 bool "STMicro NUCLEO-144" - depends on ARCH_CHIP_STM32F746 + depends on ARCH_CHIP_STM32F746 || ARCH_CHIP_STM32F767 select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS ---help--- - STMicro Nucleo-144 development board featuring the STM32F746ZGT6U - MCU. The STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash - memory and 300Kb SRAM. + STMicro Nucleo-144 development board family. Included support for (1) the + Nucleo-F767ZG board featuring the STM32F746ZGT6U MCU. The STM32F746ZGT6U + is a 216MHz Cortex-M7 operation with 1024Kb Flash memory and 320Kb SRAM. + And (2) the Nucleo-F746ZG board featuring the STM32F767ZIT6 MCU. The + STM32F767ZIT6 is a 216MHz Cortex-M7 operation with 2048Kb Flash memory + and 512Kb SRAM. config ARCH_BOARD_NUCLEO_F303RE bool "STM32F303 Nucleo F303RE" diff --git a/configs/README.txt b/configs/README.txt index 9b1c8486bac..45f06d0fa0e 100644 --- a/configs/README.txt +++ b/configs/README.txt @@ -393,9 +393,12 @@ configs/ntosd-dm320 NuttX 0.2.1 release. configs/nucleo-144 - STMicro Nucleo-144 development board featuring the STM32F746ZGT6U MCU. The - STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash memory - and 300Kb SRAM. + STMicro Nucleo-144 development board family. Included support for (1) the + Nucleo-F767ZG board featuring the STM32F746ZGT6U MCU. The STM32F746ZGT6U + is a 216MHz Cortex-M7 operation with 1024Kb Flash memory and 320Kb SRAM. + And (2) the Nucleo-F746ZG board featuring the STM32F767ZIT6 MCU. The + STM32F767ZIT6 is a 216MHz Cortex-M7 operation with 2048Kb Flash memory + and 512Kb SRAM. configs/nucleo-f4x1re STMicro ST Nucleo F401RE and F411RE boards. See diff --git a/configs/nucleo-144/Kconfig b/configs/nucleo-144/Kconfig index 57585efaff0..96427a9a5e2 100644 --- a/configs/nucleo-144/Kconfig +++ b/configs/nucleo-144/Kconfig @@ -5,4 +5,219 @@ if ARCH_BOARD_NUCLEO_144 +choice + prompt "Select Console wiring." + default NUCLEO_ARDUINO + ---help--- + Select where you will connect the console. + + Virtual COM Port: + + Advantage: Use the ST-Link as a console. No Extra wiring + neded. + + Disdvantage: Not the best choice for initanl bring up. + + ARDUINO Connector: + + Advantage: You have a shield so it is + easy. + + Disdvantage: You loose the use of the + other functions on PC6, PC7 + + STM32F7 + ARDUIONO FUNCTION GPIO + -- ----- --------- ---- + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + -- ----- --------- --- + + OR + + Morpho Connector: + + STM32F7 + MORPHO FUNCTION GPIO + -------- --------- ----- + CN12-64 USART8_RX PE0 + CN11-61 USART8_TX PE1 + -------- --------- ----- + +config NUCLEO_CONSOLE_ARDUINO + bool "ARDUINO Connector" + select STM32F7_USART6 + select USART6_SERIALDRIVER + select USART6_SERIAL_CONSOLE + +config NUCLEO_CONSOLE_VIRTUAL + bool "Virtual Comport" + select STM32F7_USART3 + select USART3_SERIALDRIVER + select USART3_SERIAL_CONSOLE + +config NUCLEO_CONSOLE_MORPHO + bool "Morpho Connector" + select STM32F7_UART8 + select UART8_SERIALDRIVER + select UART8_SERIAL_CONSOLE + +config NUCLEO_CONSOLE_NONE + bool "No Console" + +endchoice # "Select Console wiring" + +config NUCLEO_SPI_TEST + bool "Enable SPI test" + default n + ---help--- + Enable Spi test - initalize and configure SPI to send + NUCLEO_SPI_TEST_MESSAGE text. The text is sent on the + selected SPI Buses with the configured parameters. + Note the CS lines will not be asserted. + +if NUCLEO_SPI_TEST + +config NUCLEO_SPI_TEST_MESSAGE + string "Text to Send on SPI Bus(es)" + default "Hello World" + depends on NUCLEO_SPI_TEST + ---help--- + Text to sent on SPI bus(es) + +config NUCLEO_SPI1_TEST + bool "Test SPI bus 1" + default n + depends on NUCLEO_SPI_TEST + ---help--- + Enable Spi test - on SPI BUS 1 + +if NUCLEO_SPI1_TEST + +config NUCLEO_SPI1_TEST_FREQ + int "SPI 1 Clock Freq in Hz" + default 1000000 + depends on NUCLEO_SPI1_TEST + ---help--- + Sets SPI 1 Clock Freq + +config NUCLEO_SPI1_TEST_BITS + int "SPI 1 number of bits" + default 8 + depends on NUCLEO_SPI1_TEST + ---help--- + Sets SPI 1 bit length + +choice + prompt "SPI BUS 1 Clock Mode" + default NUCLEO_SPI1_TEST_MODE3 + ---help--- + Sets SPI 1 clock mode + +config NUCLEO_SPI1_TEST_MODE0 + bool "CPOL=0 CHPHA=0" + +config NUCLEO_SPI1_TEST_MODE1 + bool "CPOL=0 CHPHA=1" + +config NUCLEO_SPI1_TEST_MODE2 + bool "CPOL=1 CHPHA=0" + +config NUCLEO_SPI1_TEST_MODE3 + bool "CPOL=1 CHPHA=1" + +endchoice # "SPI BUS 1 Clock Mode" + +endif # NUCLEO_SPI1_TEST + +config NUCLEO_SPI2_TEST + bool "Test SPI bus 2" + default n + depends on NUCLEO_SPI_TEST + ---help--- + Enable Spi test - on SPI BUS 2 + +if NUCLEO_SPI2_TEST + +config NUCLEO_SPI2_TEST_FREQ + int "SPI 2 Clock Freq in Hz" + default 12000000 + depends on NUCLEO_SPI2_TEST + ---help--- + Sets SPI 2 Clock Freq + +config NUCLEO_SPI2_TEST_BITS + int "SPI 2 number of bits" + default 8 + depends on NUCLEO_SPI2_TEST + ---help--- + Sets SPI 2 bit length + +choice + prompt "SPI BUS 2 Clock Mode" + default NUCLEO_SPI2_TEST_MODE3 + ---help--- + Sets SPI 2 clock mode + +config NUCLEO_SPI2_TEST_MODE0 + bool "CPOL=0 CHPHA=0" + +config NUCLEO_SPI2_TEST_MODE1 + bool "CPOL=0 CHPHA=1" + +config NUCLEO_SPI2_TEST_MODE2 + bool "CPOL=1 CHPHA=0" + +config NUCLEO_SPI2_TEST_MODE3 + bool "CPOL=1 CHPHA=1" + +endchoice # "SPI BUS 2 Clock Mode" + +endif # NUCLEO_SPI2_TEST + +config NUCLEO_SPI3_TEST + bool "Test SPI bus 3" + default n + depends on NUCLEO_SPI_TEST + ---help--- + Enable Spi test - on SPI BUS 3 + +if NUCLEO_SPI3_TEST + +config NUCLEO_SPI3_TEST_FREQ + int "SPI 3 Clock Freq in Hz" + default 40000000 + depends on NUCLEO_SPI3_TEST + ---help--- + Sets SPI 3 Clock Freq + +config NUCLEO_SPI3_TEST_BITS + int "SPI 3 number of bits" + default 8 + depends on NUCLEO_SPI3_TEST + ---help--- + Sets SPI 3 bit length + +choice + prompt "SPI BUS 3 Clock Mode" + default NUCLEO_SPI3_TEST_MODE3 + ---help--- + Sets SPI 3 clock mode + +config NUCLEO_SPI3_TEST_MODE0 + bool "CPOL=0 CHPHA=0" + +config NUCLEO_SPI3_TEST_MODE1 + bool "CPOL=0 CHPHA=1" + +config NUCLEO_SPI3_TEST_MODE2 + bool "CPOL=1 CHPHA=0" + +config NUCLEO_SPI3_TEST_MODE3 + bool "CPOL=1 CHPHA=1" + +endchoice # "SPI BUS 3 Clock Mode" + +endif # NUCLEO_SPI3_TEST +endif # NUCLEO_SPI_TEST endif # ARCH_BOARD_NUCLEO_144 diff --git a/configs/nucleo-144/README.txt b/configs/nucleo-144/README.txt index e99cd427de3..1a5d6f4b3b6 100644 --- a/configs/nucleo-144/README.txt +++ b/configs/nucleo-144/README.txt @@ -11,6 +11,7 @@ Contents - Nucleo-144 Boards - Nucleo F746ZG + - Nucleo F767ZI - Development Environment - IDEs - Basic configuaration & build steps @@ -18,7 +19,11 @@ Contents - Button - LED - U[S]ARTs and Serial Consoles + - SPI + - SDIO - MMC - Configurations + f7xx-nsh + f7xx-evalos Nucleo-144 Boards: ================= @@ -63,7 +68,7 @@ Common Board Features: Nucleo F746ZG ============= -At present only the ST Nucleo F746ZG board from ST Micro is supported. See +ST Nucleo F746ZG board from ST Micro is supported. See http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-f746zg.html @@ -80,7 +85,7 @@ NUCLEO-F746ZG Features: + 16KB of instruction TCM RAM + 4KB of backup SRAM ADC: 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode - DMA: 16-stream DMA controllers with FIFOs and burst support + DMA: 2 X 16-stream DMA controllers with FIFOs and burst support Timers: Up to 18 timers: up to thirteen 16-bit (1x 16-bit lowpower), two 32-bit timers, 2x watchdogs, SysTick GPIO: 114 I/O ports with interrupt capability @@ -105,9 +110,58 @@ NUCLEO-F746ZG Features: TRG: True random number generator RTC -See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG form additional +See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG for additional information about this board. +Nucleo F767ZI +============= + +ST Nucleo F7467ZI board from ST Micro is supported. See + +http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-f767zi.html + +The Nucleo F767ZI order part number is NUCLEO-F767ZI. It is one member of +the STM32 Nucleo-144 board family. + +NUCLEO-F767ZI Features: +---------------------- + + Microprocessor: STM32F767ZIT6 Core: ARM 32-bit Cortex®-M7 CPU with DPFPU, + L1-cache: 16KB data cache and 16KB instruction cache, up to + 216 MHz, MPU, and DSP instructions. + Memory: 2048 KB Flash 512KB of SRAM (including 128KB of data TCM RAM) + + 16KB of instruction TCM RAM + 4KB of backup SRAM + ADC: 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in + triple interleaved mode + DMA: 2 X 16-stream DMA controllers with FIFOs and burst support + Timers: Up to 18 timers: up to thirteen 16-bit (1x 16-bit lowpower), + two 32-bit timers, 2x watchdogs, SysTick + GPIO: 114 I/O ports with interrupt capability + LCD: LCD-TFT Controllerwith (DMA2D), Parallel interface + I2C: 4 × I2C interfaces (SMBus/PMBus) + U[S]ARTs: 4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA, + modem control) + SPI/12Ss: 6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S + for audio class accuracy via internal audio PLL or external + clock + QSPI: Dual mode Quad-SPI + SAIs: 2 Serial Audio Interfaces + CAN: 3 X CAN interface + SDMMC interface + SPDIFRX interface + USB: USB 2.0 full/High-speed device/host/OTG controller with on-chip + PHY + 10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware, + MII/RMII + Camera Interface: 8/14 Bit + CRC calculation unit + TRG: True random number generator + RTC subsecond accuracy, hardware calendar + +As of this writting the NUCLEO-F767ZI is not available on developer.mbed.org +However, See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG for additional +useful information. + Development Environment ======================= @@ -154,8 +208,8 @@ Basic configuration & build steps Hardware ======== - GPIO - there are 144 I/O lines on the STM32F746ZGT6 with various pins pined out - on the Nucleo F746ZG. + GPIO - there are 144 I/O lines on the STM32F7xxZxT6 with various pins pined out + on the Nucleo 144. See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic pinouts. @@ -168,19 +222,47 @@ Hardware Our main concern is establishing a console and LED utilization for debugging. Because so many pins can be multiplexed with so many functions, - the above mentioned graphic is super helpful in indentifying a serial port - that will not rob us of another IO feature. Namely Serial Port 8 (UART8) - with TX on PE1 and RX on PE0. Of course if your design has used those - pins you can choose another IO configuration to bring out Serial Port 8 - or choose a completely different U[S]ART to use as the console. - In that Case, You will need to edit the include/board.h to select different - U[S]ART and / or pin selections. + the above mentioned graphic may be helpful in indentifying a serial port. - Serial - ------ + There are 4 choices that can be made from the menuconfig: - SERIAL_RX PE_0 - SERIAL_TX PE_1 + CONFIG_NUCLEO_CONSOLE_ARDUINO or CONFIG_NUCLEO_CONSOLE_MORPHO or + CONFIG_NUCLEO_CONSOLE_VIRTUAL or CONFIG_NUCLEO_CONSOLE_NONE + + The CONFIG_NUCLEO_CONSOLE_NONE makes no preset for the console. YOu shuld still visit + the U[S]ART selection and Device Drivers to disable any U[S]ART reamaing. + + The CONFIG_NUCLEO_CONSOLE_ARDUINO configurations assume that you are using a + standard Arduio RS-232 shield with the serial interface with RX on pin D0 and + TX on pin D1 from USART6: + + -------- --------------- + STM32F7 + ARDUIONO FUNCTION GPIO + -- ----- --------- ----- + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + -- ----- --------- ----- + + The CONFIG_NUCLEO_CONSOLE_MORPHO configurations uses Serial Port 8 (USART8) + with TX on PE1 and RX on PE0. + Serial + ------ + SERIAL_RX PE_0 + SERIAL_TX PE_1 + + The CONFIG_NUCLEO_CONSOLE_VIRTUAL configurations uses Serial Port 3 (USART3) + with TX on PD8 and RX on PD9. + Serial + ------ + SERIAL_RX PD9 + SERIAL_TX PD8 + + These signals are internalaly connected to the on board ST-Link + + Of course if your design has used those pins you can choose a completely + different U[S]ART to use as the console. In that Case, you will need to edit + the include/board.h to select different U[S]ART and / or pin selections. Buttons ------- @@ -202,32 +284,36 @@ Hardware include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS related events as follows when the LEDs are available: - SYMBOL Meaning RED GREEN BLUE - ------------------- ----------------------- ----------- + SYMBOL Meaning RED GREEN BLUE + ------------------- ----------------------- --- ----- ---- - LED_STARTED 0 OFF OFF OFF - LED_HEAPALLOCATE 0 OFF OFF OFF - LED_IRQSENABLED 0 OFF OFF OFF - LED_STACKCREATED 1 OFF ON OFF - LED_INIRQ 2 NC NC ON (momentary) - LED_SIGNAL 2 NC NC ON (momentary) - LED_ASSERTION 3 ON NC NC (momentary) - LED_PANIC 4 ON OFF OFF (flashing 2Hz) + LED_STARTED NuttX has been started OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + LED_IRQSENABLED Interrupts enabled OFF ON OFF + LED_STACKCREATED Idle stack created OFF ON ON + LED_INIRQ In an interrupt NC NC ON (momentary) + LED_SIGNAL In a signal handler NC ON OFF (momentary) + LED_ASSERTION An assertion failed ON NC ON (momentary) + LED_PANIC The system has crashed ON OFF OFF (flashing 2Hz) + LED_IDLE MCU is is sleep mode ON OFF OFF -OFF - means that the OS is still initializing. Initialization is very fast so - if you see this at all, it probably means that the system is hanging up - somewhere in the initialization phases. -GREEN - This means that the OS completed initialization. +OFF - means that the OS is still initializing. Initialization is very fast + so if you see this at all, it probably means that the system is + hanging up somewhere in the initialization phases. -BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is - illuminated and extinguished when the interrupt or signal handler exits. +GREEN - This means that the OS completed initialization. -RED - If a recovered assertion occurs, the RED LED will be illuminated - briefly while the assertion is handled. You will probably never see this. +BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is + illuminated and extinguished when the interrupt or signal handler + exits. + +VIOLET - If a recovered assertion occurs, the RED and blue LED will be + illuminated briefly while the assertion is handled. You will + probably never see this. Flashing RED - In the event of a fatal crash, all other LEDs will be -extinguished and RED LED will FLASH at a 2Hz rate. + extinguished and RED LED will FLASH at a 2Hz rate. Thus if the GREEN LED is lit, NuttX has successfully booted and is, @@ -238,30 +324,67 @@ extinguished and RED LED will FLASH at a 2Hz rate. Serial Consoles =============== - USART8 + USART6 (CONFIG_NUCLEO_CONSOLE_ARDUINO) ------ - Pins and Connectors: - GPIO Connector NAME - RXD: PE0 CN11 pin 64, PE0 - CN10 pin 33, D34 - - TXD: PE1 CN11 pin 61, PE1 + STM32F7 + ARDUIONO FUNCTION GPIO + -- ----- --------- ----- + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + -- ----- --------- ----- You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL Nucleo 144 FTDI TTL-232R-3V3 - ----------- ------------ - TXD - CN11 pin 64 - RXD - Pin 5 (Yellow) - RXD - CN11 pin 61 - TXD - Pin 4 (Orange) - GND CN11 pin 63 GND Pin 1 (Black) + ------------- ------------------- + TXD - D1-TXD - RXD - Pin 5 (Yellow) + RXD - D0-RXD - TXD - Pin 4 (Orange) + GND GND - GND Pin 1 (Black) + ------------- ------------------- + + *Note you will be reverse RX/TX + + Use make menuconfig to configure USART6 as the console: + + CONFIG_STM32F7_USART6=y + CONFIG_USARTs_SERIALDRIVER=y + CONFIG_USARTS_SERIAL_CONSOLE=y + CONFIG_USART6_RXBUFSIZE=256 + CONFIG_USART6_TXBUFSIZE=256 + CONFIG_USART6_BAUD=115200 + CONFIG_USART6_BITS=8 + CONFIG_USART6_PARITY=0 + CONFIG_USART6_2STOP=0 + + USART8 (CONFIG_NUCLEO_CONSOLE_MORPHO) + ------ + + Pins and Connectors: + FUNC GPIO Connector + Pin NAME + ---- --- ------- ---- + TXD: PE1 CN11-61, PE1 + RXD: PE0 CN12-64, PE0 + CN10-33, D34 + ---- --- ------- ---- + + + You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL + + Nucleo 144 FTDI TTL-232R-3V3 + ------------- ------------------- + TXD - CN11-61 - RXD - Pin 5 (Yellow) + RXD - CN12-64 - TXD - Pin 4 (Orange) + GND CN12-63 - GND Pin 1 (Black) + ------------- ------------------- *Note you will be reverse RX/TX Use make menuconfig to configure USART8 as the console: CONFIG_STM32F7_UART8=y - CONFIG_USART8_SERIALDRIVER=y - CONFIG_USART8_SERIAL_CONSOLE=y + CONFIG_UART8_SERIALDRIVER=y + CONFIG_UART8_SERIAL_CONSOLE=y CONFIG_UART8_RXBUFSIZE=256 CONFIG_UART8_TXBUFSIZE=256 CONFIG_UART8_BAUD=115200 @@ -269,7 +392,7 @@ Serial Consoles CONFIG_UART8_PARITY=0 CONFIG_UART8_2STOP=0 - Virtual COM Port + Virtual COM Port (CONFIG_NUCLEO_CONSOLE_VIRTUAL) ---------------- Yet another option is to use USART3 and the USB virtual COM port. This option may be more convenient for long term development, but is painful @@ -290,14 +413,38 @@ Serial Consoles As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the virtual COM port is enabled. + +SPI +--- + Since this board is so generic, having a quick way to vet the SPI + configuration seams in order. So the board provides a quick test + that can be selected vi CONFIG_NUCLEO_SPI_TEST that will initalise + the selected buses (SPI1-SPI3) and send some text on the bus at + application initalization time board_app_initialize. + +SDIO +---- + To test the SD performace one can use a SparkFun microSD Sniffer + from https://www.sparkfun.com/products/9419 or similar board + and connect it as follows: + + VCC V3.3 CN11 16 + GND GND CN11-8 + CMD PD2 CN11-4 + CLK PC12 CN11-3 + DAT0 - PC8 CN12-2 + DAT1 - PC9 CN12-1 + DAT2 PC10 CN11-1 + CD PC11 CN11-2 + Configurations ============== -nsh: +f7xx-nsh: ---- Configures the NuttShell (nsh) located at apps/examples/nsh for the Nucleo-144 boards. The Configuration enables the serial interfaces - on UART6. Support for builtin applications is enabled, but in the base + on USART6. Support for builtin applications is enabled, but in the base configuration no builtin applications are selected (see NOTES below). NOTES: @@ -333,7 +480,7 @@ nsh: device configured for UART8 (see instruction above under "Serial Consoles). -evalos: +f7xx-evalos: ------- This configuration is designed to test the features of the board. - Configures the NuttShell (nsh) located at apps/examples/nsh for the diff --git a/configs/nucleo-144/f746-evalos/Make.defs b/configs/nucleo-144/f746-evalos/Make.defs new file mode 100644 index 00000000000..62c52e12f47 --- /dev/null +++ b/configs/nucleo-144/f746-evalos/Make.defs @@ -0,0 +1,114 @@ +############################################################################ +# configs/nucleo-144/f746-evalos/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Authors: Gregory Nutt +# Mark Olsson +# David Sidrane +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = f746-flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/nucleo-144/evalos/defconfig b/configs/nucleo-144/f746-evalos/defconfig similarity index 100% rename from configs/nucleo-144/evalos/defconfig rename to configs/nucleo-144/f746-evalos/defconfig diff --git a/configs/nucleo-144/evalos/setenv.sh b/configs/nucleo-144/f746-evalos/setenv.sh similarity index 98% rename from configs/nucleo-144/evalos/setenv.sh rename to configs/nucleo-144/f746-evalos/setenv.sh index 0f767948bf4..84db5f90ee3 100644 --- a/configs/nucleo-144/evalos/setenv.sh +++ b/configs/nucleo-144/f746-evalos/setenv.sh @@ -1,5 +1,5 @@ #!/bin/bash -# configs/nucleo-144/evalos/setenv.sh +# configs/nucleo-144/f746-evalos/setenv.sh # # Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt diff --git a/configs/nucleo-144/nsh/Make.defs b/configs/nucleo-144/f746-nsh/Make.defs similarity index 96% rename from configs/nucleo-144/nsh/Make.defs rename to configs/nucleo-144/f746-nsh/Make.defs index 45b3f5f4aee..758b9eadb85 100644 --- a/configs/nucleo-144/nsh/Make.defs +++ b/configs/nucleo-144/f746-nsh/Make.defs @@ -1,8 +1,9 @@ ############################################################################ -# configs/nucleo-144/nsh/Make.defs +# configs/nucleo-144/f746-nsh/Make.defs # # Copyright (C) 2016 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt +# Authors: Gregory Nutt +# David Sidrane # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions @@ -37,7 +38,7 @@ include ${TOPDIR}/.config include ${TOPDIR}/tools/Config.mk include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs -LDSCRIPT = flash.ld +LDSCRIPT = f746-flash.ld ifeq ($(WINTOOL),y) # Windows-native toolchains diff --git a/configs/nucleo-144/nsh/defconfig b/configs/nucleo-144/f746-nsh/defconfig similarity index 82% rename from configs/nucleo-144/nsh/defconfig rename to configs/nucleo-144/f746-nsh/defconfig index cb59abca25c..b8bcde84fec 100644 --- a/configs/nucleo-144/nsh/defconfig +++ b/configs/nucleo-144/f746-nsh/defconfig @@ -24,7 +24,7 @@ CONFIG_BUILD_FLAT=y # Binary Output Formats # # CONFIG_RRLOAD_BINARY is not set -CONFIG_INTELHEX_BINARY=y +# CONFIG_INTELHEX_BINARY is not set # CONFIG_MOTOROLA_SREC is not set CONFIG_RAW_BINARY=y # CONFIG_UBOOT_UIMAGE is not set @@ -45,7 +45,7 @@ CONFIG_RAW_BINARY=y # CONFIG_DEBUG is not set CONFIG_ARCH_HAVE_HEAPCHECK=y CONFIG_ARCH_HAVE_STACKCHECK=y -# CONFIG_STACK_COLORATION is not set +CONFIG_STACK_COLORATION=y CONFIG_DEBUG_SYMBOLS=y CONFIG_ARCH_HAVE_CUSTOMOPT=y CONFIG_DEBUG_NOOPT=y @@ -124,7 +124,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set CONFIG_ARCH_HAVE_FPU=y -CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y @@ -151,22 +151,118 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARMV7M_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set # CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USART6_RS485 is not set +CONFIG_SERIAL_DISABLE_REORDERING=y # # STM32 F7 Configuration Options # -# CONFIG_ARCH_CHIP_STM32F745 is not set -CONFIG_ARCH_CHIP_STM32F746=y -# CONFIG_ARCH_CHIP_STM32F756 is not set +# CONFIG_ARCH_CHIP_STM32F745VG is not set +# CONFIG_ARCH_CHIP_STM32F745VE is not set +# CONFIG_ARCH_CHIP_STM32F745IG is not set +# CONFIG_ARCH_CHIP_STM32F745IE is not set +# CONFIG_ARCH_CHIP_STM32F745ZE is not set +# CONFIG_ARCH_CHIP_STM32F745ZG is not set +# CONFIG_ARCH_CHIP_STM32F746BG is not set +# CONFIG_ARCH_CHIP_STM32F746VG is not set +# CONFIG_ARCH_CHIP_STM32F746VE is not set +# CONFIG_ARCH_CHIP_STM32F746BE is not set +CONFIG_ARCH_CHIP_STM32F746ZG=y +# CONFIG_ARCH_CHIP_STM32F746IE is not set +# CONFIG_ARCH_CHIP_STM32F746NG is not set +# CONFIG_ARCH_CHIP_STM32F746NE is not set +# CONFIG_ARCH_CHIP_STM32F746ZE is not set +# CONFIG_ARCH_CHIP_STM32F746IG is not set +# CONFIG_ARCH_CHIP_STM32F756NG is not set +# CONFIG_ARCH_CHIP_STM32F756BG is not set +# CONFIG_ARCH_CHIP_STM32F756IG is not set +# CONFIG_ARCH_CHIP_STM32F756VG is not set +# CONFIG_ARCH_CHIP_STM32F756ZG is not set +# CONFIG_ARCH_CHIP_STM32F765NI is not set +# CONFIG_ARCH_CHIP_STM32F765VI is not set +# CONFIG_ARCH_CHIP_STM32F765VG is not set +# CONFIG_ARCH_CHIP_STM32F765BI is not set +# CONFIG_ARCH_CHIP_STM32F765NG is not set +# CONFIG_ARCH_CHIP_STM32F765ZG is not set +# CONFIG_ARCH_CHIP_STM32F765ZI is not set +# CONFIG_ARCH_CHIP_STM32F765IG is not set +# CONFIG_ARCH_CHIP_STM32F765BG is not set +# CONFIG_ARCH_CHIP_STM32F765II is not set +# CONFIG_ARCH_CHIP_STM32F767NG is not set +# CONFIG_ARCH_CHIP_STM32F767IG is not set +# CONFIG_ARCH_CHIP_STM32F767VG is not set +# CONFIG_ARCH_CHIP_STM32F767ZG is not set +# CONFIG_ARCH_CHIP_STM32F767NI is not set +# CONFIG_ARCH_CHIP_STM32F767VI is not set +# CONFIG_ARCH_CHIP_STM32F767BG is not set +# CONFIG_ARCH_CHIP_STM32F767ZI is not set +# CONFIG_ARCH_CHIP_STM32F767II is not set +# CONFIG_ARCH_CHIP_STM32F769BI is not set +# CONFIG_ARCH_CHIP_STM32F769II is not set +# CONFIG_ARCH_CHIP_STM32F769BG is not set +# CONFIG_ARCH_CHIP_STM32F769NI is not set +# CONFIG_ARCH_CHIP_STM32F769AI is not set +# CONFIG_ARCH_CHIP_STM32F769NG is not set +# CONFIG_ARCH_CHIP_STM32F769IG is not set +# CONFIG_ARCH_CHIP_STM32F777ZI is not set +# CONFIG_ARCH_CHIP_STM32F777VI is not set +# CONFIG_ARCH_CHIP_STM32F777NI is not set +# CONFIG_ARCH_CHIP_STM32F777BI is not set +# CONFIG_ARCH_CHIP_STM32F777II is not set +# CONFIG_ARCH_CHIP_STM32F778AI is not set +# CONFIG_ARCH_CHIP_STM32F779II is not set +# CONFIG_ARCH_CHIP_STM32F779NI is not set +# CONFIG_ARCH_CHIP_STM32F779BI is not set +# CONFIG_ARCH_CHIP_STM32F779AI is not set CONFIG_STM32F7_STM32F74XX=y # CONFIG_STM32F7_STM32F75XX is not set -# CONFIG_STM32F7_FLASH_512KB is not set -CONFIG_STM32F7_FLASH_1024KB=y +# CONFIG_STM32F7_STM32F76XX is not set +# CONFIG_STM32F7_STM32F77XX is not set +# CONFIG_STM32F7_IO_CONFIG_V is not set +# CONFIG_STM32F7_IO_CONFIG_I is not set +CONFIG_STM32F7_IO_CONFIG_Z=y +# CONFIG_STM32F7_IO_CONFIG_N is not set +# CONFIG_STM32F7_IO_CONFIG_B is not set +# CONFIG_STM32F7_IO_CONFIG_A is not set +# CONFIG_STM32F7_STM32F745XX is not set +CONFIG_STM32F7_STM32F746XX=y +# CONFIG_STM32F7_STM32F756XX is not set +# CONFIG_STM32F7_STM32F765XX is not set +# CONFIG_STM32F7_STM32F767XX is not set +# CONFIG_STM32F7_STM32F768XX is not set +# CONFIG_STM32F7_STM32F768AX is not set +# CONFIG_STM32F7_STM32F769XX is not set +# CONFIG_STM32F7_STM32F769AX is not set +# CONFIG_STM32F7_STM32F777XX is not set +# CONFIG_STM32F7_STM32F778XX is not set +# CONFIG_STM32F7_STM32F778AX is not set +# CONFIG_STM32F7_STM32F779XX is not set +# CONFIG_STM32F7_STM32F779AX is not set +# CONFIG_STM32F7_FLASH_CONFIG_E is not set +# CONFIG_STM32F7_FLASH_CONFIG_I is not set +CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y +# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set # # STM32 Peripheral Support # CONFIG_STM32F7_HAVE_LTDC=y +CONFIG_STM32F7_HAVE_FSMC=y +CONFIG_STM32F7_HAVE_ETHRNET=y +CONFIG_STM32F7_HAVE_RNG=y +CONFIG_STM32F7_HAVE_SPI5=y +CONFIG_STM32F7_HAVE_SPI6=y +# CONFIG_STM32F7_HAVE_SDMMC2 is not set +# CONFIG_STM32F7_HAVE_CAN3 is not set +CONFIG_STM32F7_HAVE_DCMI=y +# CONFIG_STM32F7_HAVE_DSIHOST is not set +CONFIG_STM32F7_HAVE_DMA2D=y +# CONFIG_STM32F7_HAVE_JPEG is not set +# CONFIG_STM32F7_HAVE_CRYP is not set +# CONFIG_STM32F7_HAVE_HASH is not set +# CONFIG_STM32F7_HAVE_DFSDM1 is not set # CONFIG_STM32F7_ADC is not set # CONFIG_STM32F7_CAN is not set # CONFIG_STM32F7_DAC is not set @@ -183,12 +279,12 @@ CONFIG_STM32F7_USART=y # CONFIG_STM32F7_CAN2 is not set # CONFIG_STM32F7_CEC is not set # CONFIG_STM32F7_CRC is not set -# CONFIG_STM32F7_CRYP is not set # CONFIG_STM32F7_DMA1 is not set # CONFIG_STM32F7_DMA2 is not set # CONFIG_STM32F7_DAC1 is not set # CONFIG_STM32F7_DAC2 is not set # CONFIG_STM32F7_DCMI is not set +# CONFIG_STM32F7_DMA2D is not set # CONFIG_STM32F7_ETHMAC is not set # CONFIG_STM32F7_FSMC is not set # CONFIG_STM32F7_I2C1 is not set @@ -196,12 +292,11 @@ CONFIG_STM32F7_USART=y # CONFIG_STM32F7_I2C3 is not set # CONFIG_STM32F7_LPTIM1 is not set # CONFIG_STM32F7_LTDC is not set -# CONFIG_STM32F7_DMA2D is not set # CONFIG_STM32F7_OTGFS is not set # CONFIG_STM32F7_OTGHS is not set # CONFIG_STM32F7_QUADSPI is not set -# CONFIG_STM32F7_SAI1 is not set # CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI1 is not set # CONFIG_STM32F7_SAI2 is not set # CONFIG_STM32F7_SDMMC1 is not set # CONFIG_STM32F7_SPDIFRX is not set @@ -236,6 +331,13 @@ CONFIG_STM32F7_USART6=y # CONFIG_STM32F7_UART8 is not set # CONFIG_STM32F7_IWDG is not set # CONFIG_STM32F7_WWDG is not set + +# +# U[S]ART Configuration +# +CONFIG_STM32F7_FLOWCONTROL_BROKEN=y +CONFIG_STM32F7_USART_BREAKS=y +CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y # CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set # @@ -299,7 +401,6 @@ CONFIG_RAM_SIZE=245760 # # Board Selection # -# CONFIG_ARCH_BOARD_STM32F746G_DISCO is not set CONFIG_ARCH_BOARD_NUCLEO_144=y # CONFIG_ARCH_BOARD_CUSTOM is not set CONFIG_ARCH_BOARD="nucleo-144" @@ -318,6 +419,11 @@ CONFIG_NSH_MMCSDMINOR=0 # # Board-Specific Options # +CONFIG_NUCLEO_CONSOLE_ARDUINO=y +# CONFIG_NUCLEO_CONSOLE_VIRTUAL is not set +# CONFIG_NUCLEO_CONSOLE_MORPHO is not set +# CONFIG_NUCLEO_CONSOLE_NONE is not set +# CONFIG_NUCLEO_SPI_TEST is not set # CONFIG_LIB_BOARDCTL is not set # @@ -337,9 +443,9 @@ CONFIG_USEC_PER_TICK=10000 # CONFIG_SYSTEM_TIME64 is not set # CONFIG_CLOCK_MONOTONIC is not set # CONFIG_JULIAN_TIME is not set -CONFIG_START_YEAR=2011 -CONFIG_START_MONTH=12 -CONFIG_START_DAY=6 +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 CONFIG_MAX_WDOGPARMS=2 CONFIG_PREALLOC_WDOGS=4 CONFIG_WDOG_INTRESERVE=0 @@ -464,7 +570,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -506,10 +617,6 @@ CONFIG_USART6_SERIALDRIVER=y # CONFIG_USART7_SERIALDRIVER is not set # CONFIG_USART8_SERIALDRIVER is not set # CONFIG_OTHER_UART_SERIALDRIVER is not set - -# -# USART Configuration -# CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -777,6 +884,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -903,5 +1011,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set # CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set # CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-144/nsh/setenv.sh b/configs/nucleo-144/f746-nsh/setenv.sh similarity index 98% rename from configs/nucleo-144/nsh/setenv.sh rename to configs/nucleo-144/f746-nsh/setenv.sh index 8498950aed9..6a5fa6c8011 100644 --- a/configs/nucleo-144/nsh/setenv.sh +++ b/configs/nucleo-144/f746-nsh/setenv.sh @@ -1,5 +1,5 @@ #!/bin/bash -# configs/nucleo-144/nsh/setenv.sh +# configs/nucleo-144/f746-nsh/setenv.sh # # Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt diff --git a/configs/nucleo-144/f767-evalos/Make.defs b/configs/nucleo-144/f767-evalos/Make.defs new file mode 100644 index 00000000000..3e25864217f --- /dev/null +++ b/configs/nucleo-144/f767-evalos/Make.defs @@ -0,0 +1,114 @@ +############################################################################ +# configs/nucleo-144/f767-evalos/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Authors: Gregory Nutt +# Mark Olsson +# David Sidrane +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = f767-flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/nucleo-144/f767-evalos/defconfig b/configs/nucleo-144/f767-evalos/defconfig new file mode 100644 index 00000000000..e4165fa20d3 --- /dev/null +++ b/configs/nucleo-144/f767-evalos/defconfig @@ -0,0 +1,1047 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +CONFIG_ARCH_CHIP_STM32F7=y +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32f7" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +CONFIG_ARMV7M_DTCM=y +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USART3_RS485 is not set +CONFIG_SERIAL_DISABLE_REORDERING=y + +# +# STM32 F7 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32F745VG is not set +# CONFIG_ARCH_CHIP_STM32F745VE is not set +# CONFIG_ARCH_CHIP_STM32F745IG is not set +# CONFIG_ARCH_CHIP_STM32F745IE is not set +# CONFIG_ARCH_CHIP_STM32F745ZE is not set +# CONFIG_ARCH_CHIP_STM32F745ZG is not set +# CONFIG_ARCH_CHIP_STM32F746BG is not set +# CONFIG_ARCH_CHIP_STM32F746VG is not set +# CONFIG_ARCH_CHIP_STM32F746VE is not set +# CONFIG_ARCH_CHIP_STM32F746BE is not set +# CONFIG_ARCH_CHIP_STM32F746ZG is not set +# CONFIG_ARCH_CHIP_STM32F746IE is not set +# CONFIG_ARCH_CHIP_STM32F746NG is not set +# CONFIG_ARCH_CHIP_STM32F746NE is not set +# CONFIG_ARCH_CHIP_STM32F746ZE is not set +# CONFIG_ARCH_CHIP_STM32F746IG is not set +# CONFIG_ARCH_CHIP_STM32F756NG is not set +# CONFIG_ARCH_CHIP_STM32F756BG is not set +# CONFIG_ARCH_CHIP_STM32F756IG is not set +# CONFIG_ARCH_CHIP_STM32F756VG is not set +# CONFIG_ARCH_CHIP_STM32F756ZG is not set +# CONFIG_ARCH_CHIP_STM32F765NI is not set +# CONFIG_ARCH_CHIP_STM32F765VI is not set +# CONFIG_ARCH_CHIP_STM32F765VG is not set +# CONFIG_ARCH_CHIP_STM32F765BI is not set +# CONFIG_ARCH_CHIP_STM32F765NG is not set +# CONFIG_ARCH_CHIP_STM32F765ZG is not set +# CONFIG_ARCH_CHIP_STM32F765ZI is not set +# CONFIG_ARCH_CHIP_STM32F765IG is not set +# CONFIG_ARCH_CHIP_STM32F765BG is not set +# CONFIG_ARCH_CHIP_STM32F765II is not set +# CONFIG_ARCH_CHIP_STM32F767NG is not set +# CONFIG_ARCH_CHIP_STM32F767IG is not set +# CONFIG_ARCH_CHIP_STM32F767VG is not set +# CONFIG_ARCH_CHIP_STM32F767ZG is not set +# CONFIG_ARCH_CHIP_STM32F767NI is not set +# CONFIG_ARCH_CHIP_STM32F767VI is not set +# CONFIG_ARCH_CHIP_STM32F767BG is not set +CONFIG_ARCH_CHIP_STM32F767ZI=y +# CONFIG_ARCH_CHIP_STM32F767II is not set +# CONFIG_ARCH_CHIP_STM32F769BI is not set +# CONFIG_ARCH_CHIP_STM32F769II is not set +# CONFIG_ARCH_CHIP_STM32F769BG is not set +# CONFIG_ARCH_CHIP_STM32F769NI is not set +# CONFIG_ARCH_CHIP_STM32F769AI is not set +# CONFIG_ARCH_CHIP_STM32F769NG is not set +# CONFIG_ARCH_CHIP_STM32F769IG is not set +# CONFIG_ARCH_CHIP_STM32F777ZI is not set +# CONFIG_ARCH_CHIP_STM32F777VI is not set +# CONFIG_ARCH_CHIP_STM32F777NI is not set +# CONFIG_ARCH_CHIP_STM32F777BI is not set +# CONFIG_ARCH_CHIP_STM32F777II is not set +# CONFIG_ARCH_CHIP_STM32F778AI is not set +# CONFIG_ARCH_CHIP_STM32F779II is not set +# CONFIG_ARCH_CHIP_STM32F779NI is not set +# CONFIG_ARCH_CHIP_STM32F779BI is not set +# CONFIG_ARCH_CHIP_STM32F779AI is not set +# CONFIG_STM32F7_STM32F74XX is not set +# CONFIG_STM32F7_STM32F75XX is not set +CONFIG_STM32F7_STM32F76XX=y +# CONFIG_STM32F7_STM32F77XX is not set +# CONFIG_STM32F7_IO_CONFIG_V is not set +# CONFIG_STM32F7_IO_CONFIG_I is not set +CONFIG_STM32F7_IO_CONFIG_Z=y +# CONFIG_STM32F7_IO_CONFIG_N is not set +# CONFIG_STM32F7_IO_CONFIG_B is not set +# CONFIG_STM32F7_IO_CONFIG_A is not set +# CONFIG_STM32F7_STM32F745XX is not set +# CONFIG_STM32F7_STM32F746XX is not set +# CONFIG_STM32F7_STM32F756XX is not set +# CONFIG_STM32F7_STM32F765XX is not set +CONFIG_STM32F7_STM32F767XX=y +# CONFIG_STM32F7_STM32F768XX is not set +# CONFIG_STM32F7_STM32F768AX is not set +# CONFIG_STM32F7_STM32F769XX is not set +# CONFIG_STM32F7_STM32F769AX is not set +# CONFIG_STM32F7_STM32F777XX is not set +# CONFIG_STM32F7_STM32F778XX is not set +# CONFIG_STM32F7_STM32F778AX is not set +# CONFIG_STM32F7_STM32F779XX is not set +# CONFIG_STM32F7_STM32F779AX is not set +# CONFIG_STM32F7_FLASH_CONFIG_E is not set +CONFIG_STM32F7_FLASH_CONFIG_I=y +CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y +# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32F7_HAVE_LTDC=y +CONFIG_STM32F7_HAVE_FSMC=y +CONFIG_STM32F7_HAVE_ETHRNET=y +CONFIG_STM32F7_HAVE_RNG=y +CONFIG_STM32F7_HAVE_SPI5=y +CONFIG_STM32F7_HAVE_SPI6=y +CONFIG_STM32F7_HAVE_SDMMC2=y +CONFIG_STM32F7_HAVE_CAN3=y +CONFIG_STM32F7_HAVE_DCMI=y +# CONFIG_STM32F7_HAVE_DSIHOST is not set +CONFIG_STM32F7_HAVE_DMA2D=y +CONFIG_STM32F7_HAVE_JPEG=y +# CONFIG_STM32F7_HAVE_CRYP is not set +# CONFIG_STM32F7_HAVE_HASH is not set +CONFIG_STM32F7_HAVE_DFSDM1=y +# CONFIG_STM32F7_ADC is not set +# CONFIG_STM32F7_CAN is not set +# CONFIG_STM32F7_DAC is not set +# CONFIG_STM32F7_DMA is not set +# CONFIG_STM32F7_I2C is not set +# CONFIG_STM32F7_SAI is not set +# CONFIG_STM32F7_SPI is not set +CONFIG_STM32F7_USART=y +# CONFIG_STM32F7_ADC1 is not set +# CONFIG_STM32F7_ADC2 is not set +# CONFIG_STM32F7_ADC3 is not set +# CONFIG_STM32F7_BKPSRAM is not set +# CONFIG_STM32F7_CAN1 is not set +# CONFIG_STM32F7_CAN2 is not set +# CONFIG_STM32F7_CAN3 is not set +# CONFIG_STM32F7_CEC is not set +# CONFIG_STM32F7_CRC is not set +# CONFIG_STM32F7_DFSDM1 is not set +# CONFIG_STM32F7_DMA1 is not set +# CONFIG_STM32F7_DMA2 is not set +# CONFIG_STM32F7_DAC1 is not set +# CONFIG_STM32F7_DAC2 is not set +# CONFIG_STM32F7_DCMI is not set +# CONFIG_STM32F7_DMA2D is not set +# CONFIG_STM32F7_JPEG is not set +# CONFIG_STM32F7_ETHMAC is not set +# CONFIG_STM32F7_FSMC is not set +# CONFIG_STM32F7_I2C1 is not set +# CONFIG_STM32F7_I2C2 is not set +# CONFIG_STM32F7_I2C3 is not set +# CONFIG_STM32F7_LPTIM1 is not set +# CONFIG_STM32F7_LTDC is not set +# CONFIG_STM32F7_OTGFS is not set +# CONFIG_STM32F7_OTGHS is not set +# CONFIG_STM32F7_QUADSPI is not set +# CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI1 is not set +# CONFIG_STM32F7_SAI2 is not set +# CONFIG_STM32F7_SDMMC1 is not set +# CONFIG_STM32F7_SDMMC2 is not set +# CONFIG_STM32F7_SPDIFRX is not set +# CONFIG_STM32F7_SPI1 is not set +# CONFIG_STM32F7_SPI2 is not set +# CONFIG_STM32F7_SPI3 is not set +# CONFIG_STM32F7_SPI4 is not set +# CONFIG_STM32F7_SPI5 is not set +# CONFIG_STM32F7_SPI6 is not set +# CONFIG_STM32F7_TIM1 is not set +# CONFIG_STM32F7_TIM2 is not set +# CONFIG_STM32F7_TIM3 is not set +# CONFIG_STM32F7_TIM4 is not set +# CONFIG_STM32F7_TIM5 is not set +# CONFIG_STM32F7_TIM6 is not set +# CONFIG_STM32F7_TIM7 is not set +# CONFIG_STM32F7_TIM8 is not set +# CONFIG_STM32F7_TIM9 is not set +# CONFIG_STM32F7_TIM10 is not set +# CONFIG_STM32F7_TIM11 is not set +# CONFIG_STM32F7_TIM12 is not set +# CONFIG_STM32F7_TIM13 is not set +# CONFIG_STM32F7_TIM14 is not set +# CONFIG_STM32F7_TIM15 is not set +# CONFIG_STM32F7_USART1 is not set +# CONFIG_STM32F7_USART2 is not set +CONFIG_STM32F7_USART3=y +# CONFIG_STM32F7_UART4 is not set +# CONFIG_STM32F7_UART5 is not set +# CONFIG_STM32F7_USART6 is not set +# CONFIG_STM32F7_UART7 is not set +# CONFIG_STM32F7_UART8 is not set +# CONFIG_STM32F7_IWDG is not set +# CONFIG_STM32F7_WWDG is not set + +# +# U[S]ART Configuration +# +CONFIG_STM32F7_FLOWCONTROL_BROKEN=y +CONFIG_STM32F7_USART_BREAKS=y +CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y +# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=43103 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20010000 +CONFIG_RAM_SIZE=245760 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_144=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-144" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_NUCLEO_CONSOLE_ARDUINO is not set +CONFIG_NUCLEO_CONSOLE_VIRTUAL=y +# CONFIG_NUCLEO_CONSOLE_MORPHO is not set +# CONFIG_NUCLEO_CONSOLE_NONE is not set +# CONFIG_NUCLEO_SPI_TEST is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=16 +CONFIG_SEM_NNESTPRIO=16 + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=100000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_LPNTHREADS=1 +CONFIG_SCHED_LPWORKPRIORITY=50 +CONFIG_SCHED_LPWORKPRIOMAX=176 +CONFIG_SCHED_LPWORKPERIOD=50000 +CONFIG_SCHED_LPWORKSTACKSIZE=2048 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +CONFIG_USERLED=y +CONFIG_USERLED_LOWER=y +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_UART8_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_AIO is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +CONFIG_EXAMPLES_HELLOXX=y +CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +CONFIG_EXAMPLES_LEDS=y +CONFIG_EXAMPLES_LEDS_PRIORITY=100 +CONFIG_EXAMPLES_LEDS_STACKSIZE=2048 +CONFIG_EXAMPLES_LEDS_DEVPATH="/dev/userleds" +CONFIG_EXAMPLES_LEDS_LEDSET=0x0f +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_READLINE_MAX_BUILTINS=64 +CONFIG_READLINE_MAX_EXTCMDS=64 +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_CMD_HISTORY_LINELEN=80 +CONFIG_READLINE_CMD_HISTORY_LEN=16 +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-144/f767-evalos/setenv.sh b/configs/nucleo-144/f767-evalos/setenv.sh new file mode 100644 index 00000000000..cf10804e841 --- /dev/null +++ b/configs/nucleo-144/f767-evalos/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/nucleo-144/f767-evalos/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Author: Mark Olsson +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleo-144/evalos/Make.defs b/configs/nucleo-144/f767-nsh/Make.defs similarity index 96% rename from configs/nucleo-144/evalos/Make.defs rename to configs/nucleo-144/f767-nsh/Make.defs index 210c5ff0743..9b667c97efc 100644 --- a/configs/nucleo-144/evalos/Make.defs +++ b/configs/nucleo-144/f767-nsh/Make.defs @@ -1,9 +1,9 @@ ############################################################################ -# configs/nucleo-144/evalos/Make.defs +# configs/nucleo-144/f767-nsh/Make.defs # # Copyright (C) 2016 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Author: Mark Olsson +# Authors: Gregory Nutt +# David Sidrane # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions @@ -38,7 +38,7 @@ include ${TOPDIR}/.config include ${TOPDIR}/tools/Config.mk include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs -LDSCRIPT = flash.ld +LDSCRIPT = f767-flash.ld ifeq ($(WINTOOL),y) # Windows-native toolchains @@ -111,3 +111,4 @@ HOSTCC = gcc HOSTINCLUDES = -I. HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe HOSTLDFLAGS = + diff --git a/configs/nucleo-144/f767-nsh/defconfig b/configs/nucleo-144/f767-nsh/defconfig new file mode 100644 index 00000000000..8e7fae13a42 --- /dev/null +++ b/configs/nucleo-144/f767-nsh/defconfig @@ -0,0 +1,1021 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +CONFIG_ARCH_CHIP_STM32F7=y +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32f7" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +CONFIG_ARMV7M_DTCM=y +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USART6_RS485 is not set +CONFIG_SERIAL_DISABLE_REORDERING=y + +# +# STM32 F7 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32F745VG is not set +# CONFIG_ARCH_CHIP_STM32F745VE is not set +# CONFIG_ARCH_CHIP_STM32F745IG is not set +# CONFIG_ARCH_CHIP_STM32F745IE is not set +# CONFIG_ARCH_CHIP_STM32F745ZE is not set +# CONFIG_ARCH_CHIP_STM32F745ZG is not set +# CONFIG_ARCH_CHIP_STM32F746BG is not set +# CONFIG_ARCH_CHIP_STM32F746VG is not set +# CONFIG_ARCH_CHIP_STM32F746VE is not set +# CONFIG_ARCH_CHIP_STM32F746BE is not set +# CONFIG_ARCH_CHIP_STM32F746ZG is not set +# CONFIG_ARCH_CHIP_STM32F746IE is not set +# CONFIG_ARCH_CHIP_STM32F746NG is not set +# CONFIG_ARCH_CHIP_STM32F746NE is not set +# CONFIG_ARCH_CHIP_STM32F746ZE is not set +# CONFIG_ARCH_CHIP_STM32F746IG is not set +# CONFIG_ARCH_CHIP_STM32F756NG is not set +# CONFIG_ARCH_CHIP_STM32F756BG is not set +# CONFIG_ARCH_CHIP_STM32F756IG is not set +# CONFIG_ARCH_CHIP_STM32F756VG is not set +# CONFIG_ARCH_CHIP_STM32F756ZG is not set +# CONFIG_ARCH_CHIP_STM32F765NI is not set +# CONFIG_ARCH_CHIP_STM32F765VI is not set +# CONFIG_ARCH_CHIP_STM32F765VG is not set +# CONFIG_ARCH_CHIP_STM32F765BI is not set +# CONFIG_ARCH_CHIP_STM32F765NG is not set +# CONFIG_ARCH_CHIP_STM32F765ZG is not set +# CONFIG_ARCH_CHIP_STM32F765ZI is not set +# CONFIG_ARCH_CHIP_STM32F765IG is not set +# CONFIG_ARCH_CHIP_STM32F765BG is not set +# CONFIG_ARCH_CHIP_STM32F765II is not set +# CONFIG_ARCH_CHIP_STM32F767NG is not set +# CONFIG_ARCH_CHIP_STM32F767IG is not set +# CONFIG_ARCH_CHIP_STM32F767VG is not set +# CONFIG_ARCH_CHIP_STM32F767ZG is not set +# CONFIG_ARCH_CHIP_STM32F767NI is not set +# CONFIG_ARCH_CHIP_STM32F767VI is not set +# CONFIG_ARCH_CHIP_STM32F767BG is not set +CONFIG_ARCH_CHIP_STM32F767ZI=y +# CONFIG_ARCH_CHIP_STM32F767II is not set +# CONFIG_ARCH_CHIP_STM32F769BI is not set +# CONFIG_ARCH_CHIP_STM32F769II is not set +# CONFIG_ARCH_CHIP_STM32F769BG is not set +# CONFIG_ARCH_CHIP_STM32F769NI is not set +# CONFIG_ARCH_CHIP_STM32F769AI is not set +# CONFIG_ARCH_CHIP_STM32F769NG is not set +# CONFIG_ARCH_CHIP_STM32F769IG is not set +# CONFIG_ARCH_CHIP_STM32F777ZI is not set +# CONFIG_ARCH_CHIP_STM32F777VI is not set +# CONFIG_ARCH_CHIP_STM32F777NI is not set +# CONFIG_ARCH_CHIP_STM32F777BI is not set +# CONFIG_ARCH_CHIP_STM32F777II is not set +# CONFIG_ARCH_CHIP_STM32F778AI is not set +# CONFIG_ARCH_CHIP_STM32F779II is not set +# CONFIG_ARCH_CHIP_STM32F779NI is not set +# CONFIG_ARCH_CHIP_STM32F779BI is not set +# CONFIG_ARCH_CHIP_STM32F779AI is not set +# CONFIG_STM32F7_STM32F74XX is not set +# CONFIG_STM32F7_STM32F75XX is not set +CONFIG_STM32F7_STM32F76XX=y +# CONFIG_STM32F7_STM32F77XX is not set +# CONFIG_STM32F7_IO_CONFIG_V is not set +# CONFIG_STM32F7_IO_CONFIG_I is not set +CONFIG_STM32F7_IO_CONFIG_Z=y +# CONFIG_STM32F7_IO_CONFIG_N is not set +# CONFIG_STM32F7_IO_CONFIG_B is not set +# CONFIG_STM32F7_IO_CONFIG_A is not set +# CONFIG_STM32F7_STM32F745XX is not set +# CONFIG_STM32F7_STM32F746XX is not set +# CONFIG_STM32F7_STM32F756XX is not set +# CONFIG_STM32F7_STM32F765XX is not set +CONFIG_STM32F7_STM32F767XX=y +# CONFIG_STM32F7_STM32F768XX is not set +# CONFIG_STM32F7_STM32F768AX is not set +# CONFIG_STM32F7_STM32F769XX is not set +# CONFIG_STM32F7_STM32F769AX is not set +# CONFIG_STM32F7_STM32F777XX is not set +# CONFIG_STM32F7_STM32F778XX is not set +# CONFIG_STM32F7_STM32F778AX is not set +# CONFIG_STM32F7_STM32F779XX is not set +# CONFIG_STM32F7_STM32F779AX is not set +# CONFIG_STM32F7_FLASH_CONFIG_E is not set +CONFIG_STM32F7_FLASH_CONFIG_I=y +CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y +# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32F7_HAVE_LTDC=y +CONFIG_STM32F7_HAVE_FSMC=y +CONFIG_STM32F7_HAVE_ETHRNET=y +CONFIG_STM32F7_HAVE_RNG=y +CONFIG_STM32F7_HAVE_SPI5=y +CONFIG_STM32F7_HAVE_SPI6=y +CONFIG_STM32F7_HAVE_SDMMC2=y +CONFIG_STM32F7_HAVE_CAN3=y +CONFIG_STM32F7_HAVE_DCMI=y +# CONFIG_STM32F7_HAVE_DSIHOST is not set +CONFIG_STM32F7_HAVE_DMA2D=y +CONFIG_STM32F7_HAVE_JPEG=y +# CONFIG_STM32F7_HAVE_CRYP is not set +# CONFIG_STM32F7_HAVE_HASH is not set +CONFIG_STM32F7_HAVE_DFSDM1=y +# CONFIG_STM32F7_ADC is not set +# CONFIG_STM32F7_CAN is not set +# CONFIG_STM32F7_DAC is not set +# CONFIG_STM32F7_DMA is not set +# CONFIG_STM32F7_I2C is not set +# CONFIG_STM32F7_SAI is not set +# CONFIG_STM32F7_SPI is not set +CONFIG_STM32F7_USART=y +# CONFIG_STM32F7_ADC1 is not set +# CONFIG_STM32F7_ADC2 is not set +# CONFIG_STM32F7_ADC3 is not set +# CONFIG_STM32F7_BKPSRAM is not set +# CONFIG_STM32F7_CAN1 is not set +# CONFIG_STM32F7_CAN2 is not set +# CONFIG_STM32F7_CAN3 is not set +# CONFIG_STM32F7_CEC is not set +# CONFIG_STM32F7_CRC is not set +# CONFIG_STM32F7_DFSDM1 is not set +# CONFIG_STM32F7_DMA1 is not set +# CONFIG_STM32F7_DMA2 is not set +# CONFIG_STM32F7_DAC1 is not set +# CONFIG_STM32F7_DAC2 is not set +# CONFIG_STM32F7_DCMI is not set +# CONFIG_STM32F7_DMA2D is not set +# CONFIG_STM32F7_JPEG is not set +# CONFIG_STM32F7_ETHMAC is not set +# CONFIG_STM32F7_FSMC is not set +# CONFIG_STM32F7_I2C1 is not set +# CONFIG_STM32F7_I2C2 is not set +# CONFIG_STM32F7_I2C3 is not set +# CONFIG_STM32F7_LPTIM1 is not set +# CONFIG_STM32F7_LTDC is not set +# CONFIG_STM32F7_OTGFS is not set +# CONFIG_STM32F7_OTGHS is not set +# CONFIG_STM32F7_QUADSPI is not set +# CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI1 is not set +# CONFIG_STM32F7_SAI2 is not set +# CONFIG_STM32F7_SDMMC1 is not set +# CONFIG_STM32F7_SDMMC2 is not set +# CONFIG_STM32F7_SPDIFRX is not set +# CONFIG_STM32F7_SPI1 is not set +# CONFIG_STM32F7_SPI2 is not set +# CONFIG_STM32F7_SPI3 is not set +# CONFIG_STM32F7_SPI4 is not set +# CONFIG_STM32F7_SPI5 is not set +# CONFIG_STM32F7_SPI6 is not set +# CONFIG_STM32F7_TIM1 is not set +# CONFIG_STM32F7_TIM2 is not set +# CONFIG_STM32F7_TIM3 is not set +# CONFIG_STM32F7_TIM4 is not set +# CONFIG_STM32F7_TIM5 is not set +# CONFIG_STM32F7_TIM6 is not set +# CONFIG_STM32F7_TIM7 is not set +# CONFIG_STM32F7_TIM8 is not set +# CONFIG_STM32F7_TIM9 is not set +# CONFIG_STM32F7_TIM10 is not set +# CONFIG_STM32F7_TIM11 is not set +# CONFIG_STM32F7_TIM12 is not set +# CONFIG_STM32F7_TIM13 is not set +# CONFIG_STM32F7_TIM14 is not set +# CONFIG_STM32F7_TIM15 is not set +# CONFIG_STM32F7_USART1 is not set +# CONFIG_STM32F7_USART2 is not set +# CONFIG_STM32F7_USART3 is not set +# CONFIG_STM32F7_UART4 is not set +# CONFIG_STM32F7_UART5 is not set +CONFIG_STM32F7_USART6=y +# CONFIG_STM32F7_UART7 is not set +# CONFIG_STM32F7_UART8 is not set +# CONFIG_STM32F7_IWDG is not set +# CONFIG_STM32F7_WWDG is not set + +# +# U[S]ART Configuration +# +CONFIG_STM32F7_FLOWCONTROL_BROKEN=y +CONFIG_STM32F7_USART_BREAKS=y +CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y +# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=43103 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20010000 +CONFIG_RAM_SIZE=245760 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_144=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-144" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_NUCLEO_CONSOLE_ARDUINO=y +# CONFIG_NUCLEO_CONSOLE_VIRTUAL is not set +# CONFIG_NUCLEO_CONSOLE_MORPHO is not set +# CONFIG_NUCLEO_CONSOLE_NONE is not set +# CONFIG_NUCLEO_SPI_TEST is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +CONFIG_USART6_SERIALDRIVER=y +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART6_SERIAL_CONSOLE=y +# CONFIG_UART8_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART6 Configuration +# +CONFIG_USART6_RXBUFSIZE=256 +CONFIG_USART6_TXBUFSIZE=256 +CONFIG_USART6_BAUD=115200 +CONFIG_USART6_BITS=8 +CONFIG_USART6_PARITY=0 +CONFIG_USART6_2STOP=0 +# CONFIG_USART6_IFLOWCONTROL is not set +# CONFIG_USART6_OFLOWCONTROL is not set +# CONFIG_USART6_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-144/f767-nsh/setenv.sh b/configs/nucleo-144/f767-nsh/setenv.sh new file mode 100644 index 00000000000..e6eabd1f70f --- /dev/null +++ b/configs/nucleo-144/f767-nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/nucleo-144/f767-nsh/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleo-144/include/board.h b/configs/nucleo-144/include/board.h index 63eb5df084e..d309e139387 100644 --- a/configs/nucleo-144/include/board.h +++ b/configs/nucleo-144/include/board.h @@ -2,8 +2,9 @@ * configs/nucleo-144/include/board.h * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Mark Olsson + * Authors: Gregory Nutt + * Mark Olsson + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -59,17 +60,17 @@ ************************************************************************************/ /* Clocking *************************************************************************/ -/* The STM32F7 Discovery board provides the following clock sources: +/* The Nucleo-144 board provides the following clock sources: * - * X1: 24 MHz oscillator for USB OTG HS PHY and camera module (daughter board) - * X2: 25 MHz oscillator for STM32F746NGH6 microcontroller and Ethernet PHY. - * X3: 32.768 KHz crystal for STM32F746NGH6 embedded RTC + * MCO: 8 MHz from MCO output of ST-LINK is used as input clock + * X2: 32.768 KHz crystal for LSE + * X3: HSE crystal oscillator (not provided) * * So we have these clock source available within the STM32 * * HSI: 16 MHz RC factory-trimmed * LSI: 32 KHz RC - * HSE: On-board crystal frequency is 25MHz + * HSE: 8 MHz from MCO output of ST-LINK * LSE: 32.768 kHz */ @@ -106,56 +107,53 @@ * 2 <= PLLQ <= 15 */ -#if defined(CONFIG_STM32F7_USBOTHFS) /* Highest SYSCLK with USB OTG FS clock = 48 MHz * - * PLL_VCO = (8,000,000 / 8) * 384 = 384 MHz - * SYSCLK = 384 MHz / 2 = 192 MHz - * USB OTG FS, SDMMC and RNG Clock = 384 MHz / 8 = 48MHz - */ - -#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) -#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(384) -#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 -#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(8) - -#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 384) -#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) -#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 8) - -#elif defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_RNG) -/* Highest SYSCLK with USB OTG FS clock <= 48MHz - * - * PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz + * PLL_VCO = (8,000,000 / 4) * 216 = 432 MHz * SYSCLK = 432 MHz / 2 = 216 MHz - * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 10 = 43.2 MHz + * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 9 = 48MHz */ -#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) -#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432) +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(4) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(216) #define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 -#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10) +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(9) -#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 432) +#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 4) * 216) #define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) -#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10) +#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 9) -#else -/* Highest SYSCLK - * - * PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz - * SYSCLK = 432 MHz / 2 = 216 MHz - */ +/* Configure factors for PLLSAI clock */ -#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) -#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432) -#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 -#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10) +#define STM32_RCC_PLLSAICFGR_PLLSAIN RCC_PLLSAICFGR_PLLSAIN(192) +#define STM32_RCC_PLLSAICFGR_PLLSAIP RCC_PLLSAICFGR_PLLSAIP(2) +#define STM32_RCC_PLLSAICFGR_PLLSAIQ RCC_PLLSAICFGR_PLLSAIQ(2) +#define STM32_RCC_PLLSAICFGR_PLLSAIR RCC_PLLSAICFGR_PLLSAIR(2) -#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 432) -#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) -#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10) -#endif +/* Configure Dedicated Clock Configuration Register */ + +#define STM32_RCC_DCKCFGR_PLLI2SDIVQ RCC_DCKCFGR_PLLI2SDIVQ(1) +#define STM32_RCC_DCKCFGR_PLLSAIDIVQ RCC_DCKCFGR_PLLSAIDIVQ(1) +#define STM32_RCC_DCKCFGR_SAI1SRC RCC_DCKCFGR_SAI1SRC_PLLSAI +#define STM32_RCC_DCKCFGR_SAI2SRC RCC_DCKCFGR_SAI2SRC_PLLSAI +#define STM32_RCC_DCKCFGR_TIMPRE 0 +#define STM32_RCC_DCKCFGR_I2S1SRC RCC_DCKCFGR_SAI1SRC_PLL +#define STM32_RCC_DCKCFGR_I2S2SRC RCC_DCKCFGR_SAI2SRC_PLL + +/* Configure factors for PLLI2S clock */ + +#define STM32_RCC_PLLI2SCFGR_PLLI2SN RCC_PLLI2SCFGR_PLLI2SN(192) +#define STM32_RCC_PLLI2SCFGR_PLLI2SP RCC_PLLI2SCFGR_PLLI2SP(2) +#define STM32_RCC_PLLI2SCFGR_PLLI2SQ RCC_PLLI2SCFGR_PLLI2SQ(2) +#define STM32_RCC_PLLI2SCFGR_PLLI2SR RCC_PLLI2SCFGR_PLLI2SR(2) + +/* Configure Dedicated Clock Configuration Register 2 */ + +#define STM32_RCC_DCKCFGR2_FMPI2C1SEL RCC_DCKCFGR2_FMPI2C1SEL_APB +#define STM32_RCC_DCKCFGR2_CECSEL RCC_DCKCFGR2_CECSEL_HSI +#define STM32_RCC_DCKCFGR2_CK48MSEL RCC_DCKCFGR2_CK48MSEL_PLLSAI +#define STM32_RCC_DCKCFGR2_SDIOSEL RCC_DCKCFGR2_SDIOSEL_48MHZ +#define STM32_RCC_DCKCFGR2_SPDIFRXSEL RCC_DCKCFGR2_SPDIFRXSEL_PLL /* Several prescalers allow the configuration of the two AHB buses, the * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum @@ -215,12 +213,9 @@ #define BOARD_FLASH_WAITSTATES 7 /* LED definitions ******************************************************************/ -/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the - * reset button, that can be controlled by software (LD2 is a power indicator, LD3-6 - * indicate USB status, LD7 is controlled by the ST-Link). - * - * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. - * One end of LD1 is grounded so a high output on PI1 will illuminate the LED. +/* The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED, LD2 a Blue + * LED and LD3 a Red LED, that can be controlled by software. The following + * definitions assume the default Solder Bridges are installed. * * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. * The following definitions are used to access individual LEDs. @@ -233,9 +228,9 @@ #define BOARD_LED3 2 #define BOARD_NLEDS 3 -#define BOARD_LD1 BOARD_LED1 -#define BOARD_LD2 BOARD_LED2 -#define BOARD_LD3 BOARD_LED3 +#define BOARD_LED_GREEN BOARD_LED1 +#define BOARD_LED_BLUE BOARD_LED2 +#define BOARD_LED_RED BOARD_LED3 /* LED bits for use with board_userled_all() */ @@ -247,33 +242,29 @@ * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related * events as follows: * - * SYMBOL Meaning LD1 - * ------------------- ----------------------- ------ - * LED_STARTED NuttX has been started OFF - * LED_HEAPALLOCATE Heap has been allocated OFF - * LED_IRQSENABLED Interrupts enabled OFF - * LED_STACKCREATED Idle stack created ON - * LED_INIRQ In an interrupt N/C - * LED_SIGNAL In a signal handler N/C - * LED_ASSERTION An assertion failed N/C - * LED_PANIC The system has crashed FLASH * - * Thus is LD1 is statically on, NuttX has successfully booted and is, - * apparently, running normally. If LD1 is flashing at approximately - * 2Hz, then a fatal error has been detected and the system has halted. + * SYMBOL Meaning LED state + * Red Green Blue + * ---------------------- -------------------------- ------ ------ ----*/ + +#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */ +#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */ +#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */ +#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */ +#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */ +#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */ +#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */ +#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */ + +/* Thus if the Green LED is statically on, NuttX has successfully booted and + * is, apparently, running normally. If the Red LED is flashing at + * approximately 2Hz, then a fatal error has been detected and the system + * has halted. */ -#define LED_STARTED 0 /* LD1=OFF */ -#define LED_HEAPALLOCATE 0 /* LD1=OFF */ -#define LED_IRQSENABLED 0 /* LD1=OFF */ -#define LED_STACKCREATED 1 /* LD1=ON */ -#define LED_INIRQ 2 /* LD1=no change */ -#define LED_SIGNAL 2 /* LD1=no change */ -#define LED_ASSERTION 2 /* LD1=no change */ -#define LED_PANIC 3 /* LD1=flashing */ - /* Button definitions ***************************************************************/ -/* The STM32F7 Discovery supports one button: Pushbutton B1, labelled "User", is +/* The STM32F7 Discovery supports one button: Pushbutton B1, labeled "User", is * connected to GPIO PI11. A high value will be sensed when the button is depressed. */ @@ -283,6 +274,7 @@ /* Alternate function pin selections ************************************************/ +#if defined(CONFIG_NUCLEO_CONSOLE_ARDUINO) /* USART6: * * These configurations assume that you are using a standard Arduio RS-232 shield @@ -292,16 +284,32 @@ * STM32F7 * ARDUIONO FUNCTION GPIO * -- ----- --------- ----- - * DO RX USART6_RX PC7 - * D1 TX USART6_TX PC6 + * DO RX USART6_RX PG9 + * D1 TX USART6_TX PG14 * -- ----- --------- ----- */ - #define GPIO_USART6_RX GPIO_USART6_RX_1 - #define GPIO_USART6_TX GPIO_USART6_TX_1 + # define GPIO_USART6_RX GPIO_USART6_RX_2 + # define GPIO_USART6_TX GPIO_USART6_TX_2 +#endif + +/* USART3: + * Use USART3 and the USB virtual COM port +*/ +#if defined(CONFIG_NUCLEO_CONSOLE_VIRTUAL) + # define GPIO_USART3_RX GPIO_USART3_RX_3 + # define GPIO_USART3_TX GPIO_USART3_TX_3 +#endif + +/* USART8: + * + * This configurations assume that you are connecting to the Morpho connector + * with the serial interface with the adaptor's RX on pin CN11 pin 64 and + * TX on pin CN11 pin 61 + * + * USART8: has noit remap + */ - #define GPIO_USART3_RX GPIO_USART3_RX_3 - #define GPIO_USART3_TX GPIO_USART3_TX_3 /* The STM32 F7 connects to a SMSC LAN8742A PHY using these pins: * diff --git a/configs/nucleo-144/scripts/flash.ld b/configs/nucleo-144/scripts/f746-flash.ld similarity index 83% rename from configs/nucleo-144/scripts/flash.ld rename to configs/nucleo-144/scripts/f746-flash.ld index 90e589ed8ab..bc8b07e4fa8 100644 --- a/configs/nucleo-144/scripts/flash.ld +++ b/configs/nucleo-144/scripts/f746-flash.ld @@ -1,10 +1,9 @@ /**************************************************************************** - * configs/nucleo-144/scripts/flash.ld + * configs/nucleo-144/scripts/f746-flash.ld * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * - * Modified 11/4/2013 for STM32F429 support * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -35,14 +34,14 @@ * ****************************************************************************/ -/* The STM32F746NGH6 has 1024Kb of main FLASH memory. This FLASH memory can - * be accessed from either the AXIM interface at address 0x0800:0000 or from - * the ITCM interface at address 0x0020:0000. +/* The STM32F746ZGT6 has 1024 KiB of main FLASH memory. This FLASH memory + * can be accessed from either the AXIM interface at address 0x0800:0000 or + * from the ITCM interface at address 0x0020:0000. * * Additional information, including the option bytes, is available at at * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM). * - * In the STM32F746NGH6, two different boot spaces can be selected through + * In the STM32F746ZGT6, two different boot spaces can be selected through * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and * BOOT_ADD1 option bytes: * @@ -51,16 +50,16 @@ * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. * ST programmed value: System bootloader at 0x0010:0000 * - * NuttX does not modify these option byes. On the unmodified STM32F746G - * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot - * to address 0x0020:0000 in ITCM FLASH. + * NuttX does not modify these option byes. On the unmodified NUCLEO-144 + * board, the BOOT0 pin is at ground so by default, the STM32F746ZGT6 will + * boot from address 0x0020:0000 in ITCM FLASH. * - * The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM). + * The STM32F746ZGT6 also has 320 KiB of data SRAM (in addition to ITCM SRAM). * SRAM is split up into three blocks: * - * 1) 64Kb of DTCM SRM beginning at address 0x2000:0000 - * 2) 240Kb of SRAM1 beginning at address 0x2001:0000 - * 3) 16Kb of SRAM2 beginning at address 0x2004:c000 + * 1) 64 KiB of DTCM SRM beginning at address 0x2000:0000 + * 2) 240 KiB of SRAM1 beginning at address 0x2001:0000 + * 3) 16 KiB of SRAM2 beginning at address 0x2004:c000 * * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 * where the code expects to begin execution by jumping to the entry point in diff --git a/configs/nucleo-144/scripts/f767-flash.ld b/configs/nucleo-144/scripts/f767-flash.ld new file mode 100644 index 00000000000..6654a139fee --- /dev/null +++ b/configs/nucleo-144/scripts/f767-flash.ld @@ -0,0 +1,146 @@ +/**************************************************************************** + * configs/nucleo-144/scripts/f767-flash.ld + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F767ZIT6 has 2048 KiB of main FLASH memory. This FLASH memory + * can be accessed from either the AXIM interface at address 0x0800:0000 or + * from the ITCM interface at address 0x0020:0000. + * + * Additional information, including the option bytes, is available at at + * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM). + * + * In the STM32F767ZIT6, two different boot spaces can be selected through + * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and + * BOOT_ADD1 option bytes: + * + * 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0]. + * ST programmed value: Flash on ITCM at 0x0020:0000 + * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. + * ST programmed value: System bootloader at 0x0010:0000 + * + * NuttX does not modify these option byes. On the unmodified NUCLEO-144 + * board, the BOOT0 pin is at ground so by default, the STM32F767ZIT6 will + * boot from address 0x0020:0000 in ITCM FLASH. + * + * The STM32F767ZIT6 also has 512 KiB of data SRAM (in addition to ITCM SRAM). + * SRAM is split up into three blocks: + * + * 1) 128 KiB of DTCM SRM beginning at address 0x2000:0000 + * 2) 368 KiB of SRAM1 beginning at address 0x2002:0000 + * 3) 16 KiB of SRAM2 beginning at address 0x2007:c000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + */ + +MEMORY +{ + itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 2048K + flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K + dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K + sram1 (rwx) : ORIGIN = 0x20020000, LENGTH = 368K + sram2 (rwx) : ORIGIN = 0x2007c000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram1 AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram1 + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/nucleo-144/src/Makefile b/configs/nucleo-144/src/Makefile index 2f742b273bb..e179c34a7b8 100644 --- a/configs/nucleo-144/src/Makefile +++ b/configs/nucleo-144/src/Makefile @@ -3,6 +3,7 @@ # # Copyright (C) 2015 Gregory Nutt. All rights reserved. # Author: Gregory Nutt +# David Sidrane # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions @@ -36,7 +37,7 @@ -include $(TOPDIR)/Make.defs ASRCS = -CSRCS = stm32_boot.c stm32_spi.c +CSRCS = stm32_boot.c ifeq ($(CONFIG_ARCH_LEDS),y) CSRCS += stm32_autoleds.c @@ -52,4 +53,12 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y) CSRCS += stm32_appinitialize.c endif +ifeq ($(CONFIG_SPI),y) +CSRCS += stm32_spi.c +endif + +ifeq ($(HAVE_SDIO),y) +CSRCS += stm32_sdio.c +endif + include $(TOPDIR)/configs/Board.mk diff --git a/configs/nucleo-144/src/nucleo-144.h b/configs/nucleo-144/src/nucleo-144.h index a5766c4497c..3e35c0821a7 100644 --- a/configs/nucleo-144/src/nucleo-144.h +++ b/configs/nucleo-144/src/nucleo-144.h @@ -1,9 +1,10 @@ -/**************************************************************************************************** +/************************************************************************************ * configs/nucleo-144/src/nucleo-144.h * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Mark Olsson + * Authors: Gregory Nutt + * Mark Olsson + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -32,22 +33,25 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ****************************************************************************************************/ + ************************************************************************************/ #ifndef __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H #define __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H -/**************************************************************************************************** +/************************************************************************************ * Included Files - ****************************************************************************************************/ + ************************************************************************************/ #include #include #include -/**************************************************************************************************** +/************************************************************************************ * Pre-processor Definitions - ****************************************************************************************************/ + ************************************************************************************/ + +/* Configuration ********************************************************************/ + /* procfs File System */ #ifdef CONFIG_FS_PROCFS @@ -58,49 +62,128 @@ # endif #endif -/* STM32F736G Discovery GPIOs ***********************************************************************/ -/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the reset button, that - * can be controlled by software (LD2 is a power indicator, LD3-6 indicate USB status, LD7 is - * controlled by the ST-Link). +/* Nucleo-144 GPIO Pin Definitions **************************************************/ +/* LED * - * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. One end of LD1 is - * grounded so a high output on PI1 will illuminate the LED. + * The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED, LD2 a + * Blue LED and LD3 a Red LED, that can be controlled by software. The following definitions assume + * the default Solder Bridges are installed. */ -#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ - GPIO_PORTB | GPIO_PIN0) -#define GPIO_LD2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ - GPIO_PORTB | GPIO_PIN7) -#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ - GPIO_PORTB | GPIO_PIN14) +#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTB | GPIO_PIN0) +#define GPIO_LD2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTB | GPIO_PIN7) +#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTB | GPIO_PIN14) + +#define GPIO_LED_GREEN GPIO_LD1 +#define GPIO_LED_BLUE GPIO_LD2 +#define GPIO_LED_RED GPIO_LD3 #define LED_DRIVER_PATH "/dev/userleds" -/* Pushbutton B1, labelled "User", is connected to GPIO PC13. A high value will be sensed when the - * button is depressed. Note that the EXTI interrupt is configured. +/* BUTTONS + * + * The Blue pushbutton B1, labeled "User", is connected to GPIO PC13. A high value + * will be sensed when the button is depressed. + * Note: + * 1) That the EXTI is included in the definition to enable an interrupt on this + * IO. + * 2) The following definitions assume the default Solder Bridges are installed. */ -#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13) +#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13) -/**************************************************************************************************** +/* SPI *************************************************************************** + * + */ +#define GPIO_SPI_CS (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \ + GPIO_OUTPUT_SET) + +#define GPIO_SPI1_CS0 (GPIO_SPI_CS | GPIO_PORTA | GPIO_PIN15) +#define GPIO_SPI1_CS1 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN13) +#define GPIO_SPI1_CS2 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN13) +#define GPIO_SPI1_CS3 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN14) +#define GPIO_SPI2_CS0 (GPIO_SPI_CS | GPIO_PORTD | GPIO_PIN7) +#define GPIO_SPI2_CS1 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN15) +#define GPIO_SPI2_CS2 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN2) +#define GPIO_SPI2_CS3 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN3) +#define GPIO_SPI3_CS0 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN4) +#define GPIO_SPI3_CS1 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN5) +#define GPIO_SPI3_CS2 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN6) +#define GPIO_SPI3_CS3 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN7) + +/* Logical SPI Chip Selects used to index */ + +#define NUCLEO_SPI_BUS1_CS0 0 +#define NUCLEO_SPI_BUS1_CS1 1 +#define NUCLEO_SPI_BUS1_CS2 2 +#define NUCLEO_SPI_BUS1_CS3 3 +#define NUCLEO_SPI_BUS2_CS0 4 +#define NUCLEO_SPI_BUS2_CS1 5 +#define NUCLEO_SPI_BUS2_CS2 6 +#define NUCLEO_SPI_BUS2_CS3 7 +#define NUCLEO_SPI_BUS3_CS0 8 +#define NUCLEO_SPI_BUS3_CS1 9 +#define NUCLEO_SPI_BUS3_CS2 10 +#define NUCLEO_SPI_BUS3_CS3 11 + +#if defined(CONFIG_STM32_SDIO) +#define GPIO_SDIO_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI | GPIO_PORTB | GPIO_PIN15) +#endif + +/************************************************************************************ * Public data - ****************************************************************************************************/ + ************************************************************************************/ #ifndef __ASSEMBLY__ -/**************************************************************************************************** +/************************************************************************************ * Public Functions - ****************************************************************************************************/ + ************************************************************************************/ -/**************************************************************************************************** +/************************************************************************************ * Name: stm32_spidev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the stm32f746g-disco board. + * Called to configure SPI chip select GPIO pins for the Nucleo-144 board. * - ****************************************************************************************************/ + ************************************************************************************/ -void weak_function stm32_spidev_initialize(void); +#if defined(CONFIG_SPI) +void stm32_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: stm32_spidev_bus_test + * + * Description: + * Called to create the defined SPI buses and test them by initializing them + * and sending the NUCLEO_SPI_TEST (no chip select). + * + ************************************************************************************/ + +#if defined(NUCLEO_SPI_TEST) +int stm32_spidev_bus_test(void); +#endif + +/************************************************************************************ + * Name: stm32_dma_alloc_init + * + * Description: + * Called to create a FAT DMA allocator + * + * Returned Value: + * 0 on success or -ENOMEM + * + ************************************************************************************/ + +void stm32_dma_alloc_init(void); + +#if defined (CONFIG_FAT_DMAMEMORY) +int stm32_dma_alloc_init(void); +#endif #endif /* __ASSEMBLY__ */ #endif /* __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H */ diff --git a/configs/nucleo-144/src/stm32_appinitialize.c b/configs/nucleo-144/src/stm32_appinitialize.c index e1b318684c8..df411ad94e1 100644 --- a/configs/nucleo-144/src/stm32_appinitialize.c +++ b/configs/nucleo-144/src/stm32_appinitialize.c @@ -2,8 +2,9 @@ * config/nucleo-144/src/stm32_appinitilaize.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Mark Olsson + * Authors: Gregory Nutt + * Mark Olsson + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -39,6 +40,8 @@ ****************************************************************************/ #include + +#include #include #include "nucleo-144.h" @@ -75,9 +78,20 @@ int board_app_initialize(uintptr_t arg) { -#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER) int ret; +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n", + STM32_PROCFS_MOUNTPOINT, ret); + } +#endif + +#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER) /* Register the LED driver */ ret = userled_lower_initialize(LED_DRIVER_PATH); @@ -87,5 +101,36 @@ int board_app_initialize(uintptr_t arg) } #endif +#if defined(CONFIG_FAT_DMAMEMORY) + if (stm32_dma_alloc_init() < 0) + { + syslog(LOG_ERR, "DMA alloc FAILED"); + } +#endif + +#if defined(CONFIG_NUCLEO_SPI_TEST) + /* Create SPI interfaces */ + + ret = stm32_spidev_bus_init(); + if (ret != OK) + { + fdbg("ERROR: Failed to initialize SPI interfaces: %d\n", ret); + return ret; + } +#endif + +#if defined(CONFIG_MMCSD) + /* Configure SDIO */ + /* Initialize the SDIO block driver */ + + ret = stm32_sdio_initialize(); + if (ret != OK) + { + fdbg("ERROR: Failed to initialize MMC/SD driver: %d\n", ret); + return ret; + } +#endif + + UNUSED(ret); return OK; } diff --git a/configs/nucleo-144/src/stm32_autoleds.c b/configs/nucleo-144/src/stm32_autoleds.c index e9114391aff..e78621c9040 100644 --- a/configs/nucleo-144/src/stm32_autoleds.c +++ b/configs/nucleo-144/src/stm32_autoleds.c @@ -2,7 +2,8 @@ * configs/nucleo-144/src/stm32_autoleds.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -43,10 +44,10 @@ #include #include +#include #include "stm32_gpio.h" #include "nucleo-144.h" - #ifdef CONFIG_ARCH_LEDS /**************************************************************************** @@ -65,6 +66,34 @@ # define ledvdbg(x...) #endif +#define ArraySize(x) (sizeof((x)) / sizeof((x)[0])) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Indexed by BOARD_LED_ */ + +static const uint32_t g_ledmap[BOARD_NLEDS] = +{ + GPIO_LED_GREEN, + GPIO_LED_BLUE, + GPIO_LED_RED, +}; + +static bool g_initialized; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void phy_set_led(int led, bool state) +{ + /* Active High */ + + stm32_gpiowrite(g_ledmap[led], state); +} + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -75,9 +104,14 @@ void board_autoled_initialize(void) { + int i; + /* Configure the LD1 GPIO for output. Initial state is OFF */ - stm32_configgpio(GPIO_LD1); + for (i = 0; i < ArraySize(g_ledmap); i++) + { + stm32_configgpio(g_ledmap[i]); + } } /**************************************************************************** @@ -86,28 +120,47 @@ void board_autoled_initialize(void) void board_autoled_on(int led) { - bool ledstate = false; - switch (led) { - case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ - /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ - /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ - break; /* Leave ledstate == true to turn OFF */ - default: - case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ - /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ - /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ - return; /* Return to leave STATUS LED unchanged */ - - case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ - case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ - ledstate = true; /* Set ledstate == false to turn ON */ break; - } - stm32_gpiowrite(GPIO_LD1, ledstate); + case LED_HEAPALLOCATE: + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_IRQSENABLED: + phy_set_led(BOARD_LED_BLUE, false); + phy_set_led(BOARD_LED_GREEN, true); + break; + + case LED_STACKCREATED: + phy_set_led(BOARD_LED_GREEN, true); + phy_set_led(BOARD_LED_BLUE, true); + g_initialized = true; + break; + + case LED_INIRQ: + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_SIGNAL: + phy_set_led(BOARD_LED_GREEN, true); + break; + + case LED_ASSERTION: + phy_set_led(BOARD_LED_RED, true); + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_PANIC: + phy_set_led(BOARD_LED_RED, true); + break; + + case LED_IDLE : /* IDLE */ + phy_set_led(BOARD_LED_RED, true); + break; + } } /**************************************************************************** @@ -118,26 +171,29 @@ void board_autoled_off(int led) { switch (led) { - /* These should not happen and are ignored */ - default: - case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ - /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ - /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ - case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ - - /* These result in no-change */ - - case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ - /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ - /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ - return; /* Return to leave STATUS LED unchanged */ - - /* Turn STATUS LED off set driving the output high */ - - case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ - stm32_gpiowrite(GPIO_LD1, false); break; + + case LED_SIGNAL: + phy_set_led(BOARD_LED_GREEN, false); + break; + + case LED_INIRQ: + phy_set_led(BOARD_LED_BLUE, false); + break; + + case LED_ASSERTION: + phy_set_led(BOARD_LED_RED, false); + phy_set_led(BOARD_LED_BLUE, false); + break; + + case LED_PANIC: + phy_set_led(BOARD_LED_RED, false); + break; + + case LED_IDLE : /* IDLE */ + phy_set_led(BOARD_LED_RED, false); + break; } } diff --git a/configs/nucleo-144/src/stm32_boot.c b/configs/nucleo-144/src/stm32_boot.c index 210c0982a3d..87286e934d7 100644 --- a/configs/nucleo-144/src/stm32_boot.c +++ b/configs/nucleo-144/src/stm32_boot.c @@ -2,7 +2,8 @@ * configs/nucleo-144/src/stm32_boot.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -63,24 +64,17 @@ void stm32_boardinitialize(void) { -#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \ - defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \ - defined(CONFIG_STM32F7_SPI5) - /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function - * stm32_spidev_initialize() has been brought into the link. - */ - - if (stm32_spidev_initialize) - { - stm32_spidev_initialize(); - } -#endif - #ifdef CONFIG_ARCH_LEDS /* Configure on-board LEDs if LED support has been selected. */ board_autoled_initialize(); #endif + +#if defined(CONFIG__SPI) + /* Configure SPI chip selects */ + + stm32_spidev_initialize(); +#endif } /************************************************************************************ diff --git a/configs/nucleo-144/src/stm32_buttons.c b/configs/nucleo-144/src/stm32_buttons.c index 54a7dafbfba..c2d16e50b1b 100644 --- a/configs/nucleo-144/src/stm32_buttons.c +++ b/configs/nucleo-144/src/stm32_buttons.c @@ -2,7 +2,8 @@ * configs/nucleo-144/src/stm32_buttons.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -102,7 +103,14 @@ uint8_t board_buttons(void) #ifdef CONFIG_ARCH_IRQBUTTONS xcpt_t board_button_irq(int id, xcpt_t irqhandler) { -#warning Missing logic + xcpt_t oldhandler = NULL; + + if (id == BUTTON_USER) + { + oldhandler = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler); + } + + return oldhandler; } #endif #endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/nucleo-144/src/stm32_dma_alloc.c b/configs/nucleo-144/src/stm32_dma_alloc.c new file mode 100644 index 00000000000..7ce0af1790d --- /dev/null +++ b/configs/nucleo-144/src/stm32_dma_alloc.c @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/nucleo-144/stc/stm32_dma_alloc.c + * + * Copyright (C) 2016 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include +#include +#include + +#include "nucleo-144.h" + +#if defined(CONFIG_FAT_DMAMEMORY) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if !defined(CONFIG_GRAN) +# error microSD DMA support requires CONFIG_GRAN +#endif + +#define BOARD_DMA_ALLOC_POOL_SIZE (8*512) + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static GRAN_HANDLE dma_allocator; + +/* The DMA heap size constrains the total number of things that can be + * ready to do DMA at a time. + * + * For example, FAT DMA depends on one sector-sized buffer per filesystem plus + * one sector-sized buffer per file. + * + * We use a fundamental alignment / granule size of 64B; this is sufficient + * to guarantee alignment for the largest STM32 DMA burst (16 beats x 32bits). + */ + +static uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] __attribute__((aligned(64))); + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_dma_alloc_init + * + * Description: + * All boards may optionally provide this API to instantiate a pool of + * memory for uses with FAST FS DMA operations. + * + ************************************************************************************/ + +int stm32_dma_alloc_init(void) +{ + dma_allocator = gran_initialize(g_dma_heap, + sizeof(g_dma_heap), + 7, /* 128B granule - must be > alignment (XXX bug?) */ + 6); /* 64B alignment */ + + if (dma_allocator == NULL) + { + return -ENOMEM; + } + + return OK; +} + +/* DMA-aware allocator stubs for the FAT filesystem. */ + +void *fat_dma_alloc(size_t size) +{ + return gran_alloc(dma_allocator, size); +} + +void fat_dma_free(FAR void *memory, size_t size) +{ + gran_free(dma_allocator, memory, size); +} + +#endif /* CONFIG_FAT_DMAMEMORY */ diff --git a/configs/nucleo-144/src/stm32_sdio.c b/configs/nucleo-144/src/stm32_sdio.c new file mode 100644 index 00000000000..21c5d2eafd3 --- /dev/null +++ b/configs/nucleo-144/src/stm32_sdio.c @@ -0,0 +1,176 @@ +/**************************************************************************** + * config/nucleo-144/src/stm32_sdio.c + * + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "stm32.h" +#include "nucleo-144.h" + +#ifdef HAVE_SDIO + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* Card detections requires card support and a card detection GPIO */ + +#define HAVE_NCD 1 +#if !defined(CONFIG_STM32_SDIO) || !defined(GPIO_SDIO_NCD) +# undef HAVE_NCD +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static FAR struct sdio_dev_s *g_sdio_dev; +#ifdef HAVE_NCD +static bool g_sd_inserted = 0xff; /* Impossible value */ +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_ncd_interrupt + * + * Description: + * Card detect interrupt handler. + * + ****************************************************************************/ + +#ifdef HAVE_NCD +static int stm32_ncd_interrupt(int irq, FAR void *context) +{ + bool present; + + present = !stm32_gpioread(GPIO_SDIO_NCD); + if (present != g_sd_inserted) + { + sdio_mediachange(g_sdio_dev, present); + g_sd_inserted = present; + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_sdio_initialize + * + * Description: + * Initialize SDIO-based MMC/SD card support + * + ****************************************************************************/ + +int stm32_sdio_initialize(void) +{ + int ret; + +#ifdef HAVE_NCD + /* Card detect */ + + bool cd_status; + + /* Configure the card detect GPIO */ + + stm32_configgpio(GPIO_SDIO_NCD); + + /* Register an interrupt handler for the card detect pin */ + + stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true, stm32_ncd_interrupt); +#endif + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + fvdbg("Initializing SDIO slot %d\n", SDIO_SLOTNO); + + g_sdio_dev = sdio_initialize(SDIO_SLOTNO); + if (!g_sdio_dev) + { + fdbg("Failed to initialize SDIO slot %d\n", SDIO_SLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + fvdbg("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR); + + ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev); + if (ret != OK) + { + fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + fvdbg("Successfully bound SDIO to the MMC/SD driver\n"); + +#ifdef HAVE_NCD + /* Use SD card detect pin to check if a card is g_sd_inserted */ + + cd_status = !stm32_gpioread(GPIO_SDIO_NCD); + fvdbg("Card detect : %d\n", cd_status); + + sdio_mediachange(g_sdio_dev, cd_status); +#else + /* Assume that the SD card is inserted. What choice do we have? */ + + sdio_mediachange(g_sdio_dev, true); +#endif + + return OK; +} + +#endif /* HAVE_SDIO */ diff --git a/configs/nucleo-144/src/stm32_spi.c b/configs/nucleo-144/src/stm32_spi.c index e31a63a11de..906815d5324 100644 --- a/configs/nucleo-144/src/stm32_spi.c +++ b/configs/nucleo-144/src/stm32_spi.c @@ -3,6 +3,7 @@ * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -49,13 +50,12 @@ #include "up_arch.h" #include "chip.h" +#include "stm32_gpio.h" #include "stm32_spi.h" #include "nucleo-144.h" -#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \ - defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \ - defined(CONFIG_STM32F7_SPI5) +#if defined(CONFIG_SPI) /************************************************************************************ * Pre-processor Definitions @@ -74,6 +74,108 @@ # define spivdbg(x...) #endif +#define ArraySize(x) (sizeof((x)) / sizeof((x)[0])) + +#if defined(CONFIG_NUCLEO_SPI1_TEST) +# if defined(CONFIG_NUCLEO_SPI1_TEST_MODE0) +# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE0 +# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE1) +# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE1 +# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE2) +# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE2 +# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE3) +# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE3 +# else +# error "No CONFIG_NUCLEO_SPI1_TEST_MODEx defined" +# endif +#endif + +#if defined(CONFIG_NUCLEO_SPI2_TEST) +# if defined(CONFIG_NUCLEO_SPI2_TEST_MODE0) +# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE0 +# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE1) +# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE1 +# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE2) +# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE2 +# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE3) +# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE3 +# else +# error "No CONFIG_NUCLEO_SPI2_TEST_MODEx defined" +# endif +#endif + +#if defined(CONFIG_NUCLEO_SPI3_TEST) +# if defined(CONFIG_NUCLEO_SPI3_TEST_MODE0) +# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE0 +# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE1) +# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE1 +# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE2) +# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE2 +# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE3) +# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE3 +# else +# error "No CONFIG_NUCLEO_SPI3_TEST_MODEx defined" +# endif +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/* Indexed by NUCLEO_SPI_BUSx_CSx */ + +static const uint32_t g_spigpio[] = +{ +#if defined(GPIO_SPI1_CS0) + GPIO_SPI1_CS0, +#endif +#if defined(GPIO_SPI1_CS1) + GPIO_SPI1_CS1, +#endif +#if defined(GPIO_SPI1_CS2) + GPIO_SPI1_CS2, +#endif +#if defined(GPIO_SPI1_CS3) + GPIO_SPI1_CS3, +#endif +#if defined(GPIO_SPI2_CS0) + GPIO_SPI2_CS0, +#endif +#if defined(GPIO_SPI2_CS1) + GPIO_SPI2_CS1, +#endif +#if defined(GPIO_SPI2_CS2) + GPIO_SPI2_CS2, +#endif +#if defined(GPIO_SPI2_CS3) + GPIO_SPI2_CS3, +#endif +#if defined(GPIO_SPI3_CS0) + GPIO_SPI3_CS0, +#endif +#if defined(GPIO_SPI3_CS1) + GPIO_SPI3_CS1, +#endif +#if defined(GPIO_SPI3_CS2) + GPIO_SPI3_CS2, +#endif +#if defined(GPIO_SPI3_CS3) + GPIO_SPI3_CS3, +#endif +}; + +#if defined(CONFIG_NUCLEO_SPI_TEST) +# if defined(CONFIG_STM32F7_SPI1) +struct spi_dev_s *spi1; +# endif +# if defined(CONFIG_STM32F7_SPI2) +struct spi_dev_s *spi2; +# endif +# if defined(CONFIG_STM32F7_SPI3) +struct spi_dev_s *spi3; +# endif +#endif + /************************************************************************************ * Public Functions ************************************************************************************/ @@ -82,12 +184,20 @@ * Name: stm32_spidev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the stm32f746g-disco board. + * Called to configure SPI chip select GPIO pins for the Nucleo-144 board. * ************************************************************************************/ void weak_function stm32_spidev_initialize(void) { + int i; + + /* Configure SPI CS GPIO for output */ + + for (i = 0; i < ArraySize(g_spigpio); i++) + { + stm32_configgpio(g_spigpio[i]); + } } /**************************************************************************** @@ -119,6 +229,7 @@ void weak_function stm32_spidev_initialize(void) void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); } uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -131,6 +242,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); } uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -143,6 +255,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); } uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -152,9 +265,14 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) #endif #ifdef CONFIG_STM32F7_SPI4 +# ifndef NUCLEO_SPI_BUS4_CS0 +# error "NUCLEO_SPI_BUS4_CSn Are not defined" +# endif + void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); } uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -164,9 +282,30 @@ uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) #endif #ifdef CONFIG_STM32F7_SPI5 +# ifndef NUCLEO_SPI_BUS5_CS0 +# error "NUCLEO_SPI_BUS4_CSn Are not defined" +# endif + void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); +} + +uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI6 +# ifndef NUCLEO_SPI_BUS6_CS +# error "NUCLEO_SPI_BUS4_CSn Are not defined" +# endif +void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); } uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -234,5 +373,72 @@ int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) } #endif +#ifdef CONFIG_STM32F7_SPI6 +int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + #endif /* CONFIG_SPI_CMDDATA */ -#endif /* CONFIG_STM32F7_SPI1 || ... CONFIG_STM32F7_SPI5 */ + +#if defined(CONFIG_NUCLEO_SPI_TEST) +int stm32_spidev_bus_init(void) +{ + /* Configure and test SPI-*/ + + uint8_t *tx = CONFIG_NUCLEO_SPI_TEST_MESSAGE; + +#if defined(CONFIG_NUCLEO_SPI1_TEST) + spi1 = stm32_spibus_initialize(1); + + if (!spi1) + { + syslog(LOG_ERR, "ERROR Failed to initialize SPI port 1\n"); + return -ENODEV; + } + + /* Default SPI1 to NUCLEO_SPI1_FREQ and mode */ + + SPI_SETFREQUENCY(spi1, CONFIG_NUCLEO_SPI1_TEST_FREQ); + SPI_SETBITS(spi1, CONFIG_NUCLEO_SPI1_TEST_BITS); + SPI_SETMODE(spi1, CONFIG_NUCLEO_SPI1_TEST_MODE); + SPI_EXCHANGE(spi1, tx, NULL, ArraySize(CONFIG_NUCLEO_SPI_TEST_MESSAGE)); +#endif + +#if defined(CONFIG_NUCLEO_SPI2_TEST) + spi2 = stm32_spibus_initialize(2); + + if (!spi2) + { + syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n"); + return -ENODEV; + } + + /* Default SPI1 to NUCLEO_SPI2_FREQ and mode */ + + SPI_SETFREQUENCY(spi2, CONFIG_NUCLEO_SPI1_TEST_FREQ); + SPI_SETBITS(spi2, CONFIG_NUCLEO_SPI2_TEST_BITS); + SPI_SETMODE(spi2, CONFIG_NUCLEO_SPI2_TEST_MODE); + SPI_EXCHANGE(spi2, tx, NULL, ArraySize(CONFIG_NUCLEO_SPI_TEST_MESSAGE)); +#endif + +#if defined(CONFIG_NUCLEO_SPI3_TEST) + spi3 = stm32_spibus_initialize(3); + + if (!spi3) + { + syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n"); + return -ENODEV; + } + + /* Default SPI1 to NUCLEO_SPI3_FREQ and mode */ + + SPI_SETFREQUENCY(spi3, CONFIG_NUCLEO_SPI3_TEST_FREQ); + SPI_SETBITS(spi3, CONFIG_NUCLEO_SPI3_TEST_BITS); + SPI_SETMODE(spi3, CONFIG_NUCLEO_SPI3_TEST_MODE); + SPI_EXCHANGE(spi3, tx, NULL, ArraySize(CONFIG_NUCLEO_SPI_TEST_MESSAGE)); +#endif +} +#endif /* NUCLEO_SPI_TEST */ +#endif /* defined(CONFIG_SPI) */ diff --git a/configs/nucleo-144/src/stm32_userleds.c b/configs/nucleo-144/src/stm32_userleds.c index 4ec9f209479..a2e4577f15a 100644 --- a/configs/nucleo-144/src/stm32_userleds.c +++ b/configs/nucleo-144/src/stm32_userleds.c @@ -2,8 +2,9 @@ * configs/nucleo-144/src/stm32_userleds.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Mark Olsson + * Authors: Gregory Nutt + * Mark Olsson + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -43,6 +44,7 @@ #include #include +#include #include #include "stm32_gpio.h" @@ -66,15 +68,21 @@ # define ledvdbg(x...) #endif +#define ArraySize(x) (sizeof((x)) / sizeof((x)[0])) + /**************************************************************************** * Private Data ****************************************************************************/ -/* This array maps an LED number to GPIO pin configuration */ +/* This array maps an LED number to GPIO pin configuration and is indexed by + * BOARD_LED_ + */ -static const uint32_t g_ledcfg[3] = +static const uint32_t g_ledcfg[BOARD_NLEDS] = { - GPIO_LD1, GPIO_LD2, GPIO_LD3 + GPIO_LED_GREEN, + GPIO_LED_BLUE, + GPIO_LED_RED, }; /**************************************************************************** @@ -98,7 +106,7 @@ void board_userled_initialize(void) /* Configure LED1-3 GPIOs for output */ - for (i = 0; i < 3; i++) + for (i = 0; i < ArraySize(g_ledcfg); i++) { stm32_configgpio(g_ledcfg[i]); } @@ -116,10 +124,10 @@ void board_userled_initialize(void) void board_userled(int led, bool ledon) { - if ((unsigned)led < 3) - { - stm32_gpiowrite(g_ledcfg[led], ledon); - } + if ((unsigned)led < ArraySize(g_ledcfg)) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } } /**************************************************************************** @@ -139,7 +147,7 @@ void board_userled_all(uint8_t ledset) /* Configure LED1-3 GPIOs for output */ - for (i = 0; i < 3; i++) + for (i = 0; i < ArraySize(g_ledcfg); i++) { stm32_gpiowrite(g_ledcfg[i], (ledset & (1 << i)) != 0); }