diff --git a/arch/arm/src/stm32l4/stm32l4_lse.c b/arch/arm/src/stm32l4/stm32l4_lse.c
index 3cd028b2836..cc193e949e4 100644
--- a/arch/arm/src/stm32l4/stm32l4_lse.c
+++ b/arch/arm/src/stm32l4/stm32l4_lse.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32l4/stm32l4_lse.c
  *
- *   Copyright (C) 2009, 2011, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: dev@ziggurat29.com
  *
  * Redistribution and use in source and binary forms, with or without
@@ -45,18 +45,6 @@
 #include "stm32l4_rcc.h"
 #include "stm32l4_waste.h"
 
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -88,8 +76,8 @@ void stm32l4_rcc_enablelse(void)
    * the RCC BDCR register.
    */
 
-  regval = getreg32(STM32L4_RCC_BDCR);
-  regval |= RCC_BDCR_LSEON|RCC_BDCR_LSEDRV_MIDHI;
+  regval  = getreg32(STM32L4_RCC_BDCR);
+  regval |= RCC_BDCR_LSEON | RCC_BDCR_LSEDRV_MIDHI;
   putreg32(regval,STM32L4_RCC_BDCR);
 
   /* Wait for the LSE clock to be ready */
diff --git a/arch/arm/src/stm32l4/stm32l4_pwr.c b/arch/arm/src/stm32l4/stm32l4_pwr.c
index d17c9d6fba8..972388e82d6 100644
--- a/arch/arm/src/stm32l4/stm32l4_pwr.c
+++ b/arch/arm/src/stm32l4/stm32l4_pwr.c
@@ -2,7 +2,7 @@
  * arch/arm/src/stm32l4/stm32l4_pwr.c
  *
  *   Copyright (C) 2011 Uros Platise. All rights reserved.
- *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
  *   Authors: Uros Platise <uros.platise@isotel.eu>
  *            Gregory Nutt <gnutt@nuttx.org>
  *            dev@ziggurat29.com
@@ -51,11 +51,6 @@
 #include "stm32l4_pwr.h"
 #include "stm32l4_rcc.h"
 
-
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
 /************************************************************************************
  * Private Functions
  ************************************************************************************/
@@ -103,8 +98,7 @@ bool stm32l4_pwr_enableclk(bool enable)
   regval = getreg32(STM32L4_RCC_APB1ENR1);
   wasenabled = ((regval & RCC_APB1ENR1_PWREN) != 0);
 
-  /* Power interface clock enable.
-   */
+  /* Power interface clock enable. */
 
   if (wasenabled && !enable)
     {
diff --git a/arch/arm/src/stm32l4/stm32l4_pwr.h b/arch/arm/src/stm32l4/stm32l4_pwr.h
index b22eebb06c0..6c065f3d442 100644
--- a/arch/arm/src/stm32l4/stm32l4_pwr.h
+++ b/arch/arm/src/stm32l4/stm32l4_pwr.h
@@ -1,7 +1,7 @@
 /************************************************************************************
  * arch/arm/src/stm32l4/stm32l4_pwr.h
  *
- *   Copyright (C) 2009, 2013, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: dev@ziggurat29.com
  *
  * Redistribution and use in source and binary forms, with or without
@@ -84,7 +84,6 @@ extern "C"
 
 bool stm32l4_pwr_enableclk(bool enable);
 
-
 /************************************************************************************
  * Name: stm32l4_pwr_enablebkp
  *
diff --git a/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c b/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
index e3901207272..8e4cbe624cf 100644
--- a/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
+++ b/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
@@ -581,7 +581,7 @@ static void stm32l4_stdclockconfig(void)
 #  error STM32L4_BOARD_USEMSI not yet implemented in arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
   /* setting MSIRANGE */
   /* setting MSIPLLEN */
-  
+
   regval  = getreg32(STM32L4_RCC_CR);
   regval |= RCC_CR_MSION;           /* Enable MSI */
   putreg32(regval, STM32L4_RCC_CR);
@@ -621,9 +621,8 @@ static void stm32l4_stdclockconfig(void)
     {
 #warning todo: regulator voltage according to clock freq
 #if 0
-      /* ensure Power control is enabled before modifying it
-       */
-      
+      /* Ensure Power control is enabled before modifying it. */
+
       regval  = getreg32(STM32L4_RCC_APB1ENR);
       regval |= RCC_APB1ENR_PWREN;
       putreg32(regval, STM32L4_RCC_APB1ENR);
@@ -631,7 +630,7 @@ static void stm32l4_stdclockconfig(void)
       /* Select regulator voltage output Scale 1 mode to support system
        * frequencies up to 168 MHz.
        */
-      
+
       regval  = getreg32(STM32L4_PWR_CR);
       regval &= ~PWR_CR_VOS_MASK;
       regval |= PWR_CR_VOS_SCALE_1;