diff --git a/arch/arm/src/cxd56xx/Kconfig b/arch/arm/src/cxd56xx/Kconfig
index 998302b01ca..5b2f5af3de3 100644
--- a/arch/arm/src/cxd56xx/Kconfig
+++ b/arch/arm/src/cxd56xx/Kconfig
@@ -24,7 +24,7 @@ config CXD56_FCBGA
 config CXD56_WLCSP
 	bool "WLCSP 100 pin package"
 
-endchoice
+endchoice # CXD56xx package selection
 
 choice
 	prompt "CXD56xx core selection"
@@ -36,7 +36,7 @@ config CXD56_MAINCORE
 config CXD56_SUBCORE
 	bool "Sub Core"
 
-endchoice
+endchoice # CXD56xx core selection
 
 config CXD56_CUSTOM_PINCONFIG
 	bool "Board-specific pin configuration"
@@ -178,7 +178,8 @@ config CXD56_TIMER_DIVIDER_16
 config CXD56_TIMER_DIVIDER_256
 	bool "Divider 256"
 
-endchoice
+endchoice # Timer divider selection
+
 endif # CXD56_TIMER
 
 menuconfig CXD56_WDT
@@ -500,7 +501,6 @@ config CXD56_DMAC_SPI4_RX
 	bool "DMAC support for SPI4 RX"
 	default n
 	select CXD56_DMAC
-
 	---help---
 		Enables DMAC for SPI4 RX
 
diff --git a/arch/arm/src/mps/Kconfig b/arch/arm/src/mps/Kconfig
index 8a89ae6da9d..a0d224ce212 100644
--- a/arch/arm/src/mps/Kconfig
+++ b/arch/arm/src/mps/Kconfig
@@ -45,8 +45,8 @@ config ARCH_CHIP_MPS3_AN547
 	select ARCH_HAVE_TEXT_HEAP
 	select ARCH_HAVE_DATA_HEAP
 
-endchoice
+endchoice # ARM MPS Configuration
 
-endmenu
+endmenu # MPS Chip Selection
 
-endif
+endif # ARCH_CHIP_MPS
diff --git a/arch/arm/src/nrf52/Kconfig b/arch/arm/src/nrf52/Kconfig
index bd3af5ff3af..eb2d0847bdb 100644
--- a/arch/arm/src/nrf52/Kconfig
+++ b/arch/arm/src/nrf52/Kconfig
@@ -660,7 +660,7 @@ config NRF52_RADIO_IEEE802154_TRACE_BUFSIZE
 	depends on NRF52_RADIO_IEEE802154_TRACE
 	default 1024
 
-endif
+endif # NRF52_RADIO_IEEE802154
 
 endif #NRF52_RADIO
 
@@ -836,7 +836,7 @@ config NRF52_SDC_MULTIROLE
 config NRF52_SDC_CENTRAL
 	bool "BLE Central role"
 
-endchoice
+endchoice # BLE Controller role
 
 config NRF52_SDC_CLOCK_ACCURACY
 	int "Clock Accuracy [PPM]"
@@ -882,7 +882,7 @@ config NRF52_SDC_SCAN_BUFFER_COUNT
 	---help---
 		The minimum allowed number of buffers is 2.
 
-endif
+endif # NRF52_SDC_SCANNING
 
 config NRF52_SDC_LE_2M_PHY
 	bool "Support LE 2M PHY"
@@ -905,5 +905,4 @@ config NRF52_SDC_PUB_ADDR
 	hex "Configure BT public address"
 	default 0x0000000000
 
-endif
-
+endif # NRF52_SOFTDEVICE_CONTROLLER
diff --git a/arch/arm/src/stm32f0l0g0/Kconfig b/arch/arm/src/stm32f0l0g0/Kconfig
index 2262dbe0c91..b65c6bdb0d9 100644
--- a/arch/arm/src/stm32f0l0g0/Kconfig
+++ b/arch/arm/src/stm32f0l0g0/Kconfig
@@ -3695,14 +3695,14 @@ config STM32F0L0G0_ADC1_EXTSEL
 		Enable EXTSEL for ADC1.
 
 config STM32F0L0G0_ADC1_CONTINUOUS
-        bool "Enable ADC1 Continuous Conversion Mode"
-        default n
-        depends on STM32F0L0G0_ADC1
-        ---help---
-          If enabled, the ADC will operate in continuous conversion mode.
-          Otherwise, it will perform single conversions.
-             Note: Continuous and discontinuous mode cannot be defined at
-             the same time
+	bool "Enable ADC1 Continuous Conversion Mode"
+	default n
+	depends on STM32F0L0G0_ADC1
+	---help---
+		If enabled, the ADC will operate in continuous conversion mode.
+		Otherwise, it will perform single conversions.
+		Note: Continuous and discontinuous mode cannot be defined at
+		      the same time
 
 endmenu # ADC Configuration