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esp32s2: remove legacy bootloader support
Deprecate Legacy Boot for ESP32-S2. Signed-off-by: Almir Okato <almir.okato@espressif.com>
This commit is contained in:
Almir Okato
committed by
Alan Carvalho de Assis
Alan Carvalho de Assis
parent
16f8966fa9
commit
4178f3ede4
@@ -1,235 +0,0 @@
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/****************************************************************************
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* boards/xtensa/esp32s2/common/scripts/legacy_sections.ld
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* Default entry point: */
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ENTRY(__start);
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SECTIONS
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{
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/* Send .iram0 code to iram */
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.iram0.vectors :
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{
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_iram_start = ABSOLUTE(.);
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/* Vectors go to IRAM. */
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_init_start = ABSOLUTE(.);
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/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
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. = 0x0;
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KEEP (*(.window_vectors.text));
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. = 0x180;
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KEEP (*(.xtensa_level2_vector.text));
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. = 0x1c0;
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KEEP (*(.xtensa_level3_vector.text));
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. = 0x200;
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KEEP (*(.xtensa_level4_vector.text));
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. = 0x240;
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KEEP (*(.xtensa_level5_vector.text));
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. = 0x280;
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KEEP (*(.debug_exception_vector.text));
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. = 0x2c0;
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KEEP (*(.nmi_vector.text));
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. = 0x300;
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KEEP (*(.kernel_exception_vector.text));
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. = 0x340;
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KEEP (*(.user_exception_vector.text));
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. = 0x3c0;
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KEEP (*(.double_exception_vector.text));
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. = 0x400;
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*(.*_vector.literal)
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. = ALIGN (16);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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} >iram0_0_seg
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.iram0.text :
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{
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/* Code marked as running out of IRAM */
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*(.iram1 .iram1.*)
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/* align + add 16B for CPU dummy speculative instr. fetch */
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. = ALIGN(4) + 16;
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_iram_text = ABSOLUTE(.);
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} >iram0_0_seg
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.dram0_reserved_for_iram (NOLOAD):
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{
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. = ORIGIN(dram0_0_seg) + _iram_text - _iram_start;
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} >dram0_0_seg
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/* Shared RAM */
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.dram0.bss (NOLOAD) :
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{
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/* .bss initialized on power-up */
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. = ALIGN (8);
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_sbss = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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KEEP (*(.bss))
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*(.bss.*)
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*(.share.mem)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(8);
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_ebss = ABSOLUTE(.);
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} >dram0_0_seg
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.noinit (NOLOAD):
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{
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/* This section contains data that is not initialized during load,
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* or during the application's initialization sequence.
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*/
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. = ALIGN(4);
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*(.noinit)
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. = ALIGN(4);
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} >dram0_0_seg
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.dram0.data :
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{
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/* .data initialized on power-up in ROMed configurations. */
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_sdata = ABSOLUTE(.);
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KEEP (*(.data))
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KEEP (*(.data.*))
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KEEP (*(.gnu.linkonce.d.*))
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KEEP (*(.data1))
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KEEP (*(.sdata))
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KEEP (*(.sdata.*))
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KEEP (*(.gnu.linkonce.s.*))
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KEEP (*(.sdata2))
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KEEP (*(.sdata2.*))
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KEEP (*(.gnu.linkonce.s2.*))
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KEEP (*(.jcr))
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*(.dram1 .dram1.*)
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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/* Heap starts at the end of .data */
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_sheap = ABSOLUTE(.);
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} >dram0_0_seg
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.flash.rodata :
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{
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_srodata = ABSOLUTE(.);
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*(.rodata)
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*(.rodata.*)
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*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table)
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*(.gcc_except_table.*)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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*(.eh_frame)
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. = (. + 3) & ~ 3;
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/* C++ constructor and destructor tables, properly ordered: */
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_sinit = ABSOLUTE(.);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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_einit = ABSOLUTE(.);
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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_erodata = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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. = ALIGN(4);
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} >default_rodata_seg
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.flash.text :
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{
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_stext = .;
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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/* CPU will try to prefetch up to 16 bytes of instructions.
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* This means that any configuration (e.g. MMU, PMS) must allow
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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_etext = .;
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} >default_code_seg
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.rtc.text :
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{
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. = ALIGN(4);
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*(.rtc.literal .rtc.text)
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} >rtc_iram_seg
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.rtc.data :
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{
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*(.rtc.data)
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*(.rtc.rodata)
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/* Whatever is left from the RTC memory is used as a special heap. */
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. = ALIGN (4);
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_srtcheap = ABSOLUTE(.);
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} >rtc_slow_seg
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}
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@@ -35,8 +35,6 @@ ifeq ($(CONFIG_ESP32S2_APP_FORMAT_MCUBOOT),y)
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ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
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else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
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ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
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else
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ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
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endif
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ARCHPICFLAGS = -fpic
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@@ -35,8 +35,6 @@ ifeq ($(CONFIG_ESP32S2_APP_FORMAT_MCUBOOT),y)
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ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
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else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
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ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
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else
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ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
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endif
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ARCHPICFLAGS = -fpic
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@@ -35,8 +35,6 @@ ifeq ($(CONFIG_ESP32S2_APP_FORMAT_MCUBOOT),y)
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ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
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else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
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ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
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else
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ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
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endif
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ARCHPICFLAGS = -fpic
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