diff --git a/ChangeLog b/ChangeLog
index 0962166f511..69f6febf0d9 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -2281,5 +2281,7 @@
that this latter bugfix also fixes some STM32 USB performance problems.
* configs/hymini-stm32v: A configuration for the HY-Mini STM32v board contributed
by Laurent Latil. Theses changes also include support for the STM32F103VCT6.
+ * arch/configs/stm3240g-eval/src/up_pwm.c: Add hooks needed to use the new
+ apps/examples/pwm test of the STM32 PWM driver.
diff --git a/Documentation/NuttX.html b/Documentation/NuttX.html
index d55c727d2db..d3d4af4f125 100644
--- a/Documentation/NuttX.html
+++ b/Documentation/NuttX.html
@@ -8,7 +8,7 @@
NuttX RTOS
- Last Updated: December 6, 2011
+ Last Updated: December 19, 2011
|
@@ -463,7 +463,7 @@
- Network, USB (host), USB (device), serial, CAN, ADC, DAC driver architectures.
+ Network, USB (host), USB (device), serial, CAN, ADC, DAC, and PWM driver architectures.
diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html
index dc3dbc67286..293b7d683cf 100644
--- a/Documentation/NuttxPortingGuide.html
+++ b/Documentation/NuttxPortingGuide.html
@@ -12,7 +12,7 @@
NuttX RTOS Porting Guide
- Last Updated: December 14, 2011
+ Last Updated: December 19, 2011
|
@@ -126,7 +126,8 @@
6.3.8 SDIO Device Drivers
6.3.9 USB Host-Side Drivers
6.3.10 USB Device-Side Drivers
- 6.3.11 Analog (ADC/DAC) Drivers
+ 6.3.11 Analog (ADC/DAC) Drivers
+ 6.3.12 PWM Drivers
6.4 Power Management
@@ -3120,9 +3121,21 @@ extern void up_ledoff(int led);
+
+ The NuttX PWM driver is split into two parts:
+
+
+ -
+ An "upper half", generic driver that provides the comman PWM interface to application level code, and
+
+ -
+ A "lower half", platform-specific driver that implements the low-level timer controls to implement the PWM functionality.
+
+
-
- General header files for the NuttX analog reside in
include/nuttx/analog/.
+ General header files for the NuttX analog drivers reside in include/nuttx/analog/.
+ These header files includes both the application level interface to the analog driver as well as the interface between the "upper half" and "lower half" drivers.
-
Common analog logic and share-able analog drivers reside in the
drivers/analog/.
@@ -3182,6 +3195,41 @@ extern void up_ledoff(int led);
+
+
+ For the purposes of this driver, a PWM device is any device that generates periodic output pulses of controlled frequency and pulse width.
+ Such a device might be used, for example, to perform pulse-width modulated output or frequency/pulse-count modulated output
+ (such as might be needed to control a stepper motor).
+
+
+ The NuttX PWM driver is split into two parts:
+
+
+ -
+ An "upper half", generic driver that provides the comman PWM interface to application level code, and
+
+ -
+ A "lower half", platform-specific driver that implements the low-level timer controls to implement the PWM functionality.
+
+
+
+
+ -
+ The header file for the NuttX PWM driver reside at
include/nuttx/pwm.h.
+ This header file includes both the application level interface to the PWM driver as well as the interface between the "upper half" and "lower half" drivers.
+ The PWM module uses a standard character driver framework.
+ However, since the PWM driver is a devices control interface and not a data transfer interface,
+ the majority of the functionality available to the application is implemented in driver ioctl calls.
+
+ -
+ The generic, "upper half" PWM driver resides at
drivers/pwm.c.
+
+ -
+ Platform-specific PWM drivers reside in
arch/<architecture>/src/<chip> directory for the specific processor <architecture> and for the specific <chip> analog peripheral devices.
+
+
+
+
diff --git a/arch/arm/src/stm32/stm32_internal.h b/arch/arm/src/stm32/stm32_internal.h
index 0c1792230c9..8db936786e3 100644
--- a/arch/arm/src/stm32/stm32_internal.h
+++ b/arch/arm/src/stm32/stm32_internal.h
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/stm32_internal.h
*
* Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt
+ * Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c
index 3162d31d1b6..1e3f4f07d65 100644
--- a/arch/arm/src/stm32/stm32_pwm.c
+++ b/arch/arm/src/stm32/stm32_pwm.c
@@ -343,6 +343,8 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
{
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
+ pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+
/* Configure the PWM output pin, but do not start the timer yet */
stm32_configgpio(priv->pincfg);
@@ -370,6 +372,8 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
uint32_t pincfg;
+ pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+
/* Make sure that the output has been stopped */
pwm_stop(dev);
@@ -430,6 +434,9 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
uint16_t ocmode1;
uint16_t ocmode2;
+ pwmvdbg("TIM%d channel: %d frequency: %d duty: %08x\n",
+ priv->timid, priv->channel, info->frequency, info->duty);
+
/* Caculate optimal values for the timer prescaler and for the timer reload
* register. If' frequency' is the desired frequency, then
*
@@ -599,6 +606,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
break;
default:
+ pwmdbg("No such channel: %d\n", priv->channel);
return -EINVAL;
}
@@ -681,6 +689,10 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
cr1 |= GTIM_CR1_CEN;
pwm_putreg(priv, STM32_GTIM_CR1_OFFSET, ccmr2);
+
+ pwmvdbg("CR1: %04x CR2:%04x CCER: %08x CCMR1: %08x CCMR2: %08x\n",
+ cr1, cr2, ccer, ccmr1, ccmr2);
+
return OK;
}
@@ -706,6 +718,8 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regaddr;
uint32_t regval;
+ pwmvdbg("TIM%d\n", priv->timid);
+
switch (priv->timid)
{
#ifdef CONFIG_STM32_TIM1_PWM
@@ -792,11 +806,13 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
regval &= ~resetbit;
putreg32(regval, regaddr);
+
+ pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
return OK;
}
/****************************************************************************
- * Name:
+ * Name: pwm_ioctl
*
* Description:
* Lower-half logic may support platform-specific ioctl commands
@@ -813,8 +829,13 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
{
+#ifdef CONFIG_DEBUG_PWM
+ FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
+
/* There are no platform-specific ioctl commands */
+ pwmvdbg("TIM%d\n", priv->timid);
+#endif
return -ENOTTY;
}
@@ -843,6 +864,8 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer)
{
FAR struct stm32_pwmtimer_s *lower;
+ pwmvdbg("TIM%d\n", timer);
+
switch (timer)
{
#ifdef CONFIG_STM32_TIM1_PWM
@@ -906,6 +929,7 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer)
break;
#endif
default:
+ pwmdbg("No such timer configured\n");
return NULL;
}
diff --git a/arch/arm/src/stm32/stm32_pwm.h b/arch/arm/src/stm32/stm32_pwm.h
index bd881d3d416..b7179a7bcb5 100644
--- a/arch/arm/src/stm32/stm32_pwm.h
+++ b/arch/arm/src/stm32/stm32_pwm.h
@@ -33,8 +33,8 @@
*
************************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32_STM32_TIM_H
-#define __ARCH_ARM_SRC_STM32_STM32_TIM_H
+#ifndef __ARCH_ARM_SRC_STM32_STM32_PWM_H
+#define __ARCH_ARM_SRC_STM32_STM32_PWM_H
/* The STM32 does not have dedicated PWM hardware. Rather, pulsed output control
* is a capabilitiy of the STM32 timers. The logic in this file implements the
@@ -303,7 +303,7 @@
# endif
#endif
-#ifdef CONFIG_STM32_TIM14_PWM)
+#ifdef CONFIG_STM32_TIM14_PWM
# if !defined(CONFIG_STM32_TIM14_CHANNEL)
# error "CONFIG_STM32_TIM14_CHANNEL must be provided"
# elif CONFIG_STM32_TIM14_CHANNEL == 1
@@ -367,4 +367,4 @@ EXTERN FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer);
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_STM32_TIMx_PWM */
-#endif /* __ARCH_ARM_SRC_STM32_STM32_TIM_H */
+#endif /* __ARCH_ARM_SRC_STM32_STM32_PWM_H */
diff --git a/configs/stm3240g-eval/include/board.h b/configs/stm3240g-eval/include/board.h
index 663ad7edaf3..ba1016910a8 100755
--- a/configs/stm3240g-eval/include/board.h
+++ b/configs/stm3240g-eval/include/board.h
@@ -263,6 +263,19 @@
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2
+/* PWM
+ *
+ * The STM3240G-Eval has no real on-board PWM devices, but the board can be configured to output
+ * a pulse train using TIM4 CH2. This pin is used by FSMC is connect to CN5 just for this
+ * purpose:
+ *
+ * PD13 FSMC_A18 / MC_TIM4_CH2 pin 33 (EnB)
+ *
+ * FSMC must be disabled in this case!
+ */
+
+#define GPIO_TIM4_CH2 GPIO_TIM4_CH2_1
+
/************************************************************************************
* Public Data
************************************************************************************/
diff --git a/configs/stm3240g-eval/nsh/appconfig b/configs/stm3240g-eval/nsh/appconfig
index c2745c29437..6951578dac4 100644
--- a/configs/stm3240g-eval/nsh/appconfig
+++ b/configs/stm3240g-eval/nsh/appconfig
@@ -50,4 +50,8 @@ CONFIGURED_APPS += netutils/webclient
CONFIGURED_APPS += netutils/tftpc
endif
+ifeq ($(CONFIG_PWM),y)
+CONFIGURED_APPS += examples/pwm
+endif
+
diff --git a/configs/stm3240g-eval/nsh/defconfig b/configs/stm3240g-eval/nsh/defconfig
index 52a7ccfa304..8acd5de7c34 100755
--- a/configs/stm3240g-eval/nsh/defconfig
+++ b/configs/stm3240g-eval/nsh/defconfig
@@ -302,6 +302,18 @@ CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
CONFIG_STM32_ETH_PTP=n
CONFIG_STM32_ETHMAC_REGDEBUG=n
+#
+# PWM configuration
+#
+# The STM3240G-Eval has no real on-board PWM devices, but the board can be configured to output
+# a pulse train using TIM4 CH2. This pin is used by FSMC is connect to CN5 just for this
+# purpose.
+#
+CONFIG_PWM=n
+CONFIG_STM32_TIM4=y
+CONFIG_STM32_TIM4_PWM=y
+CONFIG_STM32_TIM4_CHANNEL=2
+
#
# General build options
#
@@ -1113,7 +1125,7 @@ CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3
# CONFIG_NSH_FATNSECTORS - FAT FS number of sectors
# CONFIG_NSH_FATMOUNTPT - FAT FS mountpoint
#
-CONFIG_NSH_BUILTIN_APPS=n
+CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_STRERROR=n
CONFIG_NSH_LINELEN=64
diff --git a/configs/stm3240g-eval/src/Makefile b/configs/stm3240g-eval/src/Makefile
index 2ba46d68295..7d09e145aec 100644
--- a/configs/stm3240g-eval/src/Makefile
+++ b/configs/stm3240g-eval/src/Makefile
@@ -46,6 +46,10 @@ ifeq ($(CONFIG_ADC),y)
CSRCS += up_adc.c
endif
+ifeq ($(CONFIG_PWM),y)
+CSRCS += up_pwm.c
+endif
+
COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
diff --git a/configs/stm3240g-eval/src/stm3240g-internal.h b/configs/stm3240g-eval/src/stm3240g-internal.h
index 051d0be907c..41583119125 100644
--- a/configs/stm3240g-eval/src/stm3240g-internal.h
+++ b/configs/stm3240g-eval/src/stm3240g-internal.h
@@ -84,6 +84,20 @@
#define GPIO_BTN_TAMPER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13)
#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTG|GPIO_PIN15)
+/* PWM
+ *
+ * The STM3240G-Eval has no real on-board PWM devices, but the board can be configured to output
+ * a pulse train using TIM4 CH2. This pin is used by FSMC is connect to CN5 just for this
+ * purpose:
+ *
+ * PD13 FSMC_A18 / MC_TIM4_CH2 pin 33 (EnB)
+ *
+ * FSMC must be disabled in this case!
+ */
+
+#define STM3240G_EVAL_PWMTIMER 4
+#define STM3240G_EVAL_PWMCHANNEL 2
+
/****************************************************************************************************
* Public Types
****************************************************************************************************/
diff --git a/configs/stm3240g-eval/src/up_adc.c b/configs/stm3240g-eval/src/up_adc.c
index 278d830ee42..7abad065307 100644
--- a/configs/stm3240g-eval/src/up_adc.c
+++ b/configs/stm3240g-eval/src/up_adc.c
@@ -1,111 +1,110 @@
-/************************************************************************************
- * configs/stm3240g-eval/src/up_adc.c
- * arch/arm/src/board/up_adc.c
- *
- * Copyright (C) 2011 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-/************************************************************************************
- * Included Files
- ************************************************************************************/
-
-#include
-
-#include
-
-#include
-#include
-
-#include "chip.h"
-#include "up_arch.h"
-#include "stm3240g-internal.h"
-
-#ifdef CONFIG_ADC
-
-/************************************************************************************
- * Definitions
- ************************************************************************************/
-
-/* Configuration ************************************************************/
-/* Up to 3 ADC interfaces are supported */
-
-#if STM32_NADC < 3
-# undef CONFIG_STM32_ADC3
-#endif
-
-#if STM32_NADC < 2
-# undef CONFIG_STM32_ADC2
-#endif
-
-#if STM32_NADC < 1
-# undef CONFIG_STM32_ADC1
-#endif
-
-#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
-
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
-
-/************************************************************************************
- * Name: stm32_boardinitialize
- *
- * Description:
- * All STM32 architectures must provide the following entry point. This entry point
- * is called early in the intitialization -- after all memory has been configured
- * and mapped but before any devices have been initialized.
- *
- ************************************************************************************/
-
-void adc_devinit(void)
-{
- struct adc_dev_s *adc;
- int ret;
-
- /* Call stm32_adcinitialize() to get an instance of the ADC interface */
-#warning "Missing Logic"
-
- /* Register the ADC driver at "/dev/adc0" */
-
- ret = adc_register("/dev/adc0", adc);
- if (ret < 0)
- {
- adbg("adc_register failed: %d\n", ret);
- }
-}
-
-#endif /* CONFIG_STM32_ADC || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
+/************************************************************************************
+ * configs/stm3240g-eval/src/up_adc.c
+ * arch/arm/src/board/up_adc.c
+ *
+ * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include
+
+#include
+
+#include
+#include
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm3240g-internal.h"
+
+#ifdef CONFIG_ADC
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Configuration ************************************************************/
+/* Up to 3 ADC interfaces are supported */
+
+#if STM32_NADC < 3
+# undef CONFIG_STM32_ADC3
+#endif
+
+#if STM32_NADC < 2
+# undef CONFIG_STM32_ADC2
+#endif
+
+#if STM32_NADC < 1
+# undef CONFIG_STM32_ADC1
+#endif
+
+#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: adc_devinit
+ *
+ * Description:
+ * All STM32 architectures must provide the following interface to work with
+ * examples/adc.
+ *
+ ************************************************************************************/
+
+void adc_devinit(void)
+{
+ struct adc_dev_s *adc;
+ int ret;
+
+ /* Call stm32_adcinitialize() to get an instance of the ADC interface */
+#warning "Missing Logic"
+
+ /* Register the ADC driver at "/dev/adc0" */
+
+ ret = adc_register("/dev/adc0", adc);
+ if (ret < 0)
+ {
+ adbg("adc_register failed: %d\n", ret);
+ }
+}
+
+#endif /* CONFIG_STM32_ADC || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
#endif /* CONFIG_ADC */
\ No newline at end of file
diff --git a/configs/stm3240g-eval/src/up_pwm.c b/configs/stm3240g-eval/src/up_pwm.c
new file mode 100644
index 00000000000..503e2607331
--- /dev/null
+++ b/configs/stm3240g-eval/src/up_pwm.c
@@ -0,0 +1,128 @@
+/************************************************************************************
+ * configs/stm3240g-eval/src/up_pwm.c
+ * arch/arm/src/board/up_pwm.c
+ *
+ * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include
+
+#include
+
+#include
+#include
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm32_pwm.h"
+#include "stm3240g-internal.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+/* Configuration *******************************************************************/
+/* PWM
+ *
+ * The STM3240G-Eval has no real on-board PWM devices, but the board can be configured to output
+ * a pulse train using TIM4 CH2. This pin is used by FSMC is connect to CN5 just for this
+ * purpose:
+ *
+ * PD13 FSMC_A18 / MC_TIM4_CH2 pin 33 (EnB)
+ *
+ * FSMC must be disabled in this case!
+ */
+
+#define HAVE_PWM 1
+
+#ifndef CONFIG_PWM
+# undef HAVE_PWM
+#endif
+
+#ifndef CONFIG_STM32_TIM4
+# undef HAVE_PWM
+#endif
+
+#ifndef CONFIG_STM32_TIM4_PWM
+# undef HAVE_PWM
+#endif
+
+#if CONFIG_STM32_TIM4_CHANNEL != STM3240G_EVAL_PWMCHANNEL
+# undef HAVE_PWM
+#endif
+
+#ifdef HAVE_PWM
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: pwm_devinit
+ *
+ * Description:
+ * All STM32 architectures must provide the following interface to work with
+ * examples/pwm.
+ *
+ ************************************************************************************/
+
+void pwm_devinit(void)
+{
+ struct pwm_lowerhalf_s *pwm;
+ int ret;
+
+ /* Call stm32_pwminitialize() to get an instance of the PWM interface */
+
+ pwm = stm32_pwminitialize(STM3240G_EVAL_PWMTIMER);
+ if (!pwm)
+ {
+ dbg("Failed to get the STM32 PWM lower half\n");
+ return;
+ }
+
+ /* Register the PWM driver at "/dev/pwm0" */
+
+ ret = pwm_register("/dev/pwm0", pwm);
+ if (ret < 0)
+ {
+ adbg("pwm_register failed: %d\n", ret);
+ }
+}
+
+#endif /* HAVE_PWM */
diff --git a/include/nuttx/pwm.h b/include/nuttx/pwm.h
index eca721d85c4..a54b7f6106f 100644
--- a/include/nuttx/pwm.h
+++ b/include/nuttx/pwm.h
@@ -36,17 +36,17 @@
#ifndef __INCLUDE_NUTTX_PWM_H
#define __INCLUDE_NUTTX_PWM_H
-/* For the purposes of this driver, a PWM device is any devices and generates
- * periodic outputs of controlled frequency and pulse width. Such is device
- * might be use, for example, to perform pulse-width modulated output or
+/* For the purposes of this driver, a PWM device is any device that generates
+ * periodic output pulses s of controlled frequency and pulse width. Such a
+ * device might be used, for example, to perform pulse-width modulated output or
* frequency/pulse-count modulated output (such as might be needed to control
- * a stepper motor.
+ * a stepper motor).
*
* The PWM driver is split into two parts:
*
* 1) An "upper half", generic driver that provides the comman PWM interface
* to application level code, and
- * 2) An "lower half" platform-specific driver that implements the low-level
+ * 2) A "lower half", platform-specific driver that implements the low-level
* timer controls to implement the PWM functionality.
*/