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arch/arm/src/tiva: Add GPIO header files. Reoganized tiva_gpio.c so that we can also handle the cc13xx GPIO which is very different.

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This commit is contained in:
Gregory Nutt
2018-12-04 13:16:52 -06:00
parent 4d2c47a01d
commit 3d23c68c05
9 changed files with 2085 additions and 36 deletions
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4
arch/arm/include/tiva/chip.h
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@@ -317,7 +317,7 @@
/* Programmable current source */
# define TIVA_NPWM 0 /* No PWM generator modules */
# define TIVA_NQEI 0 /* No quadrature encoder modules */
# define TIVA_NPORTS 1 /* One Ports */
# define TIVA_NPORTS 1 /* One Port */
# define TIVA_NCANCONTROLLER 0 /* No CAN controllers */
# define TIVA_NUSBOTGFS 0 /* No USB 2.0 OTG FS */
# define TIVA_NUSBOTGHS 0 /* No USB 2.0 OTG HS */
@@ -347,7 +347,7 @@
/* Two comparators with reference DAC */
# define TIVA_NPWM 0 /* No PWM generator modules */
# define TIVA_NQEI 0 /* No quadrature encoder modules */
# define TIVA_NPORTS 1 /* One Ports */
# define TIVA_NPORTS 1 /* One Port */
# define TIVA_NCANCONTROLLER 0 /* No CAN controllers */
# define TIVA_NUSBOTGFS 0 /* No USB 2.0 OTG FS */
# define TIVA_NUSBOTGHS 0 /* No USB 2.0 OTG HS */

16
arch/arm/src/tiva/Make.defs
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@@ -83,8 +83,20 @@ CMN_CSRCS += up_allocateheap.c
endif
CHIP_ASRCS =
CHIP_CSRCS = tiva_allocateheap.c tiva_start.c tiva_irq.c tiva_gpio.c
CHIP_CSRCS += tiva_gpioirq.c tiva_lowputc.c tiva_serial.c tiva_ssi.c
CHIP_CSRCS = tiva_allocateheap.c tiva_start.c tiva_irq.c tiva_gpioirq.c
CHIP_CSRCS += tiva_lowputc.c tiva_serial.c tiva_ssi.c
ifeq ($(CONFIG_ARCH_CHIP_LM3S),y)
CHIP_CSRCS += lm3s_gpio.c
else ifeq ($(CONFIG_ARCH_CHIP_LM4F),y)
CHIP_CSRCS += lm4f_gpio.c
else ifeq ($(CONFIG_ARCH_CHIP_TM4C),y)
CHIP_CSRCS += tm4c_gpio.c
else ifeq ($(CONFIG_ARCH_CHIP_CC13X0),y)
CHIP_CSRCS += cc13c0_gpio.c
else ifeq ($(CONFIG_ARCH_CHIP_CC13X2),y)
CHIP_CSRCS += cc13x2_cc26x2_gpio.c
endif
ifeq ($(CONFIG_DEBUG_GPIO_INFO),y)
CHIP_CSRCS += tiva_dumpgpio.c

134
arch/arm/src/tiva/hardware/cc13x0/cc13x0_gpio.h Normal file
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@@ -0,0 +1,134 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/cc13x0/cc13x0_gpio.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_GPIO_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_GPIO_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* GPIO Register Offsets ************************************************************/
#define TIVA_GPIO_DOUT_OFFSET(n) ((n) & ~3)
# define TIVA_GPIO_DOUT3_0_OFFSET 0x0000 /* Data Out 0 to 3 */
# define TIVA_GPIO_DOUT7_4_OFFSET 0x0004 /* Data Out 4 to 7 */
# define TIVA_GPIO_DOUT11_8_OFFSET 0x0008 /* Data Out 8 to 11 */
# define TIVA_GPIO_DOUT15_12_OFFSET 0x000c /* Data Out 12 to 15 */
# define TIVA_GPIO_DOUT19_16_OFFSET 0x0010 /* Data Out 16 to 19 */
# define TIVA_GPIO_DOUT23_20_OFFSET 0x0014 /* Data Out 20 to 23 */
# define TIVA_GPIO_DOUT27_24_OFFSET 0x0018 /* Data Out 24 to 27 */
# define TIVA_GPIO_DOUT31_28_OFFSET 0x001c /* Data Out 28 to 31 */
#define TIVA_GPIO_DOUT_OFFSET 0x0080 /* Data Output for DIO 0 to 31 */
#define TIVA_GPIO_DOUTSET_OFFSET 0x0090 /* Data Out Set */
#define TIVA_GPIO_DOUTCLR_OFFSET 0x00a0 /* Data Out Clear */
#define TIVA_GPIO_DOUTTGL_OFFSET 0x00b0 /* Data Out Toggle */
#define TIVA_GPIO_DIN_OFFSET 0x00c0 /* Data Input from DIO 0 to 31 */
#define TIVA_GPIO_DOE_OFFSET 0x00d0 /* Data Output Enable for DIO 0 to 31 */
#define TIVA_GPIO_EVFLAGS_OFFSET 0x00e0 /* Event Register for DIO 0 to 31 */
/* GPIO Register Addresses **********************************************************/
#define TIVA_GPIO_DOUT_BASE(n) (TIVA_GPIO_BASE + TIVA_GPIO_DOUT_OFFSET(n))
# define TIVA_GPIO_DOUT3_0_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT3_0_OFFSET)
# define TIVA_GPIO_DOUT7_4_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT7_4_OFFSET)
# define TIVA_GPIO_DOUT11_8_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT11_8_OFFSET)
# define TIVA_GPIO_DOUT15_12_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT15_12_OFFSET)
# define TIVA_GPIO_DOUT19_16_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT19_16_OFFSET)
# define TIVA_GPIO_DOUT23_20_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT23_20_OFFSET)
# define TIVA_GPIO_DOUT27_24_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT27_24_OFFSET)
# define TIVA_GPIO_DOUT31_28_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT31_28_OFFSET)
#define TIVA_GPIO_DOUT_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT_OFFSET)
#define TIVA_GPIO_DOUTSET_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUTSET_OFFSET)
#define TIVA_GPIO_DOUTCLR_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUTCLR_OFFSET)
#define TIVA_GPIO_DOUTTGL_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUTTGL_OFFSET)
#define TIVA_GPIO_DIN_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DIN_OFFSET)
#define TIVA_GPIO_DOE_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOE_OFFSET)
#define TIVA_GPIO_EVFLAGS_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_EVFLAGS_OFFSET)
/* GPIO Register Bitfield Definitions ***********************************************/
/* Data Out n to n + 3 */
#define GPIO_DOUT_SHIFT(n) (((n) & 3) << 8)
#define GPIO_DOUT_VALUE(n) (1 << GPIO_DOUT_SHIFT(n))
/* Data Output for DIO 0 to 31 */
#define GPIO_DOUT(n) (1 << (n))
/* Data Out Set */
#define GPIO_DOUTSET(n) (1 << (n))
/* Data Out Clear */
#define GPIO_DOUTCLR(n) (1 << (n))
/* Data Out Toggle */
#define GPIO_DOUTTGL(n) (1 << (n))
/* Data Input from DIO 0 to 31 */
#define GPIO_DIN(n) (1 << (n))
/* Data Output Enable for DIO 0 to 31 */
#define GPIO_DOE(n) (1 << (n))
/* Event Register for DIO 0 to 31 */
#define GPIO_EVFLAGS(n) (1 << (n))
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_GPIO_H */

134
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_gpio.h Normal file
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@@ -0,0 +1,134 @@
/************************************************************************************
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_gpio.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_GPIO_H
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_GPIO_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* GPIO Register Offsets ************************************************************/
#define TIVA_GPIO_DOUT_OFFSET(n) ((n) & ~3)
# define TIVA_GPIO_DOUT3_0_OFFSET 0x0000 /* Data Out 0 to 3 */
# define TIVA_GPIO_DOUT7_4_OFFSET 0x0004 /* Data Out 4 to 7 */
# define TIVA_GPIO_DOUT11_8_OFFSET 0x0008 /* Data Out 8 to 11 */
# define TIVA_GPIO_DOUT15_12_OFFSET 0x000c /* Data Out 12 to 15 */
# define TIVA_GPIO_DOUT19_16_OFFSET 0x0010 /* Data Out 16 to 19 */
# define TIVA_GPIO_DOUT23_20_OFFSET 0x0014 /* Data Out 20 to 23 */
# define TIVA_GPIO_DOUT27_24_OFFSET 0x0018 /* Data Out 24 to 27 */
# define TIVA_GPIO_DOUT31_28_OFFSET 0x001c /* Data Out 28 to 31 */
#define TIVA_GPIO_DOUT_OFFSET 0x0080 /* Data Output for DIO 0 to 31 */
#define TIVA_GPIO_DOUTSET_OFFSET 0x0090 /* Data Out Set */
#define TIVA_GPIO_DOUTCLR_OFFSET 0x00a0 /* Data Out Clear */
#define TIVA_GPIO_DOUTTGL_OFFSET 0x00b0 /* Data Out Toggle */
#define TIVA_GPIO_DIN_OFFSET 0x00c0 /* Data Input from DIO 0 to 31 */
#define TIVA_GPIO_DOE_OFFSET 0x00d0 /* Data Output Enable for DIO 0 to 31 */
#define TIVA_GPIO_EVFLAGS_OFFSET 0x00e0 /* Event Register for DIO 0 to 31 */
/* GPIO Register Addresses **********************************************************/
#define TIVA_GPIO_DOUT_BASE(n) (TIVA_GPIO_BASE + TIVA_GPIO_DOUT_OFFSET(n))
# define TIVA_GPIO_DOUT3_0_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT3_0_OFFSET)
# define TIVA_GPIO_DOUT7_4_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT7_4_OFFSET)
# define TIVA_GPIO_DOUT11_8_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT11_8_OFFSET)
# define TIVA_GPIO_DOUT15_12_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT15_12_OFFSET)
# define TIVA_GPIO_DOUT19_16_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT19_16_OFFSET)
# define TIVA_GPIO_DOUT23_20_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT23_20_OFFSET)
# define TIVA_GPIO_DOUT27_24_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT27_24_OFFSET)
# define TIVA_GPIO_DOUT31_28_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT31_28_OFFSET)
#define TIVA_GPIO_DOUT_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUT_OFFSET)
#define TIVA_GPIO_DOUTSET_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUTSET_OFFSET)
#define TIVA_GPIO_DOUTCLR_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUTCLR_OFFSET)
#define TIVA_GPIO_DOUTTGL_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOUTTGL_OFFSET)
#define TIVA_GPIO_DIN_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DIN_OFFSET)
#define TIVA_GPIO_DOE_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_DOE_OFFSET)
#define TIVA_GPIO_EVFLAGS_OFFSET (TIVA_GPIO_BASE + TIVA_GPIO_EVFLAGS_OFFSET)
/* GPIO Register Bitfield Definitions ***********************************************/
/* Data Out n to n + 3 */
#define GPIO_DOUT_SHIFT(n) (((n) & 3) << 8)
#define GPIO_DOUT_VALUE(n) (1 << GPIO_DOUT_SHIFT(n))
/* Data Output for DIO 0 to 31 */
#define GPIO_DOUT(n) (1 << (n))
/* Data Out Set */
#define GPIO_DOUTSET(n) (1 << (n))
/* Data Out Clear */
#define GPIO_DOUTCLR(n) (1 << (n))
/* Data Out Toggle */
#define GPIO_DOUTTGL(n) (1 << (n))
/* Data Input from DIO 0 to 31 */
#define GPIO_DIN(n) (1 << (n))
/* Data Output Enable for DIO 0 to 31 */
#define GPIO_DOE(n) (1 << (n))
/* Event Register for DIO 0 to 31 */
#define GPIO_EVFLAGS(n) (1 << (n))
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_GPIO_H */

6
arch/arm/src/tiva/hardware/tiva_gpio.h
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@@ -55,10 +55,8 @@
# include "hardware/tm4c/tm4c129_gpio.h"
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
# include "hardware/cc13x0/cc13x0_gpio.h"
#elif defined(CONFIG_ARCH_CHIP_CC13X2_V1)
# include "hardware/cc13x2_cc26x2/cc13x2_cc26x2_v1_gpio.h"
#elif defined(CONFIG_ARCH_CHIP_CC13X2_V2)
# include "hardware/cc13x2_cc26x2/cc13x2_cc26x2_v2_gpio.h"
#elif defined(CONFIG_ARCH_CHIP_CC13X2)
# include "hardware/cc13x2_cc26x2/cc13x2_cc26x2_gpio.h"
#else
# error "Unsupported Tiva/Stellaris system control module"
#endif

1
arch/arm/src/tiva/hardware/tm4c/tm4c129_gpio.h
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@@ -539,7 +539,6 @@
# define TIVA_GPIOJ_PCELLID3 (TIVA_GPIOJ_BASE + TIVA_GPIO_PCELLID3_OFFSET)
#endif
/* GPIO Register Bitfield Definitions ***********************************************/
/* GPIO Interrupt Mask */

866
arch/arm/src/tiva/lm/lm3s_gpio.c Normal file
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File diff suppressed because it is too large Load Diff

930
arch/arm/src/tiva/lm/lm4f_gpio.c Normal file
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File diff suppressed because it is too large Load Diff

30
arch/arm/src/tiva/common/tiva_gpio.c → arch/arm/src/tiva/tm4c/tm4c_gpio.c
View File

@@ -1,7 +1,8 @@
/****************************************************************************
* arch/arm/src/tiva/common/tiva_gpio.c
* arch/arm/src/tiva/tm4c/tm4c_gpio.c
*
* Copyright (C) 2009-2010, 2014-2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2014-2015, 2018 Gregory Nutt. All rights
* reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -347,7 +348,6 @@ static void tiva_gpiofunc(uint32_t base, uint32_t pinno,
modifyreg32(base + TIVA_GPIO_DEN_OFFSET, clrbit, setbit);
}
#if defined(LM4F) || defined(TM4C)
/* Set/clear/ignore the GPIO AMSEL bit. "The GPIOAMSEL register controls
* isolation circuits to the analog side of a unified I/O pad. Because
* the GPIOs may be driven by a 5-V source and affect analog operation,
@@ -363,7 +363,6 @@ static void tiva_gpiofunc(uint32_t base, uint32_t pinno,
{
modifyreg32(base + TIVA_GPIO_AMSEL_OFFSET, clrbit, setbit);
}
#endif
}
/****************************************************************************
@@ -499,10 +498,8 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
uint32_t pdrclr = 0;
uint32_t denset = 0;
uint32_t denclr = 0;
#if defined(LM4F) || defined(TM4C)
uint32_t amselset = 0;
uint32_t amselclr = 0;
#endif
/* Set the pin type. */
@@ -514,9 +511,7 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purclr = pin;
pdrclr = pin;
denset = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@@ -526,9 +521,7 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purset = pin;
pdrclr = pin;
denset = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@@ -538,9 +531,7 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purclr = pin;
pdrset = pin;
denset = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@@ -550,9 +541,7 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purclr = pin;
pdrclr = pin;
denset = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@@ -562,9 +551,7 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purset = pin;
pdrclr = pin;
denclr = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@@ -574,9 +561,7 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purclr = pin;
pdrset = pin;
denclr = pin;
#if defined(LM4F) || defined(TM4C)
amselclr = pin;
#endif
}
break;
@@ -586,9 +571,7 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
purclr = pin;
pdrclr = pin;
denclr = pin;
#if defined(LM4F) || defined(TM4C)
amselset = pin;
#endif
}
break;
@@ -600,10 +583,7 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
modifyreg32(base + TIVA_GPIO_PUR_OFFSET, purclr, purset);
modifyreg32(base + TIVA_GPIO_PDR_OFFSET, pdrclr, pdrset);
modifyreg32(base + TIVA_GPIO_DEN_OFFSET, denclr, denset);
#if defined(LM4F) || defined(TM4C)
modifyreg32(base + TIVA_GPIO_AMSEL_OFFSET, amselclr, amselset);
#endif
#ifdef CONFIG_ARCH_CHIP_TM4C129
/* Set the wake pin enable register and the wake level register. These
@@ -757,7 +737,6 @@ static inline void tiva_interrupt(uint32_t pinset)
*
****************************************************************************/
#if defined(LM4F) || defined(TM4C)
static inline void tiva_portcontrol(uint32_t base, uint32_t pinno,
uint32_t pinset,
const struct gpio_func_s *func)
@@ -785,9 +764,6 @@ static inline void tiva_portcontrol(uint32_t base, uint32_t pinno,
regval |= (alt << GPIO_PCTL_PMC_SHIFT(pinno)) & mask;
putreg32(regval, base + TIVA_GPIO_PCTL_OFFSET);
}
#else
# define tiva_portcontrol(b,p,c,f)
#endif
/****************************************************************************
* Public Functions