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style: fix spelling in code comments and strings

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This commit is contained in:
Lars Kruse
2025-05-03 06:16:30 +02:00
committed by Xiang Xiao
parent b2315e98c4
commit 3ce85ca54e
1670 changed files with 3162 additions and 2991 deletions
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drivers/coresight/coresight_common.c
+1 -1
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@@ -158,7 +158,7 @@ void coresight_disclaim_device(uintptr_t addr)
}
else
{
cserr("current device is not claimed or something wrong happend\n");
cserr("current device is not claimed or something wrong happened\n");
}
coresight_lock(addr);
drivers/coresight/coresight_core.c
+2 -2
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@@ -619,7 +619,7 @@ static int coresight_enable_path(FAR struct list_node *path)
ret = coresight_enable_sink(node->csdev);
if (ret < 0)
{
cserr("enalbe sink: %s failed ret: %d\n",
cserr("enable sink: %s failed ret: %d\n",
node->csdev->name, ret);
return ret;
}
@@ -635,7 +635,7 @@ static int coresight_enable_path(FAR struct list_node *path)
next->csdev);
if (ret < 0)
{
cserr("enalbe link: %s failed ret: %d\n",
cserr("enable link: %s failed ret: %d\n",
node->csdev->name, ret);
goto err;
}
drivers/coresight/coresight_etb.c
+1 -1
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@@ -182,7 +182,7 @@ static void etb_hw_read(FAR struct coresight_etb_dev_s *etbdev)
/* ARM recommends that addresses are 128-bit aligned. Read from 0 when ETB
* buffer is not full, otherwise, read from writepointer and there are some
* trace data has been overwriten and lost.
* trace data has been overwritten and lost.
*/
readptr = coresight_get32(etbdev->csdev.addr + ETB_RAM_READ_POINTER);
drivers/coresight/coresight_etm4.c
+1 -1
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@@ -792,7 +792,7 @@ void etm4_disclaim_device(FAR struct coresight_etm4_dev_s *etmdev)
}
else
{
cserr("current device is not claimed or something wrong happend\n");
cserr("current device is not claimed or something wrong happened\n");
}
}
drivers/coresight/coresight_tmc_core.c
+2 -2
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@@ -44,7 +44,7 @@
static enum tmc_mem_intf_width_e tmc_etf_get_memwidth(uint32_t devid)
{
/* Indicate the minimum alignemnt for RRR/RURP/RWP/DBA etc registers. */
/* Indicate the minimum alignment for RRR/RURP/RWP/DBA etc registers. */
switch (BMVAL(devid, 8, 10))
{
@@ -69,7 +69,7 @@ static enum tmc_mem_intf_width_e tmc_etr_get_memwidth(uint32_t devid)
{
uint32_t val = (BMVAL(devid, 14, 15) << 3) | BMVAL(devid, 8, 10);
/* Indicate the minimum alignemnt for RRR/RURP/RWP/DBA etc registers. */
/* Indicate the minimum alignment for RRR/RURP/RWP/DBA etc registers. */
switch (val)
{
drivers/coresight/coresight_tmc_etf.c
+3 -3
View File
@@ -115,7 +115,7 @@ static int tmc_etf_sink_hw_enable(FAR struct coresight_tmc_dev_s *tmcdev)
return -EAGAIN;
}
/* TMC-ETB and TMC-ETF sink device use cirular buffer mode. */
/* TMC-ETB and TMC-ETF sink device use circular buffer mode. */
coresight_put32(TMC_MODE_CIRCULAR_BUFFER, tmcdev->csdev.addr + TMC_MODE);
coresight_put32(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI | TMC_FFCR_FON_FLIN |
@@ -193,7 +193,7 @@ static void tmc_flush_and_stop(FAR struct coresight_tmc_dev_s *tmcdev)
* Description:
* Dump ETB RAM buffer to device's buffer for usrspace's read. It just need
* to performing successive reads to the RRD Register, until the value
* 0xFFFFFFFF is returned whick is kind different from coresight ETB
* 0xFFFFFFFF is returned which is kind different from coresight ETB
* device's reading process. refers to TRM.
*
****************************************************************************/
@@ -230,7 +230,7 @@ static void tmc_etf_hw_read(FAR struct coresight_tmc_dev_s *tmcdev)
* Description:
* Used for ETF sink devices to dump trace buffer. Do not dump trace buffer
* in tmc_etf_hw_disable to avoid trace buffer's data confusion when a
* process is reading trace buffer and anther process calles tmc_disable.
* process is reading trace buffer and another process calls tmc_disable.
*
****************************************************************************/