nuttx: remove space befone newline in logs

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>

arch/arm/src/am335x/am335x_i2c.c

@@ -1437,7 +1437,7 @@ static int am335x_i2c_transfer(FAR struct i2c_master_s *dev,
       priv->msgc  = count;
       priv->flags = msgs->flags;
 
-      i2cinfo("Flags %x, len %d \n", msgs->flags, msgs->length);
+      i2cinfo("Flags %x, len %d\n", msgs->flags, msgs->length);
 
       /* Reset I2C trace logic */
 

arch/arm/src/cxd56xx/cxd56_cpupause.c

@@ -270,7 +270,7 @@ int arm_pause_handler(int irq, void *c, FAR void *arg)
   int cpu = up_cpu_index();
   int ret = OK;
 
-  DPRINTF("cpu%d will be paused \n", cpu);
+  DPRINTF("cpu%d will be paused\n", cpu);
 
   /* Clear SW_INT for APP_DSP(cpu) */
 

arch/arm/src/cxd56xx/cxd56_textheap.c

@@ -55,7 +55,7 @@ FAR void *up_textheap_memalign(size_t align, size_t size)
 #ifdef CONFIG_CXD56_USE_SYSBUS
   if (ret)
     {
-      binfo("** ret=%p \n", ret);
+      binfo("** ret=%p\n", ret);
 
       /* NOTE:
        * kmm_malloc() will return the address in SYSBUS.
@@ -64,7 +64,7 @@ FAR void *up_textheap_memalign(size_t align, size_t size)
 
       ret -= SYSBUS_ADDRESS_OFFSET;
 
-      binfo("** mapped to %p \n", ret);
+      binfo("** mapped to %p\n", ret);
     }
 #endif
 
@@ -80,7 +80,7 @@ void up_textheap_free(FAR void *p)
 #ifdef CONFIG_CXD56_USE_SYSBUS
   if (p)
     {
-      binfo("** p=%p \n", p);
+      binfo("** p=%p\n", p);
 
       /* NOTE:
        * The address p will be in I/D BUS.
@@ -89,7 +89,7 @@ void up_textheap_free(FAR void *p)
 
       p += SYSBUS_ADDRESS_OFFSET;
 
-      binfo("** mapped to %p \n", p);
+      binfo("** mapped to %p\n", p);
     }
 #endif
 

arch/arm/src/efm32/efm32_spi.c

@@ -1215,7 +1215,7 @@ static uint32_t spi_send(struct spi_dev_s *dev, uint32_t wd)
   spi_wait_status(config, _USART_STATUS_RXDATAV_MASK, USART_STATUS_RXDATAV);
   ret = spi_getreg(config, EFM32_USART_RXDATA_OFFSET);
 
-  spiinfo("Sent: %04x Return: %04x \n", wd, ret);
+  spiinfo("Sent: %04x Return: %04x\n", wd, ret);
   return ret;
 }
 

arch/arm/src/efm32/efm32_timer.c

@@ -104,7 +104,7 @@ void efm32_timer_dumpregs(uintptr_t base, FAR const char *msg)
           getreg32(base + EFM32_TIMER_STATUS_OFFSET),
           getreg32(base + EFM32_TIMER_IEN_OFFSET),
           getreg32(base + EFM32_TIMER_IF_OFFSET));
-  tmrinfo("DTFAULT: %04x DTFAULTC: %04x  DTLOCK: %04x \n",
+  tmrinfo("DTFAULT: %04x DTFAULTC: %04x  DTLOCK: %04x\n",
           getreg32(base + EFM32_TIMER_CTRL_OFFSET),
           getreg32(base + EFM32_TIMER_STATUS_OFFSET),
           getreg32(base + EFM32_TIMER_IEN_OFFSET));
@@ -214,7 +214,7 @@ int efm32_timer_set_freq(uintptr_t base, uint32_t clk_freq, uint32_t freq)
 
   reload = (clk_freq / prescaler / freq);
 
-  tmrinfo("Source: %4" PRIx32 "Hz Div: %4x Reload: %4x \n",
+  tmrinfo("Source: %4" PRIx32 "Hz Div: %4x Reload: %4x\n",
           clk_freq, prescaler, reload);
 
   putreg32(reload, base + EFM32_TIMER_TOP_OFFSET);

arch/arm/src/imxrt/imxrt_lpi2c.c

@@ -1686,7 +1686,7 @@ static int imxrt_lpi2c_transfer(FAR struct i2c_master_s *dev,
   priv->msgc  = count;
   priv->flags = msgs->flags;
 
-  i2cinfo("Flags %x, len %d \n", msgs->flags, msgs->length);
+  i2cinfo("Flags %x, len %d\n", msgs->flags, msgs->length);
 
   /* Reset I2C trace logic */
 

arch/arm/src/kinetis/kinetis_usbdev.c

@@ -4412,7 +4412,7 @@ static void khci_hwinitialize(struct khci_usbdev_s *priv)
   khci_putreg((uint8_t)(((uint32_t)g_bdt >> 8) & USB_BDTPAGE1_MASK),
       KINETIS_USB0_BDTPAGE1);
 
-  uinfo("BDT Address %p \n", (const void *)&g_bdt);
+  uinfo("BDT Address %p\n", (const void *)&g_bdt);
   uinfo("BDTPAGE3 %hhx\n", khci_getreg(KINETIS_USB0_BDTPAGE3));
   uinfo("BDTPAGE2 %hhx\n", khci_getreg(KINETIS_USB0_BDTPAGE2));
   uinfo("BDTPAGE1 %hhx\n", khci_getreg(KINETIS_USB0_BDTPAGE1));

arch/arm/src/lc823450/lc823450_i2s.c

@@ -433,14 +433,14 @@ static int lc823450_i2s_ioctl(struct i2s_dev_s *dev, int cmd,
 
             if (rate[0] != rate[1])
               {
-                audinfo("change output rate: %" PRId32 " -> %" PRId32 " \n",
+                audinfo("change output rate: %" PRId32 " -> %" PRId32 "\n",
                         rate[0], rate[1]);
                 lc823450_i2s_txsamplerate(dev, rate[1]);
               }
 
             if (ch[0] != ch[1])
               {
-                audinfo("change output ch: %d -> %d \n", ch[0], ch[1]);
+                audinfo("change output ch: %d -> %d\n", ch[0], ch[1]);
                 lc823450_i2s_setchannel('C', ch[1]);
               }
 
@@ -457,14 +457,14 @@ static int lc823450_i2s_ioctl(struct i2s_dev_s *dev, int cmd,
 
             if (rate[0] != rate[1])
               {
-                audinfo("change input rate: %" PRId32 " -> %" PRId32 " \n",
+                audinfo("change input rate: %" PRId32 " -> %" PRId32 "\n",
                         rate[0], rate[1]);
                 lc823450_i2s_rxsamplerate(dev, rate[1]);
               }
 
             if (ch[0] != ch[1])
               {
-                audinfo("change input ch: %d -> %d \n", ch[0], ch[1]);
+                audinfo("change input ch: %d -> %d\n", ch[0], ch[1]);
                 lc823450_i2s_setchannel('J', ch[1]);
               }
           }
@@ -699,7 +699,7 @@ static int lc823450_i2s_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
 
   if (0 == decsel && (n & 0x3))
     {
-      auderr("** PCM data is not word-aligned (n=%" PRId32 ") ** \n", n);
+      auderr("** PCM data is not word-aligned (n=%" PRId32 ") **\n", n);
 
       /* Set size to align on a word boundary */
 
@@ -747,7 +747,7 @@ static int lc823450_i2s_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
 #ifdef SHOW_BUFFERING
   if (0 == bufc_enabled)
     {
-      audinfo("buffering (remain=%d) \n", getreg32(BUF_DTCAP('C')));
+      audinfo("buffering (remain=%d)\n", getreg32(BUF_DTCAP('C')));
     }
 #endif
 
@@ -826,9 +826,9 @@ static void lc823450_dmic_enable(void)
            33 << 8 | 33,
            VOLSP0_CONT);
 
-  audinfo("ASRC_FSIO=%" PRId32 " \n",  getreg32(ASRC_FSO));
+  audinfo("ASRC_FSIO=%" PRId32 "\n",  getreg32(ASRC_FSO));
-  audinfo("DTCAP(I)=0x%" PRIx32 " \n", getreg32(BUF_DTCAP('I')));
+  audinfo("DTCAP(I)=0x%" PRIx32 "\n", getreg32(BUF_DTCAP('I')));
-  audinfo("DTCAP(J)=0x%" PRIx32 " \n", getreg32(BUF_DTCAP('J')));
+  audinfo("DTCAP(J)=0x%" PRIx32 "\n", getreg32(BUF_DTCAP('J')));
 
   /* Start ASRC */
 
@@ -990,9 +990,9 @@ static int lc823450_i2s_configure(void)
   putreg32(0x1, SSRC_MODE);
   while (getreg32(SSRC_STATUS) != 0x1);
 
-  audinfo("DTCAP(C)=0x%08x \n", BUF_DTCAP('C'));
+  audinfo("DTCAP(C)=0x%08x\n", BUF_DTCAP('C'));
-  audinfo("DTCAP(I)=0x%08x \n", BUF_DTCAP('I'));
+  audinfo("DTCAP(I)=0x%08x\n", BUF_DTCAP('I'));
-  audinfo("DTCAP(J)=0x%08x \n", BUF_DTCAP('J'));
+  audinfo("DTCAP(J)=0x%08x\n", BUF_DTCAP('J'));
 
   /* Setup default tx threshold */
 

arch/arm/src/lc823450/lc823450_mtd.c

@@ -452,7 +452,7 @@ static int mtd_mediainitialize(FAR struct lc823450_mtd_dev_s *dev)
       /* Try to change to High Speed DDR mode */
 
       ret = lc823450_sdc_changespeedmode(dev->channel, 4);
-      finfo("ch=%" PRId32 " DDR mode ret=%d \n", dev->channel, ret);
+      finfo("ch=%" PRId32 " DDR mode ret=%d\n", dev->channel, ret);
     }
   else
     {
@@ -463,7 +463,7 @@ static int mtd_mediainitialize(FAR struct lc823450_mtd_dev_s *dev)
 
       if (0 == ret)
         {
-          lldbg("ch=%d DDR50 mode ret=%d \n", dev->channel, ret);
+          lldbg("ch=%d DDR50 mode ret=%d\n", dev->channel, ret);
           goto get_card_size;
         }
 #endif
@@ -475,7 +475,7 @@ static int mtd_mediainitialize(FAR struct lc823450_mtd_dev_s *dev)
       if (0 == ret)
         {
           ret = lc823450_sdc_setclock(dev->channel, 40000000, sysclk);
-          finfo("ch=%" PRId32 " HS mode ret=%d \n", dev->channel, ret);
+          finfo("ch=%" PRId32 " HS mode ret=%d\n", dev->channel, ret);
         }
     }
 
@@ -504,7 +504,7 @@ get_card_size:
       lc823450_sdc_cachectl(dev->channel, 1);
     }
 
-  finfo("ch=%" PRId32 " size=%" PRId64 " \n",
+  finfo("ch=%" PRId32 " size=%" PRId64 "\n",
         dev->channel, (uint64_t)blocksize * (uint64_t)nblocks);
 
 exit_with_error:

arch/arm/src/lc823450/lc823450_procfs_dvfs.c

@@ -206,7 +206,7 @@ static ssize_t dvfs_read(FAR struct file *filep, FAR char *buffer,
 
   linesize = snprintf(priv->line,
                       DVFS_LINELEN,
-                      "cur_freq %d \n", g_dvfs_cur_freq);
+                      "cur_freq %d\n", g_dvfs_cur_freq);
   copysize = procfs_memcpy(priv->line, linesize, buffer, remaining, &offset);
   totalsize += copysize;
   buffer    += copysize;
@@ -219,7 +219,7 @@ static ssize_t dvfs_read(FAR struct file *filep, FAR char *buffer,
 
   linesize = snprintf(priv->line,
                       DVFS_LINELEN,
-                      "enable %d \n", g_dvfs_enabled);
+                      "enable %d\n", g_dvfs_enabled);
   copysize = procfs_memcpy(priv->line, linesize, buffer, remaining, &offset);
   totalsize += copysize;
   buffer    += copysize;
@@ -227,7 +227,7 @@ static ssize_t dvfs_read(FAR struct file *filep, FAR char *buffer,
 
   linesize = snprintf(priv->line,
                       DVFS_LINELEN,
-                      "auto %d \n", g_dvfs_auto);
+                      "auto %d\n", g_dvfs_auto);
   copysize = procfs_memcpy(priv->line, linesize, buffer, remaining, &offset);
   totalsize += copysize;
   buffer    += copysize;
@@ -235,7 +235,7 @@ static ssize_t dvfs_read(FAR struct file *filep, FAR char *buffer,
 
   linesize = snprintf(priv->line,
                       DVFS_LINELEN,
-                      "fstat %" PRId32 " %" PRId32 " %" PRId32 " \n",
+                      "fstat %" PRId32 " %" PRId32 " %" PRId32 "\n",
                       g_dvfs_freq_stat[0],
                       g_dvfs_freq_stat[1],
                       g_dvfs_freq_stat[2]);
@@ -250,7 +250,7 @@ static ssize_t dvfs_read(FAR struct file *filep, FAR char *buffer,
     {
       linesize = snprintf(priv->line,
                           DVFS_LINELEN,
-                          "idle%d %lld \n",
+                          "idle%d %lld\n",
                           i, idletime[i]);
 
       copysize = procfs_memcpy(priv->line, linesize, buffer,

arch/arm/src/lc823450/lc823450_sdc.c

@@ -201,7 +201,7 @@ int lc823450_sdc_clearcardinfo(uint32_t ch)
 {
   int ret;
 
-  mcinfo("++++ start \n");
+  mcinfo("++++ start\n");
 
   ret = _sdc_semtake(&_sdc_sem[ch]);
   if (ret < 0)
@@ -220,7 +220,7 @@ int lc823450_sdc_clearcardinfo(uint32_t ch)
 #endif
 
   _sdc_semgive(&_sdc_sem[ch]);
-  mcinfo("---- end ret=%d \n", ret);
+  mcinfo("---- end ret=%d\n", ret);
   return ret;
 }
 
@@ -276,14 +276,14 @@ int lc823450_sdc_initialize(uint32_t ch)
         DEBUGASSERT(false);
     }
 
-  mcinfo("++++ start \n");
+  mcinfo("++++ start\n");
 
   ret = _sdc_semtake(&_sdc_sem[ch]);
   if (ret >= 0)
     {
       ret = sddr_initialize(_cfg[ch]);
       _sdc_semgive(&_sdc_sem[ch]);
-      mcinfo("---- end ret=%d \n", ret);
+      mcinfo("---- end ret=%d\n", ret);
     }
 
   return ret;
@@ -297,14 +297,14 @@ int lc823450_sdc_finalize(uint32_t ch)
 {
   int ret;
 
-  mcinfo("++++ start ch=%ld \n", ch);
+  mcinfo("++++ start ch=%ld\n", ch);
 
   ret = _sdc_semtake(&_sdc_sem[ch]);
   if (ret >= 0)
     {
       ret = sddr_finalize(_cfg[ch]);
       _sdc_semgive(&_sdc_sem[ch]);
-      mcinfo("---- end ret=%d \n", ret);
+      mcinfo("---- end ret=%d\n", ret);
     }
 
   return ret;
@@ -318,7 +318,7 @@ int lc823450_sdc_identifycard(uint32_t ch)
 {
   int ret;
 
-  mcinfo("++++ start \n");
+  mcinfo("++++ start\n");
 
   ret = _sdc_semtake(&_sdc_sem[ch]);
   if (ret < 0)
@@ -337,7 +337,7 @@ int lc823450_sdc_identifycard(uint32_t ch)
 #endif
 
   _sdc_semgive(&_sdc_sem[ch]);
-  mcinfo("---- end ret=%d \n", ret);
+  mcinfo("---- end ret=%d\n", ret);
   return ret;
 }
 
@@ -357,7 +357,7 @@ int lc823450_sdc_setclock(uint32_t ch, uint32_t limitclk, uint32_t sysclk)
     {
       ret = sddr_setclock(limitclk, sysclk, _cfg[ch]);
       _sdc_semgive(&_sdc_sem[ch]);
-      mcinfo("---- end ret=%d \n", ret);
+      mcinfo("---- end ret=%d\n", ret);
     }
 
   return ret;
@@ -375,14 +375,14 @@ int lc823450_sdc_refmediatype(uint32_t ch)
 {
   int ret;
 
-  mcinfo("++++ start \n");
+  mcinfo("++++ start\n");
 
   ret = _sdc_semtake(&_sdc_sem[ch]);
   if (ret >= 0)
     {
       ret = sddr_refmediatype(_cfg[ch]);
       _sdc_semgive(&_sdc_sem[ch]);
-      mcinfo("---- end ret=%d \n", ret);
+      mcinfo("---- end ret=%d\n", ret);
     }
 
   return ret;
@@ -397,7 +397,7 @@ int lc823450_sdc_getcardsize(uint32_t ch,
 {
   int ret;
 
-  mcinfo("++++ start \n");
+  mcinfo("++++ start\n");
 
   ret = _sdc_semtake(&_sdc_sem[ch]);
   if (ret >= 0)
@@ -405,7 +405,7 @@ int lc823450_sdc_getcardsize(uint32_t ch,
       ret = sddr_getcardsize(psecnum, psecsize, _cfg[ch]);
 
       _sdc_semgive(&_sdc_sem[ch]);
-      mcinfo("---- end ret=%d \n", ret);
+      mcinfo("---- end ret=%d\n", ret);
     }
 
   return ret;
@@ -429,7 +429,7 @@ int lc823450_sdc_readsector(uint32_t ch,
     }
 
 #ifdef CONFIG_LC823450_SDC_LOG
-  mcinfo("++++ start ch=%d, addr=%ld, cnt=%d \n", ch, addr, cnt);
+  mcinfo("++++ start ch=%d, addr=%ld, cnt=%d\n", ch, addr, cnt);
 #endif
 
 #ifdef CONFIG_LC823450_SDC_CACHE
@@ -458,7 +458,7 @@ int lc823450_sdc_readsector(uint32_t ch,
           break;
         }
 
-      mcinfo("ret=%d ch=%" PRId32 " add=%ld cnt=%d i=%d \n",
+      mcinfo("ret=%d ch=%" PRId32 " add=%ld cnt=%d i=%d\n",
              ret, ch, addr, cnt, i);
     }
 
@@ -470,7 +470,7 @@ int lc823450_sdc_readsector(uint32_t ch,
           uint8_t *p = (pbuf + 0x1c2); /* partition id */
           if (0x7 == *p)
             {
-              mcinfo("exFAT (NTFS) detected \n");
+              mcinfo("exFAT (NTFS) detected\n");
               _sec_cache_enabled = 1;
             }
         }
@@ -493,7 +493,7 @@ errout_with_semaphore:
 #endif
   _sdc_semgive(&_sdc_sem[ch]);
 
-  mcinfo("----  end ret=%d \n", ret);
+  mcinfo("----  end ret=%d\n", ret);
   return ret;
 }
 
@@ -514,7 +514,7 @@ int lc823450_sdc_writesector(uint32_t ch,
     }
 
 #ifdef CONFIG_LC823450_SDC_LOG
-  mcinfo("++++ start ch=%d, addr=%ld, cnt=%d \n", ch, addr, cnt);
+  mcinfo("++++ start ch=%d, addr=%ld, cnt=%d\n", ch, addr, cnt);
 #endif
 
 #ifdef CONFIG_LC823450_SDC_CACHE
@@ -534,12 +534,12 @@ int lc823450_sdc_writesector(uint32_t ch,
 
   if (0 > ret)
     {
-      mcinfo("ret=%d ch=%" PRId32 " add=%ld cnt=%d \n", ret, ch, addr, cnt);
+      mcinfo("ret=%d ch=%" PRId32 " add=%ld cnt=%d\n", ret, ch, addr, cnt);
     }
 
   _sdc_semgive(&_sdc_sem[ch]);
 
-  mcinfo("----  end ret=%d \n", ret);
+  mcinfo("----  end ret=%d\n", ret);
   return ret;
 }
 
@@ -568,7 +568,7 @@ int lc823450_sdc_trimsector(uint32_t ch, unsigned long addr,
     }
 
 #ifdef CONFIG_LC823450_SDC_LOG
-  mcinfo("++++ start ch=%d, addr=%ld, cnt=%d \n", ch, addr, cnt);
+  mcinfo("++++ start ch=%d, addr=%ld, cnt=%d\n", ch, addr, cnt);
 #endif
 
   lc823450_sdc_access_led(ch, addr);
@@ -580,12 +580,12 @@ int lc823450_sdc_trimsector(uint32_t ch, unsigned long addr,
   ret = sddr_eraseseq(0x00000001, addr, cnt, _cfg[ch]);
   if (0 > ret)
     {
-      mcinfo("ret=%d ch=%" PRId32 " add=%ld cnt=%d \n", ret, ch, addr, cnt);
+      mcinfo("ret=%d ch=%" PRId32 " add=%ld cnt=%d\n", ret, ch, addr, cnt);
     }
 
   _sdc_semgive(&_sdc_sem[ch]);
 
-  mcinfo("----  end ret=%d \n", ret);
+  mcinfo("----  end ret=%d\n", ret);
   return ret;
 }
 
@@ -597,7 +597,7 @@ int lc823450_sdc_cachectl(uint32_t ch, int ctrl)
 {
   int ret;
 
-  mcinfo("++++ ch=%" PRId32 ", ctrl=%d \n", ch, ctrl);
+  mcinfo("++++ ch=%" PRId32 ", ctrl=%d\n", ch, ctrl);
 
   ret = _sdc_semtake(&_sdc_sem[ch]);
   if (ret >= 0)
@@ -605,7 +605,7 @@ int lc823450_sdc_cachectl(uint32_t ch, int ctrl)
       ret = sddr_cachectrl(ctrl, _cfg[ch]);
 
       _sdc_semgive(&_sdc_sem[ch]);
-      mcinfo("----  end ret=%d \n", ret);
+      mcinfo("----  end ret=%d\n", ret);
     }
 
   return ret;
@@ -619,7 +619,7 @@ int lc823450_sdc_changespeedmode(uint32_t ch, int mode)
 {
   int ret;
 
-  mcinfo("++++ ch=%" PRId32 ", mode=%d \n", ch, mode);
+  mcinfo("++++ ch=%" PRId32 ", mode=%d\n", ch, mode);
 
   ret = _sdc_semtake(&_sdc_sem[ch]);
   if (ret < 0)
@@ -648,7 +648,7 @@ int lc823450_sdc_changespeedmode(uint32_t ch, int mode)
     }
 
   _sdc_semgive(&_sdc_sem[ch]);
-  mcinfo("----  end ret=%d \n", ret);
+  mcinfo("----  end ret=%d\n", ret);
   return ret;
 }
 
@@ -661,7 +661,7 @@ int lc823450_sdc_getcid(uint32_t ch, char *cidstr, int length)
   uint8_t cid[16];
   int ret;
 
-  mcinfo("++++ ch=%" PRId32 " \n", ch);
+  mcinfo("++++ ch=%" PRId32 "\n", ch);
 
   ret = _sdc_semtake(&_sdc_sem[ch]);
   if (ret < 0)
@@ -685,7 +685,7 @@ int lc823450_sdc_getcid(uint32_t ch, char *cidstr, int length)
     }
 
   _sdc_semgive(&_sdc_sem[ch]);
-  mcinfo("----  end ret=%d \n", ret);
+  mcinfo("----  end ret=%d\n", ret);
   return ret;
 }
 

arch/arm/src/lc823450/lc823450_syscontrol.c

@@ -67,16 +67,16 @@ uint32_t get_cpu_ver(void)
   switch (reg)
     {
       case MODEM_MAV_ES1:
-        sinfo("ES1 \n");
+        sinfo("ES1\n");
         break;
 
       case MODEM_MAV_ES2:
-        sinfo("ES2 \n");
+        sinfo("ES2\n");
         ret = 1;
         break;
 
       default:
-        sinfo("??? \n");
+        sinfo("???\n");
         break;
     }
 
@@ -119,7 +119,7 @@ void mod_stby_regs(uint32_t enabits, uint32_t disbits)
       modifyreg32(ISOCNT, 0, enabits);
     }
 
-  /* sinfo("ISOCNT=0x%x, LSISTBY=0x%x \n",
+  /* sinfo("ISOCNT=0x%x, LSISTBY=0x%x\n",
    * getreg32(ISOCNT), getreg32(LSISTBY));
    */
 }

arch/arm/src/lc823450/lc823450_timer.c

@@ -711,7 +711,7 @@ int up_rtc_gettime(FAR struct timespec *tp)
 
   spin_unlock_irqrestore(NULL, flags);
 
-  tmrinfo("elapsed = %lld \n", elapsed);
+  tmrinfo("elapsed = %lld\n", elapsed);
 
   /* Convert the elapsed time in seconds and nanoseconds. */
 

arch/arm/src/lpc43xx/lpc43_spifi.c

@@ -849,7 +849,7 @@ static int lpc43_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
   FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  finfo("cmd: %d \n", cmd);
+  finfo("cmd: %d\n", cmd);
 
   switch (cmd)
     {

arch/arm/src/nrf52/nrf52_irq.c

@@ -102,7 +102,7 @@ static void nrf52_dumpnvic(const char *msg, int irq)
   irqinfo("  INTCTRL:    %08x VECTAB: %08x\n",
           getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
 #if 0
-  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x \n",
+  irqinfo("  SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x\n",
           getreg32(NVIC_SYSHCON_MEMFAULTENA),
           getreg32(NVIC_SYSHCON_BUSFAULTENA));
   irqinfo("  USGFAULT: %08x SYSTICK: %08x\n",

arch/arm/src/phy62xx/pplus_mtd_flash.c

@@ -262,7 +262,7 @@ static int pplus_fls_ioctl(FAR struct mtd_dev_s *dev,
   FAR struct pplus_fls_dev_s *priv = (FAR struct pplus_fls_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  finfo("cmd: %d \n", cmd);
+  finfo("cmd: %d\n", cmd);
 
   switch (cmd)
     {

arch/arm/src/rp2040/rp2040_cpupause.c

@@ -257,7 +257,7 @@ int arm_pause_handler(int irq, void *c, FAR void *arg)
       return OK;
     }
 
-  DPRINTF("cpu%d will be paused \n", cpu);
+  DPRINTF("cpu%d will be paused\n", cpu);
 
   /* Check for false alarms.  Such false could occur as a consequence of
    * some deadlock breaking logic that might have already serviced the SG2

arch/arm/src/s32k1xx/s32k1xx_lpi2c.c

@@ -1556,7 +1556,7 @@ static int s32k1xx_lpi2c_transfer(FAR struct i2c_master_s *dev,
   priv->msgc  = count;
   priv->flags = msgs->flags;
 
-  i2cinfo("Flags %x, len %d \n", msgs->flags, msgs->length);
+  i2cinfo("Flags %x, len %d\n", msgs->flags, msgs->length);
 
   /* Reset I2C trace logic */
 

arch/arm/src/sam34/sam_emac.c

@@ -1861,7 +1861,7 @@ static int sam_ifup(struct net_driver_s *dev)
     }
 
   while (sam_linkup(priv) == 0);
-  ninfo("Link detected \n");
+  ninfo("Link detected\n");
 
   /* Enable normal MAC operation */
 

arch/arm/src/sama5/sam_emaca.c

@@ -1922,7 +1922,7 @@ static int sam_ifup(struct net_driver_s *dev)
     }
 
   while (sam_linkup(priv) == 0);
-  ninfo("Link detected \n");
+  ninfo("Link detected\n");
 
   /* Enable normal MAC operation */
 

arch/arm/src/sama5/sam_emacb.c

@@ -2267,7 +2267,7 @@ static int sam_ifup(struct net_driver_s *dev)
     }
 
   while (sam_linkup(priv) == 0);
-  ninfo("Link detected \n");
+  ninfo("Link detected\n");
 
   /* Enable normal MAC operation */
 

arch/arm/src/samd2l2/sam_spi.c

@@ -1472,7 +1472,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
 
   /* Get the port state structure */
 
-  spiinfo("port: %d \n", port);
+  spiinfo("port: %d\n", port);
 
 #ifdef SAMD2L2_HAVE_SPI0
   if (port == 0)

arch/arm/src/samd5e5/sam_spi.c

@@ -1555,7 +1555,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
 
   /* Get the port state structure */
 
-  spiinfo("port: %d \n", port);
+  spiinfo("port: %d\n", port);
 
 #ifdef SAMD5E5_HAVE_SPI0
   if (port == 0)

arch/arm/src/samv7/sam_emac.c

@@ -2743,7 +2743,7 @@ static int sam_ifup(struct net_driver_s *dev)
     }
 
   while (sam_linkup(priv) == 0);
-  ninfo("Link detected \n");
+  ninfo("Link detected\n");
 
   /* Enable normal MAC operation */
 

arch/arm/src/stm32/stm32_i2c_alt.c

@@ -1866,7 +1866,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
       status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
 
       i2cerr("ERROR:  "
-             "No correct state detected(start bit, read or write) \n");
+             "No correct state detected(start bit, read or write)\n");
       i2cerr("   state %" PRIi32 "\n", status);
 
       /* Set condition to terminate ISR and wake waiting thread */

arch/arm/src/stm32/stm32_qencoder.c

@@ -1314,7 +1314,7 @@ static int stm32_setindex(FAR struct qe_lowerhalf_s *lower, uint32_t pos)
 
   if (priv->index_use == false)
     {
-      snerr("ERROR: QE TIM%d index not registered \n",
+      snerr("ERROR: QE TIM%d index not registered\n",
             priv->config->timid);
       ret = -EPERM;
       goto errout;
@@ -1464,7 +1464,7 @@ int stm32_qe_index_init(int tim, uint32_t gpio)
                            stm32_qe_index_irq, priv);
   if (ret < 0)
     {
-      snerr("ERROR: QE TIM%d failed register irq \n", tim);
+      snerr("ERROR: QE TIM%d failed register irq\n", tim);
       goto errout;
     }
 

arch/arm/src/stm32/stm32f40xxx_i2c.c

@@ -1969,7 +1969,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
           priv->status |= I2C_SR1_BERR;
         }
 
-      i2cinfo(" No correct state detected(start bit, read or write) \n");
+      i2cinfo(" No correct state detected(start bit, read or write)\n");
       i2cinfo(" state %" PRIi32 "\n", status);
 
       /* Set condition to terminate ISR and wake waiting thread */
@@ -2077,7 +2077,7 @@ static void stm32_i2c_dmarxcallback(DMA_HANDLE handle,
   uint32_t regval;
 #endif
 
-  i2cinfo("DMA rx callback, status = %d \n", status);
+  i2cinfo("DMA rx callback, status = %d\n", status);
 
   FAR struct stm32_i2c_priv_s *priv = (FAR struct stm32_i2c_priv_s *)arg;
 
@@ -2134,7 +2134,7 @@ static void stm32_i2c_dmatxcallback(DMA_HANDLE handle,
   uint32_t regval;
 #endif
 
-  i2cinfo("DMA tx callback, status = %d \n", status);
+  i2cinfo("DMA tx callback, status = %d\n", status);
 
   FAR struct stm32_i2c_priv_s *priv = (FAR struct stm32_i2c_priv_s *)arg;
 

arch/misoc/src/lm32/lm32_dumpstate.c

@@ -74,7 +74,7 @@ static inline void lm32_registerdump(void)
 
   if (g_current_regs)
     {
-      _alert("EPC:%08x \n",
+      _alert("EPC:%08x\n",
              g_current_regs[REG_EPC]);
       _alert(" X0:%08x  A0:%08x  A1:%08x  A2:%08x "
              " A3:%08x  A4:%08x  A5:%08x  A6:%08x\n",

arch/misoc/src/minerva/minerva_dumpstate.c

@@ -74,7 +74,7 @@ static inline void mineva_registerdump(void)
 
   if (g_current_regs)
     {
-      _alert("EPC:%08x \n", g_current_regs[REG_CSR_MEPC]);
+      _alert("EPC:%08x\n", g_current_regs[REG_CSR_MEPC]);
       _alert(" X0:%08x  A0:%08x  A1:%08x  A2:%08x "
              " A3:%08x  A4:%08x  A5:%08x  A6:%08x\n",
              g_current_regs[REG_X0_NDX], g_current_regs[REG_X1_NDX],

arch/renesas/src/rx65n/rx65n_usbhost.c

@@ -841,7 +841,7 @@ uint16_t hw_usb_hread_devadd (uint16_t devsel)
   if (devadr > USB_MAXDEVADDR)
     {
       uerr("ERROR: device address %d is more than max device \
-            address. \n", devadd);
+            address.\n", devadd);
       return -ENODEV;
     }
   else
@@ -2765,7 +2765,7 @@ void usb_hstd_buf_to_fifo (uint8_t *buffer, size_t buflen, uint16_t pipe,
 
       /* FIFO access error */
 
-      syslog (LOG_INFO, "### FIFO access error \n");
+      syslog (LOG_INFO, "### FIFO access error\n");
       usb_hstd_forced_termination(pipe, (uint16_t) USB_DATA_ERR);
       break;
 
@@ -6215,7 +6215,7 @@ static void rx65n_usbhost_bottomhalf (void *arg)
         {
           /* Yes.. connected. */
 
-          connected_times ++;
+          connected_times++;
           syslog (LOG_INFO, "NuttX: USB Device Connected. %d\n",
                   connected_times);
           priv->connected = true;
@@ -6730,7 +6730,7 @@ static int rx65n_usbhost_epalloc(struct usbhost_driver_s *drvr,
 
       /* Note down the pipe number for reference */
 
-      ed ->pipenum = pipe_num;
+      ed->pipenum = pipe_num;
 
       /* Get the direction of the endpoint.  For control endpoints, the
        * direction is in the TD.
@@ -7615,7 +7615,7 @@ static ssize_t rx65n_usbhost_transfer(struct usbhost_driver_s *drvr,
 
         case TD_CC_DEVNOTRESPONDING:
           xfrinfo->wdhwait = false;
-          transfer_retry_count ++;
+          transfer_retry_count++;
           nbytes = -EBUSY;
           break;
 

arch/risc-v/src/bl602/bl602_i2c.c

@@ -754,7 +754,7 @@ static int bl602_i2c_transfer(struct i2c_master_s *dev,
         }
       else
         {
-          i2cerr("i2c transfer error, event = %d \n", priv->i2cstate);
+          i2cerr("i2c transfer error, event = %d\n", priv->i2cstate);
         }
 
       nxsem_post(&priv->sem_isr);
@@ -938,7 +938,7 @@ static int bl602_i2c_irq(int cpuint, void *context, void *arg)
     }
   else
     {
-      i2cerr("other interrupt \n");
+      i2cerr("other interrupt\n");
       priv->i2cstate = EV_I2C_UNKNOW_INT;
       bl602_i2c_callback(priv);
       return -1;

arch/risc-v/src/bl602/bl602_netdev.c

@@ -529,7 +529,7 @@ static void bl602_net_reply(struct bl602_net_driver_s *priv)
         {
           /* NOTIC: The release path of tx buffer cannot acquire net lock */
 
-          nerr("can not replay due to no tx buffer! \n");
+          nerr("can not replay due to no tx buffer!\n");
           PANIC();
         }
     }
@@ -1786,7 +1786,7 @@ bl602_net_ioctl(struct net_driver_s *dev, int cmd, unsigned long arg)
               memcpy(priv->wlan->mac,
                      priv->net_dev.d_mac.ether.ether_addr_octet,
                      6);
-              wlinfo("now in station mode \n");
+              wlinfo("now in station mode\n");
               priv->current_mode = IW_MODE_INFRA;
               return OK;
             }

arch/risc-v/src/esp32c3/esp32c3_freerun.c

@@ -159,7 +159,7 @@ int esp32c3_freerun_initialize(struct esp32c3_freerun_s *freerun, int chan,
 
       pre = esp32c3_clk_apb_freq() * resolution / USEC_PER_SEC;
 
-      tmrinfo("pre=% "PRIu16 " clk=%d \n", pre, esp32c3_clk_apb_freq());
+      tmrinfo("pre=% "PRIu16 " clk=%d\n", pre, esp32c3_clk_apb_freq());
 
       /* Configure TIMER prescaler */
 

arch/risc-v/src/esp32c3/esp32c3_spiflash_mtd.c

@@ -632,7 +632,7 @@ static int esp32c3_ioctl(struct mtd_dev_s *dev, int cmd,
                          unsigned long arg)
 {
   int ret = OK;
-  finfo("cmd: %d \n", cmd);
+  finfo("cmd: %d\n", cmd);
 
   switch (cmd)
     {

arch/risc-v/src/rv32im/riscv_assert.c

@@ -95,7 +95,7 @@ static inline void riscv_registerdump(volatile uint32_t *regs)
 {
   /* Are user registers available from interrupt processing? */
 
-  _alert("EPC:%08x \n", regs[REG_EPC]);
+  _alert("EPC:%08x\n", regs[REG_EPC]);
   _alert("A0:%08x A1:%08x A2:%08x A3:%08x A4:%08x A5:%08x "
          "A6:%08x A7:%08x\n",
          regs[REG_A0], regs[REG_A1], regs[REG_A2], regs[REG_A3],

arch/risc-v/src/rv64gc/riscv_assert.c

@@ -98,35 +98,35 @@ static inline void riscv_registerdump(volatile uintptr_t *regs)
 {
   /* Are user registers available from interrupt processing? */
 
-  _alert("EPC:%016" PRIx64 " \n", regs[REG_EPC]);
+  _alert("EPC:%016" PRIx64 "\n", regs[REG_EPC]);
   _alert("A0:%016" PRIx64 " A1:%01" PRIx64 "6 A2:%016" PRIx64
-         " A3:%016" PRIx64 " \n",
+         " A3:%016" PRIx64 "\n",
          regs[REG_A0], regs[REG_A1], regs[REG_A2], regs[REG_A3]);
   _alert("A4:%016" PRIx64 " A5:%016" PRIx64 "A6:%016" PRIx64
-         " A7:%016" PRIx64 " \n",
+         " A7:%016" PRIx64 "\n",
          regs[REG_A4], regs[REG_A5], regs[REG_A6], regs[REG_A7]);
   _alert("T0:%016" PRIx64 " T1:%016" PRIx64 " T2:%016" PRIx64
-         " T3:%016" PRIx64 " \n",
+         " T3:%016" PRIx64 "\n",
          regs[REG_T0], regs[REG_T1], regs[REG_T2], regs[REG_T3]);
-  _alert("T4:%016" PRIx64 " T5:%016" PRIx64 " T6:%016" PRIx64 " \n",
+  _alert("T4:%016" PRIx64 " T5:%016" PRIx64 " T6:%016" PRIx64 "\n",
          regs[REG_T4], regs[REG_T5], regs[REG_T6]);
   _alert("S0:%016" PRIx64 " S1:%016" PRIx64 " S2:%016" PRIx64
-         " S3:%016" PRIx64 " \n",
+         " S3:%016" PRIx64 "\n",
          regs[REG_S0], regs[REG_S1], regs[REG_S2], regs[REG_S3]);
   _alert("S4:%016" PRIx64 " S5:%016" PRIx64 " S6:%016" PRIx64
-         " S7:%016" PRIx64 " \n",
+         " S7:%016" PRIx64 "\n",
          regs[REG_S4], regs[REG_S5], regs[REG_S6], regs[REG_S7]);
   _alert("S8:%016" PRIx64 " S9:%016" PRIx64 " S10:%016" PRIx64
-         " S11:%016" PRIx64 " \n",
+         " S11:%016" PRIx64 "\n",
          regs[REG_S8], regs[REG_S9], regs[REG_S10], regs[REG_S11]);
 #ifdef RISCV_SAVE_GP
   _alert("GP:%016" PRIx64 " SP:%016" PRIx64 " FP:%016" PRIx64
-         " TP:%016" PRIx64 " RA:%016" PRIx64 " \n",
+         " TP:%016" PRIx64 " RA:%016" PRIx64 "\n",
          regs[REG_GP], regs[REG_SP], regs[REG_FP], regs[REG_TP],
          regs[REG_RA]);
 #else
   _alert("SP:%016" PRIx64 " FP:%016" PRIx64 " TP:%016" PRIx64
-         " RA:%016" PRIx64 " \n",
+         " RA:%016" PRIx64 "\n",
          regs[REG_SP], regs[REG_FP], regs[REG_TP], regs[REG_RA]);
 #endif
 }

arch/risc-v/src/rv64gc/riscv_fault.c

@@ -61,7 +61,7 @@ void up_fault(int irq, uint64_t *regs)
   _alert("EPC:%016" PRIx64 "\n",
          CURRENT_REGS[REG_EPC]);
 
-  _alert("Fault IRQ=%d \n", irq);
+  _alert("Fault IRQ=%d\n", irq);
 
   /* Dump register info */
 
@@ -81,7 +81,7 @@ void up_fault(int irq, uint64_t *regs)
          CURRENT_REGS[REG_T2], CURRENT_REGS[REG_T3]);
 
   _alert("T4:%016" PRIx64 " T5:%016" PRIx64
-         " T6:%016" PRIx64 " \n",
+         " T6:%016" PRIx64 "\n",
          CURRENT_REGS[REG_T4], CURRENT_REGS[REG_T5],
          CURRENT_REGS[REG_T6]);
 

arch/xtensa/src/esp32/esp32_ble.c

@@ -178,7 +178,7 @@ static int esp32_ble_recv_cb(uint8_t *data, uint16_t len)
 
   if (!valid)
     {
-      wlerr("Invalid H4 header \n");
+      wlerr("Invalid H4 header\n");
       ret = ERROR;
     }
   else

arch/xtensa/src/esp32/esp32_ble_adapter.c

@@ -2179,7 +2179,7 @@ static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
 
   if (ret < 0)
     {
-      wlerr("Failed to create mqueue %d \n", ret);
+      wlerr("Failed to create mqueue %d\n", ret);
       kmm_free(mq_adpt);
       return NULL;
     }

arch/xtensa/src/esp32/esp32_spiflash.c

@@ -1908,7 +1908,7 @@ static int esp32_ioctl(struct mtd_dev_s *dev, int cmd,
   int ret = -EINVAL;
   struct esp32_spiflash_s *priv = MTD2PRIV(dev);
 
-  finfo("cmd: %d \n", cmd);
+  finfo("cmd: %d\n", cmd);
 
   switch (cmd)
     {

arch/xtensa/src/esp32s2/esp32s2_freerun.c

@@ -159,7 +159,7 @@ int esp32s2_freerun_initialize(struct esp32s2_freerun_s *freerun,
 
       pre = esp_clk_apb_freq() * resolution / USEC_PER_SEC;
 
-      tmrinfo("pre= %" PRIu16 " clk=%d \n", pre, esp_clk_apb_freq());
+      tmrinfo("pre= %" PRIu16 " clk=%d\n", pre, esp_clk_apb_freq());
 
       /* Configure TIMER prescaler */
 

boards/arm/cxd56xx/common/src/cxd56_gs2200m.c

@@ -113,7 +113,7 @@ static void gs2200m_irq_enable(void)
 {
   irqstate_t flags = enter_critical_section();
 
-  wlinfo("== ec:%" PRId32 " called=%" PRId32 " \n",
+  wlinfo("== ec:%" PRId32 " called=%" PRId32 "\n",
          _enable_count, _n_called++);
 
   if (0 == _enable_count)
@@ -134,7 +134,7 @@ static void gs2200m_irq_disable(void)
 {
   irqstate_t flags = enter_critical_section();
 
-  wlinfo("== ec:%" PRId32 " called=%" PRId32 " \n",
+  wlinfo("== ec:%" PRId32 " called=%" PRId32 "\n",
          _enable_count, _n_called++);
 
   _enable_count--;

boards/arm/cxd56xx/spresense/src/cxd56_bringup.c

@@ -336,7 +336,7 @@ int cxd56_bringup(void)
   ret = board_pwm_setup();
   if (ret < 0)
     {
-      _err("ERROR: Failed to initialize pwm. \n");
+      _err("ERROR: Failed to initialize pwm.\n");
     }
 #endif
 
@@ -344,7 +344,7 @@ int cxd56_bringup(void)
   ret = cxd56_adcinitialize();
   if (ret < 0)
     {
-      _err("ERROR: Failed to initialize adc. \n");
+      _err("ERROR: Failed to initialize adc.\n");
     }
 #endif
 
@@ -352,7 +352,7 @@ int cxd56_bringup(void)
   ret = userled_lower_initialize("/dev/userleds");
   if (ret < 0)
     {
-      _err("ERROR: Failed to initialize led. \n");
+      _err("ERROR: Failed to initialize led.\n");
     }
 #endif
 
@@ -405,7 +405,7 @@ int cxd56_bringup(void)
   ret = board_sdcard_initialize();
   if (ret < 0)
     {
-      _err("ERROR: Failed to initialize sdhci. \n");
+      _err("ERROR: Failed to initialize sdhci.\n");
     }
 #endif
 
@@ -443,7 +443,7 @@ int cxd56_bringup(void)
   ret = board_gs2200m_initialize("/dev/gs2200m", 5);
   if (ret < 0)
     {
-      _err("ERROR: Failed to initialize GS2200M. \n");
+      _err("ERROR: Failed to initialize GS2200M.\n");
     }
 #endif
 
@@ -451,7 +451,7 @@ int cxd56_bringup(void)
   ret = cxd56_gnssinitialize("/dev/gps");
   if (ret < 0)
     {
-      _err("ERROR: Failed to initialize gnss. \n");
+      _err("ERROR: Failed to initialize gnss.\n");
     }
 #endif
 
@@ -459,7 +459,7 @@ int cxd56_bringup(void)
   ret = cxd56_geofenceinitialize("/dev/geofence");
   if (ret < 0)
     {
-      _err("ERROR: Failed to initialize geofence. \n");
+      _err("ERROR: Failed to initialize geofence.\n");
     }
 #endif
 

boards/arm/cxd56xx/spresense/src/cxd56_sdcard.c

@@ -82,7 +82,8 @@ static struct work_s g_sdcard_work;
 #endif
 
 static struct pm_cpu_freqlock_s g_hv_lock =
-  PM_CPUFREQLOCK_INIT(PM_CPUFREQLOCK_TAG('S','D',0), PM_CPUFREQLOCK_FLAG_HV);
+  PM_CPUFREQLOCK_INIT(PM_CPUFREQLOCK_TAG('S', 'D', 0),
+                      PM_CPUFREQLOCK_FLAG_HV);
 
 /****************************************************************************
  * Private Functions
@@ -348,7 +349,7 @@ int board_sdcard_initialize(void)
                              NULL);
   if (ret < 0)
     {
-      _err("ERROR: Failed to configure GPIO int. \n");
+      _err("ERROR: Failed to configure GPIO int.\n");
     }
 
   /* Enabling Interrupt */

boards/arm/imxrt/imxrt1064-evk/src/imxrt_flexspi_nor.c

@@ -545,7 +545,7 @@ static int imxrt_flexspi_nor_ioctl(FAR struct mtd_dev_s *dev,
                   (FAR struct imxrt_flexspi_nor_dev_s *)dev;
   int ret = -EINVAL; /* Assume good command with bad parameters */
 
-  finfo("cmd: %d \n", cmd);
+  finfo("cmd: %d\n", cmd);
 
   switch (cmd)
     {

boards/arm/lc823450/lc823450-xgevk/src/lc823450_wm8776.c

@@ -75,7 +75,7 @@ int lc823450_wm8776initialize(int minor)
   char devname[12];
   int ret;
 
-  ainfo("Initializing WM8776 \n");
+  ainfo("Initializing WM8776\n");
 
   /* Initialize I2C */
 

boards/arm/stm32/nucleo-l152re/src/stm32_spisd.c

@@ -113,7 +113,7 @@ int stm32_spisd_initialize(int port, int minor)
   stm32_configgpio(GPIO_SPI1_CS);   /* Assign CS */
   stm32_gpiowrite(GPIO_SPI1_CS, 1); /* Ensure the CS is inactive */
 
-  mcinfo("INFO: Initializing mmcsd port %d minor %d \n",
+  mcinfo("INFO: Initializing mmcsd port %d minor %d\n",
          port, minor);
 
   spi = stm32_spibus_initialize(port);

boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c

@@ -518,7 +518,7 @@ int stm32_bringup(void)
   ret = stm32_gs2200m_initialize("/dev/gs2200m", 3);
   if (ret < 0)
     {
-      serr("ERROR: Failed to initialize GS2200M: %d \n", ret);
+      serr("ERROR: Failed to initialize GS2200M: %d\n", ret);
     }
 #endif
 

boards/arm/stm32/stm32f4discovery/src/stm32_gs2200m.c

@@ -107,7 +107,7 @@ static void gs2200m_irq_enable(void)
   irqstate_t flags = spin_lock_irqsave(NULL);
   uint32_t dready = 0;
 
-  wlinfo("== ec:%" PRId32 " called=%" PRId32 " \n",
+  wlinfo("== ec:%" PRId32 " called=%" PRId32 "\n",
          _enable_count, _n_called++);
 
   if (0 == _enable_count)
@@ -130,7 +130,7 @@ static void gs2200m_irq_enable(void)
     {
       /* Call g_irq_handler directly */
 
-      wlinfo("== ** call irq handler ** \n");
+      wlinfo("== ** call irq handler **\n");
       g_irq_handler(0, NULL, g_irq_arg);
     }
 }
@@ -143,7 +143,7 @@ static void gs2200m_irq_disable(void)
 {
   irqstate_t flags = spin_lock_irqsave(NULL);
 
-  wlinfo("== ec:%" PRId32 " called=%" PRId32 " \n",
+  wlinfo("== ec:%" PRId32 " called=%" PRId32 "\n",
          _enable_count, _n_called++);
 
   _enable_count--;

boards/arm/stm32/stm32f4discovery/src/stm32_mmcsd.c

@@ -82,7 +82,7 @@ int stm32_mmcsd_initialize(int port, int minor)
   stm32_configgpio(GPIO_MMCSD_NSS);   /* Assign CS */
   stm32_gpiowrite(GPIO_MMCSD_NSS, 1); /* Ensure the CS is inactive */
 
-  mcinfo("INFO: Initializing mmcsd port %d minor %d \n",
+  mcinfo("INFO: Initializing mmcsd port %d minor %d\n",
          port, minor);
 
   spi = stm32_spibus_initialize(port);