Fix more overflow/truncation problems in timer setups

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1537 42af7a65-404d-4744-a932-0658087f49c3

ChangeLog

@@ -631,8 +631,9 @@
 	  wrong by 64 bytes (Kevin Franzen).
 	* ez80Acclaim!: Corrected some stack handling errors during interrupt handling
 	   context save and restore (Kevin Franzen).
-	* ez80Acclaim!:Corrected vector intialization logic (Kevin Franzen).
+	* ez80Acclaim!: Corrected vector intialization logic (Kevin Franzen).
-	* ez80Acclaim!: Corrected overflow problem in calculation of baud rate divisor
+	* ez80Acclaim!: Corrected overflow problem in the calculation of UART baud rate
+	    divisor, the system timer divisor, and the EMAC poll timer.
 	* ez80Acclaim!: Fixed GPIO pin configuration get serial output
 	* ez80Acclaim!: Correct stack overflow in ostest example configuration
 

Documentation/NuttX.html

@@ -1352,8 +1352,9 @@ nuttx-0.4.2 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
 	  wrong by 64 bytes (Kevin Franzen).
 	* ez80Acclaim!: Corrected some stack handling errors during interrupt handling
 	   context save and restore (Kevin Franzen).
-	* ez80Acclaim!:Corrected vector intialization logic (Kevin Franzen).
+	* ez80Acclaim!: Corrected vector intialization logic (Kevin Franzen).
-	* ez80Acclaim!: Corrected overflow problem in calculation of baud rate divisor
+	* ez80Acclaim!: Corrected overflow problem in the calculation of UART baud rate
+	    divisor, the system timer divisor, and the EMAC poll timer.
 	* ez80Acclaim!: Fixed GPIO pin configuration get serial output
 	* ez80Acclaim!: Correct stack overflow in ostest example configuration
 

Makefile

@@ -251,7 +251,7 @@ subdir_clean:
 	@$(MAKE) -C mm -f Makefile.test TOPDIR="$(TOPDIR)" clean
 
 clean: subdir_clean
-	@rm -f $(BIN) $(BIN).* mm_test *.map *~
+	@rm -f $(BIN) nuttx.* mm_test *.map *~
 
 subdir_distclean:
 	@for dir in $(CLEANDIRS) ; do \

arch/z80/src/ez80/ez80_emac.c

@@ -117,11 +117,6 @@
 #  error "Unsupported CONFIG_EZ80_PKTBUFSIZE value"
 #endif
 
-/* The system clock frequency is defined in the linkcmd file */
-
-extern unsigned long SYS_CLK_FREQ;
-#define _DEFCLK ((unsigned long)&SYS_CLK_FREQ)
-
 /* Select the fastest MDC clock that does not exceed 25MHz.  The MDC
  * clock derives from the SCLK divided by 4, 6, 8, 10, 14, 20, or 28.
  */
@@ -152,10 +147,10 @@ extern unsigned long SYS_CLK_FREQ;
 #define EMAC_RETRY             0x0f        /* CFG3: Maximum number of retry default value */
 
 /* Poll timer setting.  The transmit poll timer is set in increments of
- * SYSCLCK / 256
+ * SYSCLCK / 256.  NOTE: The system clock frequency is defined in the board.h file.
  */
 
-#define EMAC_PTMR              ((CONFIG_EZ80_TXPOLLTIMERMS * (_DEFCLK / 1000) >> 8))
+#define EMAC_PTMR              ((CONFIG_EZ80_TXPOLLTIMERMS * (ez80_systemclock / 1000) >> 8))
 
   /* EMAC system interrupts :
    *

arch/z80/src/ez80/ez80_lowuart.c

@@ -55,8 +55,6 @@
  * Private Definitions
  ****************************************************************************/
 
-/* The system clock frequency is defined in the board.h file */
-
 /* Is there any serial support?  This might be the case if the board does
  * not have serial ports but supports stdout through, say, an LCD.
  */
@@ -153,6 +151,8 @@ static void ez80_setbaud(void)
    * Or
    *
    *   BRG_Divisor = SYSTEM_CLOCK_FREQUENCY / 16 / BAUD
+   *
+   * NOTE: The system clock frequency value is defined in the board.h file
    */
 
    brg_divisor = (ez80_systemclock + (CONFIG_UART_BAUD << 3)) / (CONFIG_UART_BAUD << 4);

arch/z80/src/ez80/ez80_timerisr.c

@@ -1,7 +1,7 @@
 /***************************************************************************
  * arch/z80/src/ez80/ez80_timerisr.c
  *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -53,11 +53,6 @@
  * Definitions
  ***************************************************************************/
 
-/* The system clock frequency is defined in the linkcmd file */
-
-extern unsigned long SYS_CLK_FREQ;
-#define _DEFCLK ((unsigned long)&SYS_CLK_FREQ)
-
 /***************************************************************************
  * Private Types
  ***************************************************************************/
@@ -143,9 +138,11 @@ void up_timerinit(void)
    *
    * For a system timer of 50,000,000 that would result in a reload value of
    * 31,250
+   *
+   * NOTE: The system clock frequency value is defined in the board.h file
    */
 
-  reload = (uint16)(_DEFCLK / 1600);
+  reload = (uint16)(ez80_systemclock / 1600);
   outp(EZ80_TMR0_RRH, (ubyte)(reload >> 8));
   outp(EZ80_TMR0_RRL, (ubyte)(reload));
 

arch/z80/src/ez80/ez80f91.h

@@ -2,7 +2,7 @@
  * arch/z80/src/ez80/ez80f91.h
  * arch/z80/src/chip/ez80f91.h
  *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -206,7 +206,7 @@
 #  define EZ80_TMRCLKDIV_16    0x08        /*   01:  16 */
 #  define EZ80_TMRCLKDIV_64    0x10        /*   10:  64 */
 #  define EZ80_TMRCLKDIV_256   0x18        /*   11: 256 */
-#define EZ80_TMRCTL_TIMCONT    0x04        /* Bit 2: Continusous mode */
+#define EZ80_TMRCTL_TIMCONT    0x04        /* Bit 2: Continuous mode */
 #define EZ80_TMRCTL_RLD        0x02        /* Bit 1: Force reload */
 #define EZ80_TMRCTL_TIMEN      0x01        /* Bit 0: Programmable reload timer enabled */
 

configs/ez80f910200zco/ostest/defconfig

@@ -231,7 +231,7 @@ CONFIG_DEV_LOWCONSOLE=y
 CONFIG_DISABLE_CLOCK=n
 CONFIG_DISABLE_POSIX_TIMERS=n
 CONFIG_DISABLE_PTHREAD=n
-CONFIG_DISABLE_SIGNALS=n
+CONFIG_DISABLE_SIGNALS=y
 CONFIG_DISABLE_MQUEUE=n
 CONFIG_DISABLE_MOUNTPOINT=n
 CONFIG_DISABLE_ENVIRON=n