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More trailing whilespace removal

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This commit is contained in:
Gregory Nutt
2014-04-13 14:32:20 -06:00
parent 890beea0b6
commit 3a1324741a
349 changed files with 1082 additions and 1082 deletions
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4
drivers/analog/ad5410.c
View File

@@ -4,7 +4,7 @@
* Copyright (C) 2011 Li Zhuoyi. All rights reserved.
* Author: Li Zhuoyi <lzyy.cn@gmail.com>
* History: 0.1 2011-08-05 initial version
*
*
* This file is a part of NuttX:
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
@@ -63,7 +63,7 @@
#define AD5410_CMD_REXT (1<<13)
#define AD5410_CMD_OUTEN (1<<12)
#define AD5410_CMD_SRCLK(x) (x<<8)
#define AD5410_CMD_SRCLK(x) (x<<8)
#define AD5410_CMD_SRSTEP(x) (x<<5)
#define AD5410_CMD_SREN (1<<4)
#define AD5410_CMD_DCEN (1<<3)

2
drivers/analog/ads1255.c
View File

@@ -4,7 +4,7 @@
* Copyright (C) 2011 Li Zhuoyi. All rights reserved.
* Author: Li Zhuoyi <lzyy.cn@gmail.com>
* History: 0.1 2011-08-05 initial version
* 0.2 2011-08-25 fix bug in g_adcdev (cd_ops -> ad_ops,cd_priv -> ad_priv)
* 0.2 2011-08-25 fix bug in g_adcdev (cd_ops -> ad_ops,cd_priv -> ad_priv)
*
* This file is a part of NuttX:
*

2
drivers/analog/dac.c
View File

@@ -4,7 +4,7 @@
* Copyright (C) 2011 Li Zhuoyi. All rights reserved.
* Author: Li Zhuoyi <lzyy.cn@gmail.com>
* History: 0.1 2011-08-04 initial version
*
*
* Derived from drivers/can.c
*
* Copyright (C) 2008-2009Gregory Nutt. All rights reserved.

2
drivers/audio/i2schar.c
View File

@@ -438,7 +438,7 @@ int i2schar_register(FAR struct i2s_dev_s *i2s, int minor)
return OK;
}
return -ENOMEM;
}

2
drivers/bch/bchlib_read.c
View File

@@ -123,7 +123,7 @@ ssize_t bchlib_read(FAR void *handle, FAR char *buffer, size_t offset, size_t le
{
nbytes = bch->sectsize - sectoffset;
}
else
else
{
nbytes = len;
}

2
drivers/bch/bchlib_write.c
View File

@@ -122,7 +122,7 @@ ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, si
{
nbytes = bch->sectsize - sectoffset;
}
else
else
{
nbytes = len;
}

8
drivers/input/Kconfig
View File

@@ -57,7 +57,7 @@ config INPUT_ADS7843E
---help---
Enable support for the TI/Burr-Brown ADS7842 touchscreen controller. I believe
that driver should be compatibile with the TI/Burr-Brown TSC2046 and XPT2046
touchscreen controllers as well.
touchscreen controllers as well.
if INPUT_ADS7843E
@@ -116,7 +116,7 @@ config ADS7843E_THRESHX
thresholds. This trades reduces data rate for some loss in dragging accuracy. For
12-bit values so the raw ranges are 0-4095. So for example, if your display is
320x240, then THRESHX=13 and THRESHY=17 would correspond to one pixel. Default: 12
config ADS7843E_THRESHY
int "Y threshold"
default 12
@@ -132,7 +132,7 @@ config INPUT_STMPE811
bool "STMicro STMPE811 Driver"
default n
---help---
Enables support for the STMPE811 driver
Enables support for the STMPE811 driver
if INPUT_STMPE811
@@ -210,7 +210,7 @@ config STMPE811_THRESHX
STMPE811 is configure for 12-bit values so the raw ranges are 0-4095. So
for example, if your display is 320x240, then THRESHX=13 and THRESHY=17
would correspond to one pixel. Default: 12
config STMPE811_THRESHY
int "Y threshold"
default 12

36
drivers/input/max11802.c
View File

@@ -269,7 +269,7 @@ static uint16_t max11802_sendcmd(FAR struct max11802_dev_s *priv, uint8_t cmd, i
/* Send the command */
(void)SPI_SEND(priv->spi, cmd);
/* Read the data */
SPI_RECVBLOCK(priv->spi, buffer, 2);
@@ -278,7 +278,7 @@ static uint16_t max11802_sendcmd(FAR struct max11802_dev_s *priv, uint8_t cmd, i
result = ((uint16_t)buffer[0] << 8) | (uint16_t)buffer[1];
*tags = result & 0xF;
result >>= 4; // Get rid of tags
ivdbg("cmd:%02x response:%04x\n", cmd, result);
return result;
}
@@ -303,7 +303,7 @@ static void max11802_notify(FAR struct max11802_dev_s *priv)
* is no longer available.
*/
sem_post(&priv->waitsem);
sem_post(&priv->waitsem);
}
/* If there are threads waiting on poll() for MAX11802 data to become available,
@@ -415,7 +415,7 @@ static int max11802_waitsample(FAR struct max11802_dev_s *priv,
while (max11802_sample(priv, sample) < 0)
{
/* Wait for a change in the MAX11802 state */
ivdbg("Waiting..\n");
priv->nwaiters++;
ret = sem_wait(&priv->waitsem);
@@ -548,10 +548,10 @@ static void max11802_worker(FAR void *arg)
/* Lock the SPI bus so that we have exclusive access */
max11802_lock(priv->spi);
/* Start coordinate measurement */
(void)max11802_sendcmd(priv, MAX11802_CMD_MEASUREXY, &tags);
/* Get exclusive access to the driver data structure */
do
@@ -576,7 +576,7 @@ static void max11802_worker(FAR void *arg)
ivdbg("\nPD\n");
else
ivdbg("\nPU\n");
if (!pendown)
{
/* The pen is up.. reset thresholding variables. */
@@ -589,7 +589,7 @@ static void max11802_worker(FAR void *arg)
*/
ivdbg("\nPC%d\n", priv->sample.contact);
if (priv->sample.contact == CONTACT_NONE ||
priv->sample.contact == CONTACT_UP)
@@ -632,11 +632,11 @@ static void max11802_worker(FAR void *arg)
* the hardware value can change in the middle of the readout,
* causing the upper bits to be still invalid even though lower
* bits indicate valid result.
*
*
* We work around this by reading the registers once more after
* the tags indicate they are ready.
*/
int readycount = 0;
do {
#ifdef CONFIG_MAX11802_SWAPXY
@@ -651,17 +651,17 @@ static void max11802_worker(FAR void *arg)
readycount++;
}
} while (readycount < 2);
/* Continue to sample the position while the pen is down */
wd_start(priv->wdog, MAX11802_WDOG_DELAY, max11802_wdog, 1, (uint32_t)priv);
/* Check if data is valid */
if ((tags & 0x03) != 0)
{
ivdbg("Touch ended before measurement\n");
goto ignored;
}
/* Perform a thresholding operation so that the results will be more stable.
* If the difference from the last sample is small, then ignore the event.
* REVISIT: Should a large change in pressure also generate a event?
@@ -1253,27 +1253,27 @@ int max11802_register(FAR struct spi_dev_s *spi,
(void)SPI_SEND(priv->spi, MAX11802_CMD_TIMING_WR);
(void)SPI_SEND(priv->spi, MAX11802_TIMING);
SPI_SELECT(priv->spi, SPIDEV_TOUCHSCREEN, false);
SPI_SELECT(priv->spi, SPIDEV_TOUCHSCREEN, true);
(void)SPI_SEND(priv->spi, MAX11802_CMD_DELAY_WR);
(void)SPI_SEND(priv->spi, MAX11802_DELAY);
SPI_SELECT(priv->spi, SPIDEV_TOUCHSCREEN, false);
/* Test that the device access was successful. */
SPI_SELECT(priv->spi, SPIDEV_TOUCHSCREEN, true);
(void)SPI_SEND(priv->spi, MAX11802_CMD_MODE_RD);
ret = SPI_SEND(priv->spi, 0);
SPI_SELECT(priv->spi, SPIDEV_TOUCHSCREEN, false);
/* Unlock the bus */
max11802_unlock(spi);
if (ret != MAX11802_MODE)
{
idbg("max11802 mode readback failed: %02x\n", ret);
goto errout_with_priv;
}
/* Register the device as an input device */
(void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);

2
drivers/input/stmpe811_adc.c
View File

@@ -258,7 +258,7 @@ uint16_t stmpe811_adcread(STMPE811_HANDLE handle, int pin)
/* At the completion of the conversion, return whatever we read from
* from the channel register associated with the pin.
*/
return stmpe811_getreg16(priv, STMPE811_ADC_DATACH(pin));
}

8
drivers/input/stmpe811_base.c
View File

@@ -397,7 +397,7 @@ uint8_t stmpe811_getreg8(FAR struct stmpe811_dev_s *priv, uint8_t regaddr)
{
/* 8-bit data read sequence:
*
* Start - I2C_Write_Address - STMPE811_Reg_Address -
* Start - I2C_Write_Address - STMPE811_Reg_Address -
* Repeated_Start - I2C_Read_Address - STMPE811_Read_Data - STOP
*/
@@ -414,7 +414,7 @@ uint8_t stmpe811_getreg8(FAR struct stmpe811_dev_s *priv, uint8_t regaddr)
* (no STOP) */
/* Set up the 8-bit STMPE811 data read message */
msg[1].addr = priv->config->address; /* 7-bit address */
msg[1].flags = I2C_M_READ; /* Read transaction, beginning with Re-START */
msg[1].buffer = &regval; /* Transfer to this address */
@@ -500,7 +500,7 @@ uint16_t stmpe811_getreg16(FAR struct stmpe811_dev_s *priv, uint8_t regaddr)
{
/* 16-bit data read sequence:
*
* Start - I2C_Write_Address - STMPE811_Reg_Address -
* Start - I2C_Write_Address - STMPE811_Reg_Address -
* Repeated_Start - I2C_Read_Address - STMPE811_Read_Data_1 -
* STMPE811_Read_Data_2 - STOP
*/
@@ -519,7 +519,7 @@ uint16_t stmpe811_getreg16(FAR struct stmpe811_dev_s *priv, uint8_t regaddr)
* (no STOP) */
/* Set up the 8-bit STMPE811 data read message */
msg[1].addr = priv->config->address; /* 7-bit address */
msg[1].flags = I2C_M_READ; /* Read transaction, beginning with Re-START */
msg[1].buffer = rxbuffer; /* Transfer to this address */

2
drivers/input/stmpe811_gpio.c
View File

@@ -215,7 +215,7 @@ int stmpe811_gpioconfig(STMPE811_HANDLE handle, uint8_t pinconfig)
regval &= pinmask;
}
stmpe811_putreg8(priv, STMPE811_GPIO_RE, regval);
/* Disable interrupts for now */
regval = stmpe811_getreg8(priv, STMPE811_GPIO_EN);

10
drivers/input/stmpe811_temp.c
View File

@@ -98,11 +98,11 @@ int stmpe811_tempinitialize(STMPE811_HANDLE handle)
/* Enable the temperature sensor */
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL, TEMP_CTRL_ENABLE);
/* Aquire data enable */
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL, (TEMP_CTRL_ACQ|TEMP_CTRL_ENABLE));
return OK;
}
@@ -124,14 +124,14 @@ int stmpe811_tempinitialize(STMPE811_HANDLE handle)
uint16_t stmpe811_tempread(STMPE811_HANDLE handle)
{
FAR struct stmpe811_dev_s *priv = (FAR struct stmpe811_dev_s *)handle;
uint32_t temp = 0;
uint32_t temp = 0;
uint8_t temp1;
uint8_t temp2;
/* Acquire data enable */
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL, (TEMP_CTRL_ACQ|TEMP_CTRL_ENABLE));
/* Read the temperature */
temp1 = stmpe811_getreg8(priv, STMPE811_SYS_CTRL2);

6
drivers/input/stmpe811_tsc.c
View File

@@ -180,7 +180,7 @@ static void stmpe811_notify(FAR struct stmpe811_dev_s *priv)
* is no longer available.
*/
sem_post(&priv->waitsem);
sem_post(&priv->waitsem);
}
/* If there are threads waiting on poll() for STMPE811 data to become available,
@@ -297,7 +297,7 @@ static inline int stmpe811_waitsample(FAR struct stmpe811_dev_s *priv,
while (stmpe811_sample(priv, sample) < 0)
{
/* Wait for a change in the STMPE811 state */
priv->nwaiters++;
ret = sem_wait(&priv->waitsem);
priv->nwaiters--;
@@ -1133,7 +1133,7 @@ ignored:
(void)wd_start(priv->wdog, STMPE811_PENUP_TICKS, stmpe811_timeout,
1, (uint32_t)((uintptr_t)priv));
}
/* Reset and clear all data in the FIFO */
stmpe811_putreg8(priv, STMPE811_FIFO_STA, FIFO_STA_FIFO_RESET);

12
drivers/input/tsc2007.c
View File

@@ -261,7 +261,7 @@ static void tsc2007_notify(FAR struct tsc2007_dev_s *priv)
* is no longer available.
*/
sem_post(&priv->waitsem);
sem_post(&priv->waitsem);
}
/* If there are threads waiting on poll() for TSC2007 data to become available,
@@ -373,7 +373,7 @@ static int tsc2007_waitsample(FAR struct tsc2007_dev_s *priv,
while (tsc2007_sample(priv, sample) < 0)
{
/* Wait for a change in the TSC2007 state */
priv->nwaiters++;
ret = sem_wait(&priv->waitsem);
priv->nwaiters--;
@@ -436,7 +436,7 @@ static int tsc2007_activate(FAR struct tsc2007_dev_s *priv, uint8_t cmd)
msg.flags = 0; /* Write transaction, beginning with START */
msg.buffer = &data; /* Transfer from this address */
msg.length = 1; /* Send one byte following the address */
/* Ignore errors from the setup command (because it is not ACKed) */
(void)I2C_TRANSFER(priv->i2c, &msg, 1);
@@ -449,7 +449,7 @@ static int tsc2007_activate(FAR struct tsc2007_dev_s *priv, uint8_t cmd)
msg.flags = 0; /* Write transaction, beginning with START */
msg.buffer = &data; /* Transfer from this address */
msg.length = 1; /* Send one byte following the address */
ret = I2C_TRANSFER(priv->i2c, &msg, 1);
if (ret < 0)
{
@@ -487,7 +487,7 @@ static int tsc2007_transfer(FAR struct tsc2007_dev_s *priv, uint8_t cmd)
msg.flags = 0; /* Write transaction, beginning with START */
msg.buffer = &cmd; /* Transfer from this address */
msg.length = 1; /* Send one byte following the address */
ret = I2C_TRANSFER(priv->i2c, &msg, 1);
if (ret < 0)
{
@@ -531,7 +531,7 @@ static int tsc2007_transfer(FAR struct tsc2007_dev_s *priv, uint8_t cmd)
msg.flags = I2C_M_READ; /* Read transaction, beginning with START */
msg.buffer = data12; /* Transfer to this address */
msg.length = 2; /* Read two bytes following the address */
ret = I2C_TRANSFER(priv->i2c, &msg, 1);
if (ret < 0)
{

8
drivers/lcd/memlcd.c
View File

@@ -95,7 +95,7 @@
/* contrast setting, related to VCOM toggle frequency
* higher frequency gives better contrast, instead, saves power
*/
#define MEMLCD_CONTRAST 24
#define MEMLCD_MAXCONTRAST 60
#define MEMLCD_MINCONTRAST 1
@@ -333,14 +333,14 @@ static inline void memlcd_select(FAR struct spi_dev_s *spi)
#else
static void memlcd_select(FAR struct spi_dev_s *spi)
{
/*
/*
* Select memlcd (locking the SPI bus in case there are multiple
* devices competing for the SPI bus
*/
SPI_LOCK(spi, true);
SPI_SELECT(spi, SPIDEV_DISPLAY, true);
/*
/*
* Now make sure that the SPI bus is configured for the memlcd (it
* might have gotten configured for a different device while unlocked)
*/
@@ -435,7 +435,7 @@ static int memlcd_extcominisr(int irq, FAR void *context)
struct memlcd_dev_s *mlcd = &g_memlcddev;
#ifdef CONFIG_MEMLCD_EXTCOMIN_MODE_HW
# error "CONFIG_MEMLCD_EXTCOMIN_MODE_HW unsupported yet!"
/*
/*
* start a worker thread, do it in bottom half?
*/
#else

16
drivers/lcd/mio283qt2.c
View File

@@ -12,7 +12,7 @@
* Ltd., Revision 1.0
* 2) Data Sheet: HX8347-D(T), 240RGB x 320 dot, 262K color, with internal GRAM, TFT
* Mobile Single Chip Driver Version 02 March, Doc No. HX8347-D(T)-DS, Himax
* Technologies, Inc., 2009,
* Technologies, Inc., 2009,
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -42,7 +42,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************************/
/**************************************************************************************
* Included Files
**************************************************************************************/
@@ -119,7 +119,7 @@
/* Display/Color Properties ***********************************************************/
/* Display Resolution */
#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
# define MIO283QT2_XRES 320
# define MIO283QT2_YRES 240
#else
@@ -143,7 +143,7 @@
/* LCD Profiles ***********************************************************************/
/* Many details of the controller initialization must, unfortunately, vary from LCD to
* LCD. I have looked at the spec and at three different drivers for LCDs that have
* LCD. I have looked at the spec and at three different drivers for LCDs that have
* MIO283QT2 controllers. I have tried to summarize these differences as "LCD profiles"
*
* Most of the differences between LCDs are nothing more than a few minor bit
@@ -352,7 +352,7 @@ static struct mio283qt2_dev_s g_lcddev;
**************************************************************************************/
/**************************************************************************************
* Name: mio283qt2_putreg(lcd,
* Name: mio283qt2_putreg(lcd,
*
* Description:
* Write to an LCD register
@@ -443,7 +443,7 @@ static inline void mio283qt2_readsetup(FAR struct mio283qt2_lcd_s *lcd,
* Read one correctly aligned pixel from the GRAM memory. Possibly shifting the
* data and possibly swapping red and green components.
*
* - ILI932x: Unknown -- assuming colors are in the color order
* - ILI932x: Unknown -- assuming colors are in the color order
*
**************************************************************************************/
@@ -530,7 +530,7 @@ static int mio283qt2_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *b
FAR struct mio283qt2_lcd_s *lcd = priv->lcd;
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
int i;
/* Buffer must be provided and aligned to a 16-bit address boundary */
lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
@@ -580,7 +580,7 @@ static int mio283qt2_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
FAR uint16_t *dest = (FAR uint16_t*)buffer;
uint16_t accum;
int i;
/* Buffer must be provided and aligned to a 16-bit address boundary */
lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);

14
drivers/lcd/mio283qt9a.c
View File

@@ -36,7 +36,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************************/
/**************************************************************************************
* Included Files
**************************************************************************************/
@@ -113,7 +113,7 @@
/* Display/Color Properties ***********************************************************/
/* Display Resolution */
#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
# define MIO283QT9A_XRES 320
# define MIO283QT9A_YRES 240
#else
@@ -280,7 +280,7 @@ static uint16_t mio283qt9a_readreg(FAR struct mio283qt9a_lcd_s *lcd, uint8_t reg
{
/* Set the index register to the register address and read the register contents. */
lcd->index(lcd, regaddr);
lcd->index(lcd, regaddr);
return lcd->read(lcd);
}
#endif
@@ -342,7 +342,7 @@ static inline void mio283qt9a_readsetup(FAR struct mio283qt9a_lcd_s *lcd,
* Read one correctly aligned pixel from the GRAM memory. Possibly shifting the
* data and possibly swapping red and green components.
*
* - ILI932x: Unknown -- assuming colors are in the color order
* - ILI932x: Unknown -- assuming colors are in the color order
*
**************************************************************************************/
@@ -433,7 +433,7 @@ static int mio283qt9a_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *
FAR struct mio283qt9a_lcd_s *lcd = priv->lcd;
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
int i;
/* Buffer must be provided and aligned to a 16-bit address boundary */
//lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
@@ -483,7 +483,7 @@ static int mio283qt9a_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer
FAR uint16_t *dest = (FAR uint16_t*)buffer;
uint16_t accum;
int i;
/* Buffer must be provided and aligned to a 16-bit address boundary */
lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
@@ -814,7 +814,7 @@ static inline int mio283qt9a_hwinitialize(FAR struct mio283qt9a_dev_s *priv)
/*************************************************************************************
* Public Functions
**************************************************************************************/
/**************************************************************************************
* Name: mio283qt9a_lcdinitialize
*

20
drivers/lcd/nokia6100.c
View File

@@ -433,7 +433,7 @@ static const struct fb_videoinfo_s g_videoinfo =
/* This is the standard, NuttX Plane information object */
static const struct lcd_planeinfo_s g_planeinfo =
static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = nokia_putrun, /* Put a run into LCD memory */
.getrun = nokia_getrun, /* Get a run from LCD memory */
@@ -443,12 +443,12 @@ static const struct lcd_planeinfo_s g_planeinfo =
/* This is the standard, NuttX LCD driver object */
static struct nokia_dev_s g_lcddev =
static struct nokia_dev_s g_lcddev =
{
.dev =
{
/* LCD Configuration */
.getvideoinfo = nokia_getvideoinfo,
.getplaneinfo = nokia_getplaneinfo,
@@ -523,7 +523,7 @@ static const uint8_t g_pwrctr[] =
* P3: Grayscale setup
*/
static const uint8_t g_datctl[] =
static const uint8_t g_datctl[] =
{
S1D15G10_DATCTL, /* Data control */
0
@@ -586,11 +586,11 @@ static const uint8_t g_paset[] =
};
/* Column address set (CASET) */
static const uint8_t g_caset[] =
{
S1D15G10_CASET, /* Column start address set */
NOKIA_COLBIAS,
NOKIA_COLBIAS,
131
};
#endif /* CONFIG_NOKIA6100_S1D15G10 */
@@ -665,7 +665,7 @@ static const uint8_t g_setcon[] =
* Assumptions:
*
**************************************************************************************/
static inline void nokia_configspi(FAR struct spi_dev_s *spi)
{
lcddbg("Mode: %d Bits: %d Frequency: %d\n",
@@ -884,7 +884,7 @@ static void nokia_clrram(FAR struct spi_dev_s *spi)
*rowbuf++ = NOKIA_LCD_DATA;
}
/* Select the LCD and send the RAMWR command */
nokia_select(spi);
@@ -948,7 +948,7 @@ static int nokia_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffe
cmd[0] = LCD_CASET;
cmd[1] = row | NOKIA_LCD_DATA;
cmd[2] = NOKIA_ENDCOL | NOKIA_LCD_DATA;
(void)SPI_SNDBLOCK(spi, cmd, 3);
(void)SPI_SNDBLOCK(spi, cmd, 3);
nokia_deselect(spi);
/* Then send the run */
@@ -1212,7 +1212,7 @@ FAR struct lcd_dev_s *nokia_lcdinitialize(FAR struct spi_dev_s *spi, unsigned in
DEBUGASSERT(devno == 0);
/* Initialize the driver data structure */
priv->spi = spi; /* Save the SPI instance */
priv->contrast = NOKIA_DEFAULT_CONTRAST; /* Initial contrast setting */

6
drivers/lcd/sd1329.h
View File

@@ -86,7 +86,7 @@
#define SSD1329_SET_ROWADDR 0x75
/* Set Contract Current
*
*
* This double byte command is to set Contrast Setting of the display. The
* chip has 256 contrast steps from 0x00 to 0xff. The segment output current
* increases linearly with the increase of contrast step.
@@ -142,9 +142,9 @@
* ...
* ff = 127.5 uA
*/
#define SSD1329_ICON_CURRRNG 0x91
/* Set Individual Icon Current
*
* This multiple byte command is used to fine tune the current for each of the

6
drivers/lcd/skeleton.c
View File

@@ -176,7 +176,7 @@ static const struct fb_videoinfo_s g_videoinfo =
/* This is the standard, NuttX Plane information object */
static const struct lcd_planeinfo_s g_planeinfo =
static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = skel_putrun, /* Put a run into LCD memory */
.getrun = skel_getrun, /* Get a run from LCD memory */
@@ -186,12 +186,12 @@ static const struct lcd_planeinfo_s g_planeinfo =
/* This is the standard, NuttX LCD driver object */
static struct skel_dev_s g_lcddev =
static struct skel_dev_s g_lcddev =
{
.dev =
{
/* LCD Configuration */
.getvideoinfo = skel_getvideoinfo,
.getplaneinfo = skel_getplaneinfo,

28
drivers/lcd/ssd1289.c
View File

@@ -38,7 +38,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************************/
/**************************************************************************************
* Included Files
**************************************************************************************/
@@ -117,7 +117,7 @@
/* Display/Color Properties ***********************************************************/
/* Display Resolution */
#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
# define SSD1289_XRES 320
# define SSD1289_YRES 240
#else
@@ -132,7 +132,7 @@
/* LCD Profiles ***********************************************************************/
/* Many details of the controller initialization must, unfortunately, vary from LCD to
* LCD. I have looked at the spec and at three different drivers for LCDs that have
* LCD. I have looked at the spec and at three different drivers for LCDs that have
* SSD1289 controllers. I have tried to summarize these differences as "LCD profiles"
*
* Most of the differences between LCDs are nothing more than a few minor bit
@@ -361,7 +361,7 @@ static struct ssd1289_dev_s g_lcddev;
**************************************************************************************/
/**************************************************************************************
* Name: ssd1289_putreg(lcd,
* Name: ssd1289_putreg(lcd,
*
* Description:
* Write to an LCD register
@@ -448,7 +448,7 @@ static inline void ssd1289_readsetup(FAR struct ssd1289_lcd_s *lcd, FAR uint16_t
* Read one correctly aligned pixel from the GRAM memory. Possibly shifting the
* data and possibly swapping red and green components.
*
* - ILI932x: Unknown -- assuming colors are in the color order
* - ILI932x: Unknown -- assuming colors are in the color order
*
**************************************************************************************/
@@ -590,7 +590,7 @@ static int ssd1289_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buf
FAR struct ssd1289_lcd_s *lcd = priv->lcd;
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
int i;
/* Buffer must be provided and aligned to a 16-bit address boundary */
ssd1289_showrun(priv, row, col, npixels, true);
@@ -674,7 +674,7 @@ static int ssd1289_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buf
*/
row = (SSD1289_YRES-1) - row;
/* Then write the GRAM data, manually incrementing Y (which is col) */
for (i = 0; i < npixels; i++)
@@ -721,7 +721,7 @@ static int ssd1289_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
FAR uint16_t *dest = (FAR uint16_t*)buffer;
uint16_t accum;
int i;
/* Buffer must be provided and aligned to a 16-bit address boundary */
ssd1289_showrun(priv, row, col, npixels, false);
@@ -807,7 +807,7 @@ static int ssd1289_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
*/
row = (SSD1289_YRES-1) - row;
/* Then write the GRAM data, manually incrementing Y (which is col) */
for (i = 0; i < npixels; i++)
@@ -950,7 +950,7 @@ static int ssd1289_setpower(FAR struct lcd_dev_s *dev, int power)
ssd1289_putreg(lcd, SSD1289_DSPCTRL,
(SSD1289_DSPCTRL_ON | SSD1289_DSPCTRL_GON |
SSD1289_DSPCTRL_DTE | SSD1289_DSPCTRL_VLE(0)));
SSD1289_DSPCTRL_DTE | SSD1289_DSPCTRL_VLE(0)));
g_lcddev.power = power;
}
@@ -1066,7 +1066,7 @@ static inline int ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv)
ssd1289_putreg(lcd, SSD1289_DSPCTRL,
(SSD1289_DSPCTRL_INTERNAL | SSD1289_DSPCTRL_GON |
SSD1289_DSPCTRL_VLE(0)));
SSD1289_DSPCTRL_VLE(0)));
/* Then enable the oscillator */
@@ -1078,7 +1078,7 @@ static inline int ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv)
ssd1289_putreg(lcd, SSD1289_DSPCTRL,
(SSD1289_DSPCTRL_ON | SSD1289_DSPCTRL_GON |
SSD1289_DSPCTRL_VLE(0)));
SSD1289_DSPCTRL_VLE(0)));
/* Take the LCD out of sleep mode */
@@ -1091,7 +1091,7 @@ static inline int ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv)
ssd1289_putreg(lcd, SSD1289_DSPCTRL,
(SSD1289_DSPCTRL_ON | SSD1289_DSPCTRL_DTE |
SSD1289_DSPCTRL_GON | SSD1289_DSPCTRL_VLE(0)));
SSD1289_DSPCTRL_GON | SSD1289_DSPCTRL_VLE(0)));
#endif
/* Set up power control registers. There is a lot of variability
@@ -1199,7 +1199,7 @@ static inline int ssd1289_hwinitialize(FAR struct ssd1289_dev_s *priv)
ssd1289_putreg(lcd, SSD1289_DSPCTRL,
(SSD1289_DSPCTRL_ON | SSD1289_DSPCTRL_DTE |
SSD1289_DSPCTRL_GON | SSD1289_DSPCTRL_VLE(1)));
SSD1289_DSPCTRL_GON | SSD1289_DSPCTRL_VLE(1)));
/* Frame cycle control. Alternative: SSD1289_FCYCCTRL_DIV8 */

4
drivers/lcd/ssd1289.h
View File

@@ -58,7 +58,7 @@
#define SSD1289_OUTCTRL 0x01 /* Driver output control */
#define SSD1289_ACCTRL 0x02 /* LCD drive AC control */
#define SSD1289_PWRCTRL1 0x03 /* Power control 1 */
#define SSD1289_CMP1 0x05 /* Compare register 1 */
#define SSD1289_CMP1 0x05 /* Compare register 1 */
#define SSD1289_CMP2 0x06 /* Compare register 2 */
#define SSD1289_DSPCTRL 0x07 /* Display control */
#define SSD1289_FCYCCTRL 0x0b /* Frame cycle control */
@@ -198,7 +198,7 @@
# define SSD1289_PWRCTRL1_DCT_FOSd12 (14 << SSD1289_PWRCTRL1_DCT_SHIFT)
# define SSD1289_PWRCTRL1_DCT_FOSd16 (15 << SSD1289_PWRCTRL1_DCT_SHIFT)
/* Compare register 1 and 2 */
/* Compare register 1 and 2 */
#define SSD1289_CMP1_CPG_SHIFT (2)
#define SSD1289_CMP1_CPG_MASK (0x3f << SSD1289_CMP1_CPG_SHIFT)

2
drivers/mtd/at24xx.c
View File

@@ -413,7 +413,7 @@ FAR struct mtd_dev_s *at24c_initialize(FAR struct i2c_dev_s *dev)
if (priv)
{
/* Initialize the allocated structure */
priv->addr = CONFIG_AT24XX_ADDR;
priv->pagesize = AT24XX_PAGESIZE;
priv->npages = AT24XX_NPAGES;

12
drivers/mtd/at25.c
View File

@@ -224,7 +224,7 @@ static inline int at25_readid(struct at25_dev_s *priv)
(void)SPI_SEND(priv->dev, AT25_RDID);
manufacturer = SPI_SEND(priv->dev, AT25_DUMMY);
memory = SPI_SEND(priv->dev, AT25_DUMMY);
/* Deselect the FLASH and unlock the bus */
SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
@@ -266,7 +266,7 @@ static void at25_waitwritecomplete(struct at25_dev_s *priv)
/* Send "Read Status Register (RDSR)" command */
(void)SPI_SEND(priv->dev, AT25_RDSR);
/* Loop as long as the memory is busy with a write cycle */
do
@@ -322,7 +322,7 @@ static void at25_waitwritecomplete(struct at25_dev_s *priv)
{
fdbg("ERROR: Write error, status: 0x%02x\n", status);
}
fvdbg("Complete, status: 0x%02x\n", status);
}
@@ -440,7 +440,7 @@ static inline void at25_pagewrite(struct at25_dev_s *priv, FAR const uint8_t *bu
/* Enable the write access to the FLASH */
at25_writeenable(priv);
/* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
@@ -458,7 +458,7 @@ static inline void at25_pagewrite(struct at25_dev_s *priv, FAR const uint8_t *bu
/* Then write the specified number of bytes */
SPI_SNDBLOCK(priv->dev, buffer, 256);
/* Deselect the FLASH: Chip Select high */
SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
@@ -635,7 +635,7 @@ static int at25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
at25_unlock(priv->dev);
}
break;
case MTDIOC_XIPBASE:
default:
ret = -ENOTTY; /* Bad command */

18
drivers/mtd/at45db.c
View File

@@ -355,7 +355,7 @@ static inline int at45db_rdid(struct at45db_dev_s *priv)
fvdbg("manufacturer: %02x devid1: %02x devid2: %02x\n",
devid[0], devid[1], devid[2]);
/* Check for a valid manufacturer and memory family */
if (devid[0] == AT45DB_MANUFACTURER &&
@@ -609,7 +609,7 @@ static int at45db_erase(FAR struct mtd_dev_s *mtd, off_t startblock, size_t nblo
/* Take the lock so that we have exclusive access to the bus, then power up the
* FLASH device.
*/
at45db_lock(priv);
at45db_resume(priv);
@@ -663,7 +663,7 @@ static ssize_t at45db_bwrite(FAR struct mtd_dev_s *mtd, off_t startblock, size_t
/* Take the lock so that we have exclusive access to the bus, then power up the
* FLASH device.
*/
at45db_lock(priv);
at45db_resume(priv);
@@ -704,10 +704,10 @@ static ssize_t at45db_read(FAR struct mtd_dev_s *mtd, off_t offset, size_t nbyte
/* Take the lock so that we have exclusive access to the bus, then power up the
* FLASH device.
*/
at45db_lock(priv);
at45db_resume(priv);
/* Higher performance write logic: We leave the chip busy after write and erase
* operations. This improves write and erase performance because we do not have
* to wait as long between transactions (other processing can occur while the chip
@@ -776,7 +776,7 @@ static int at45db_ioctl(FAR struct mtd_dev_s *mtd, int cmd, unsigned long arg)
/* Take the lock so that we have exclusive access to the bus, then
* power up the FLASH device.
*/
at45db_lock(priv);
at45db_resume(priv);
@@ -787,7 +787,7 @@ static int at45db_ioctl(FAR struct mtd_dev_s *mtd, int cmd, unsigned long arg)
at45db_unlock(priv);
}
break;
case MTDIOC_XIPBASE:
default:
ret = -ENOTTY; /* Bad command */
@@ -884,7 +884,7 @@ FAR struct mtd_dev_s *at45db_initialize(FAR struct spi_dev_s *spi)
at45db_pwrdown(priv);
at45db_unlock(priv);
}
}
/* Register the MTD with the procfs system if enabled */
@@ -896,7 +896,7 @@ FAR struct mtd_dev_s *at45db_initialize(FAR struct spi_dev_s *spi)
return (FAR struct mtd_dev_s *)priv;
/* On any failure, we need free memory allocations and release the lock that
* we hold on the SPI bus. On failures, assume that we cannot talk to the
* we hold on the SPI bus. On failures, assume that we cannot talk to the
* device to do any more.
*/

12
drivers/mtd/ftl.c
View File

@@ -215,7 +215,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
size_t nxfrd;
int nbytes;
int ret;
/* Get the aligned block. Here is is assumed: (1) The number of R/W blocks
* per erase block is a power of 2, and (2) the erase begins with that same
* alignment.
@@ -232,7 +232,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
/* Check if the write is shorter than to the end of the erase block */
bool short_write = (remaining < (alignedblock - startblock));
/* Read the full erase block into the buffer */
rwblock = startblock & ~mask;
@@ -256,7 +256,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
/* Copy the user data at the end of the buffered erase block */
offset = (startblock & mask) * dev->geo.blocksize;
if (short_write)
{
nbytes = remaining * dev->geo.blocksize;
@@ -265,7 +265,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
{
nbytes = dev->geo.erasesize - offset;
}
fvdbg("Copy %d bytes into erase block=%d at offset=%d\n",
nbytes, eraseblock, offset);
@@ -290,7 +290,7 @@ static ssize_t ftl_flush(FAR void *priv, FAR const uint8_t *buffer,
{
remaining -= dev->blkper - (startblock & mask);
}
buffer += nbytes;
}
@@ -427,7 +427,7 @@ static int ftl_geometry(FAR struct inode *inode, struct geometry *geometry)
geometry->geo_writeenabled ? "true" : "false");
fvdbg("nsectors: %d sectorsize: %d\n",
geometry->geo_nsectors, geometry->geo_sectorsize);
return OK;
}
return -EINVAL;

2
drivers/mtd/mtd_nandmodel.c
View File

@@ -138,7 +138,7 @@ int nandmodel_find(FAR const struct nand_model_s *modeltab, size_t size,
switch (id4 & 0x30)
{
case 0x00:
model->blocksize = 64;
model->blocksize = 64;
break;
case 0x10:

4
drivers/mtd/mtd_nandscheme.c
View File

@@ -116,7 +116,7 @@ const struct nand_scheme_s g_nand_sparescheme2048 =
/* 24 ecc bytes */
24,
24,
/* 38 extra bytes */
@@ -268,7 +268,7 @@ void nandscheme_writeecc(FAR const struct nand_scheme_s *scheme,
for (i = 0; i < scheme->eccsize; i++)
{
spare[scheme->eccbytepos[i]] = ecc[i];
}
}
}
/****************************************************************************

2
drivers/mtd/mtd_procfs.c
View File

@@ -320,7 +320,7 @@ static int mtd_stat(const char *relpath, struct stat *buf)
*
* Description:
* Registers MTD device with the procfs file system. This assigns a unique
* MTD number and associates the given device name, then add adds it to
* MTD number and associates the given device name, then add adds it to
* the list of registered devices.
*
* In an embedded system, this all is really unnecessary, but is provided

30
drivers/mtd/ramtron.c
View File

@@ -37,16 +37,16 @@
************************************************************************************/
/* OPTIONS:
* - additional non-jedec standard device: FM25H20
* - additional non-jedec standard device: FM25H20
* must be enabled with the CONFIG_RAMTRON_FRAM_NON_JEDEC=y
*
*
* NOTE:
* - frequency is fixed to desired max by RAMTRON_INIT_CLK_MAX
* if new devices with different speed arrive, then SETFREQUENCY()
* if new devices with different speed arrive, then SETFREQUENCY()
* needs to handle freq changes and INIT_CLK_MAX must be reduced
* to fit all devices. Note that STM32_SPI driver is prone to
* too high freq. parameters and limit it within physical constraints.
*
*
* TODO:
* - add support for sleep
* - add support for faster read FSTRD command
@@ -295,7 +295,7 @@ static void ramtron_lock(FAR struct spi_dev_s *dev)
SPI_SETMODE(dev, SPIDEV_MODE3);
SPI_SETBITS(dev, 8);
(void)SPI_SETFREQUENCY(dev, RAMTRON_INIT_CLK_MAX);
}
@@ -343,13 +343,13 @@ static inline int ramtron_readid(struct ramtron_dev_s *priv)
SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
ramtron_unlock(priv->dev);
/* Select part from the part list */
for (priv->part = ramtron_parts;
priv->part->name != NULL && !(priv->part->id1 == capacity && priv->part->id2 == part);
priv->part++);
if (priv->part->name)
{
UNUSED(manufacturer); /* Eliminate warnings when debug is off */
@@ -364,7 +364,7 @@ static inline int ramtron_readid(struct ramtron_dev_s *priv)
priv->npages = priv->part->size / (1 << RAMTRON_EMULATE_PAGE_SHIFT);
return OK;
}
fvdbg("RAMTRON device not found\n");
return -ENODEV;
}
@@ -384,7 +384,7 @@ static void ramtron_waitwritecomplete(struct ramtron_dev_s *priv)
/* Send "Read Status Register (RDSR)" command */
(void)SPI_SEND(priv->dev, RAMTRON_RDSR);
/* Loop as long as the memory is busy with a write cycle */
do
@@ -414,7 +414,7 @@ static void ramtron_writeenable(struct ramtron_dev_s *priv)
/* Send "Write Enable (WREN)" command */
(void)SPI_SEND(priv->dev, RAMTRON_WREN);
/* Deselect the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
@@ -428,7 +428,7 @@ static void ramtron_writeenable(struct ramtron_dev_s *priv)
static inline void ramtron_sendaddr(const struct ramtron_dev_s *priv, uint32_t addr)
{
DEBUGASSERT(priv->part->addr_len == 3 || priv->part->addr_len == 2);
if (priv->part->addr_len == 3)
{
(void)SPI_SEND(priv->dev, (addr >> 16) & 0xff);
@@ -460,7 +460,7 @@ static inline void ramtron_pagewrite(struct ramtron_dev_s *priv, FAR const uint8
/* Enable the write access to the FLASH */
ramtron_writeenable(priv);
/* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
@@ -476,7 +476,7 @@ static inline void ramtron_pagewrite(struct ramtron_dev_s *priv, FAR const uint8
/* Then write the specified number of bytes */
SPI_SNDBLOCK(priv->dev, buffer, 1 << priv->pageshift);
/* Deselect the FLASH: Chip Select high */
SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
@@ -628,7 +628,7 @@ static int ramtron_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
fvdbg("BULDERASE: Makes no sense in ramtron. Let's confirm operation as OK\n");
ret = OK;
break;
case MTDIOC_XIPBASE:
default:
ret = -ENOTTY; /* Bad command */

6
drivers/mtd/sector512.c
View File

@@ -151,7 +151,7 @@ static FAR uint8_t *s512_cacheread(struct s512_dev_s *priv, off_t sector512)
off_t sector;
ssize_t result;
int index;
/* Get the erase block containing this sector */
eblockno = sector512 / priv->stdperblock;
@@ -487,7 +487,7 @@ static ssize_t s512_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
memcpy(buffer, src + sectoffset, xfrsize);
buffer += xfrsize;
}
fvdbg("return nbytes: %d\n", (int)nbytes);
return nbytes;
}
@@ -543,7 +543,7 @@ static int s512_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
}
}
break;
case MTDIOC_XIPBASE:
default:
ret = -ENOTTY; /* Bad command */

4
drivers/mtd/skeleton.c
View File

@@ -150,7 +150,7 @@ static ssize_t skel_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nb
*/
/* Read the specified blocks into the provided user buffer and return status
* (The positive, number of blocks actually read or a negated errno).
* (The positive, number of blocks actually read or a negated errno).
*/
return 0;
@@ -288,7 +288,7 @@ static int skel_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
ret = OK;
}
break;
default:
ret = -ENOTTY; /* Bad command */
break;

16
drivers/mtd/sst25.c
View File

@@ -406,7 +406,7 @@ static uint8_t sst25_waitwritecomplete(struct sst25_dev_s *priv)
/* Send "Read Status Register (RDSR)" command */
(void)SPI_SEND(priv->dev, SST25_RDSR);
/* Loop as long as the memory is busy with a write cycle */
do
@@ -647,7 +647,7 @@ static void sst25_bytewrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
/* Enable write access to the FLASH */
sst25_wren(priv);
/* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
@@ -665,7 +665,7 @@ static void sst25_bytewrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
/* Then write the single byte */
(void)SPI_SEND(priv->dev, *buffer);
/* Deselect the FLASH and setup for the next pass through the loop */
SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
@@ -713,7 +713,7 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
/* If there are no further non-erased bytes in the user buffer, then
* we are finished.
*/
if (nwords <= 0)
{
return;
@@ -727,7 +727,7 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
/* Enable write access to the FLASH */
sst25_wren(priv);
/* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
@@ -745,7 +745,7 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
/* Then write one 16-bit word */
SPI_SNDBLOCK(priv->dev, buffer, 2);
/* Deselect the FLASH: Chip Select high */
SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
@@ -848,7 +848,7 @@ static FAR uint8_t *sst25_cacheread(struct sst25_dev_s *priv, off_t sector)
off_t esectno;
int shift;
int index;
/* Convert from the 512 byte sector to the erase sector size of the device. For
* exmample, if the actual erase sector size if 4Kb (1 << 12), then we first
* shift to the right by 3 to get the sector number in 4096 increments.
@@ -1164,7 +1164,7 @@ static int sst25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
sst25_unlock(priv->dev);
}
break;
case MTDIOC_XIPBASE:
default:
ret = -ENOTTY; /* Bad command */

8
drivers/mtd/sst25xx.c
View File

@@ -11,7 +11,7 @@
*
* Copied from / based on m25px.c and sst25.c drivers written by
* Gregory Nutt <gnutt@nuttx.org>
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -65,8 +65,8 @@
************************************************************************************/
/* Configuration ********************************************************************/
/* Per the data sheet, SST25 parts can be driven with either SPI mode 0 (CPOL=0 and
* CPHA=0) or mode 3 (CPOL=1 and CPHA=1). So you may need to specify
* CONFIG_SST25XX_SPIMODE to select the best mode for your device. If
* CPHA=0) or mode 3 (CPOL=1 and CPHA=1). So you may need to specify
* CONFIG_SST25XX_SPIMODE to select the best mode for your device. If
* CONFIG_SST25XX_SPIMODE is not defined, mode 0 will be used.
*/
@@ -81,7 +81,7 @@
#endif
/* Various manufacturers may have produced the parts. 0xBF is the manufacturer ID
* for the SST serial FLASH.
* for the SST serial FLASH.
*/
#ifndef CONFIG_SST25XX_MANUFACTURER

38
drivers/mtd/sst39vf.c
View File

@@ -159,7 +159,7 @@ static const struct sst39vf_chip_s g_sst39vf1601 =
/* 32, nblocks */
512, /* nsectors */
/* 64*1024, blocksize */
4*1024, /* sectorsize */
4*1024, /* sectorsize */
};
static const struct sst39vf_chip_s g_sst39vf1602 =
@@ -169,7 +169,7 @@ static const struct sst39vf_chip_s g_sst39vf1602 =
/* 32, nblocks */
512, /* nsectors */
/* 64*1024, blocksize */
4*1024, /* sectorsize */
4*1024, /* sectorsize */
};
static const struct sst39vf_chip_s g_sst39vf3201 =
@@ -179,7 +179,7 @@ static const struct sst39vf_chip_s g_sst39vf3201 =
/* 64, nblocks */
1024, /* nsectors */
/* 64*1024, blocksize */
4*1024, /* sectorsize */
4*1024, /* sectorsize */
};
static const struct sst39vf_chip_s g_sst39vf3202 =
@@ -189,7 +189,7 @@ static const struct sst39vf_chip_s g_sst39vf3202 =
/* 64, nblocks */
1024, /* nsectors */
/* 64*1024, blocksize */
4*1024, /* sectorsize */
4*1024, /* sectorsize */
};
/* This structure holds the state of the MTD driver */
@@ -216,74 +216,74 @@ static const struct sst39vf_wrinfo_s g_wordprogram[3] =
{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x00a0} /* , {address, data} */
};
static const struct sst39vf_wrinfo_s g_sectorerase[5] =
static const struct sst39vf_wrinfo_s g_sectorerase[5] =
{
{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0080},
{0x5555, 0x00aa}, {0x2aaa, 0x0055} /* , {sector, 0x0030} */
};
#if 0 /* Not used */
static const struct sst39vf_wrinfo_s g_blockerase[5] =
static const struct sst39vf_wrinfo_s g_blockerase[5] =
{
{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x80},
{0x5555, 0x00aa}, {0x2aaa, 0x0055} /* , {block, 0x0050} */
};
#endif
static const struct sst39vf_wrinfo_s g_chiperase[6] =
static const struct sst39vf_wrinfo_s g_chiperase[6] =
{
{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0080},
{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0010}
};
#if 0 /* Not used */
static const struct sst39vf_wrinfo_s g_erasesuspend[1] =
static const struct sst39vf_wrinfo_s g_erasesuspend[1] =
{
{0x5555, 0x00aa}
};
static const struct sst39vf_wrinfo_s g_eraseresume[1] =
static const struct sst39vf_wrinfo_s g_eraseresume[1] =
{
{0x5555, 0x00aa}
};
static const struct sst39vf_wrinfo_s g_querysecid[3] =
static const struct sst39vf_wrinfo_s g_querysecid[3] =
{
{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0088}
};
static const struct sst39vf_wrinfo_s g_securityid_wordprogram[3] =
static const struct sst39vf_wrinfo_s g_securityid_wordprogram[3] =
{
{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x00a5}, /* {address, data} */
};
static const struct sst39vf_wrinfo_s g_securityid_lockout[3] =
static const struct sst39vf_wrinfo_s g_securityid_lockout[3] =
{
{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0085} /* {0xXX, 0x0000} */
};
#endif
static const struct sst39vf_wrinfo_s g_swid_entry[3] =
static const struct sst39vf_wrinfo_s g_swid_entry[3] =
{
{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0090}
};
#if 0 /* Not used */
static const struct sst39vf_wrinfo_s g_cfiquery[3] =
static const struct sst39vf_wrinfo_s g_cfiquery[3] =
{
{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0080},
};
#endif
static const struct sst39vf_wrinfo_s g_swid_exit[3] =
static const struct sst39vf_wrinfo_s g_swid_exit[3] =
{
{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x00f0}
};
#if 0 /* Not used */
static const struct sst39vf_wrinfo_s g_swid_exit2[1] =
static const struct sst39vf_wrinfo_s g_swid_exit2[1] =
{
{0x0000, 0x00f0},
{0x0000, 0x00f0},
};
#endif
@@ -548,7 +548,7 @@ static int sst39vf_sectorerase(FAR struct sst39vf_dev_s *priv,
* Write one 16-bit word to FLASH
*
* "The SST39VF160x/320x are programmed on a word-by-word basis. Before
* programming, the sector where the word exists must be fully erased. The
* programming, the sector where the word exists must be fully erased. The
* rogram operation is accomplished in three steps. The first step is the
* three-byte load sequence for Software Data Protection. The second step
* is to load word address and word data. During the Word-Program operation,
@@ -765,7 +765,7 @@ static int sst39vf_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
return sst39vf_chiperase(priv);
}
break;
default:
ret = -ENOTTY; /* Bad command */
break;

10
drivers/mtd/w25.c
View File

@@ -464,7 +464,7 @@ static uint8_t w25_waitwritecomplete(struct w25_dev_s *priv)
/* Send "Read Status Register (RDSR)" command */
(void)SPI_SEND(priv->spi, W25_RDSR);
/* Loop as long as the memory is busy with a write cycle */
do
@@ -534,7 +534,7 @@ static inline void w25_wren(struct w25_dev_s *priv)
/* Send "Write Enable (WREN)" command */
(void)SPI_SEND(priv->spi, W25_WREN);
/* Deselect the FLASH */
SPI_SELECT(priv->spi, SPIDEV_FLASH, false);
@@ -553,7 +553,7 @@ static inline void w25_wrdi(struct w25_dev_s *priv)
/* Send "Write Disable (WRDI)" command */
(void)SPI_SEND(priv->spi, W25_WRDI);
/* Deselect the FLASH */
SPI_SELECT(priv->spi, SPIDEV_FLASH, false);
@@ -778,7 +778,7 @@ static FAR uint8_t *w25_cacheread(struct w25_dev_s *priv, off_t sector)
off_t esectno;
int shift;
int index;
/* Convert from the 512 byte sector to the erase sector size of the device. For
* exmample, if the actual erase sector size if 4Kb (1 << 12), then we first
* shift to the right by 3 to get the sector number in 4096 increments.
@@ -1082,7 +1082,7 @@ static int w25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
w25_unlock(priv->spi);
}
break;
case MTDIOC_XIPBASE:
default:
ret = -ENOTTY; /* Bad command */

16
drivers/net/cs89x0.c
View File

@@ -414,9 +414,9 @@ static void cs89x0_receive(struct cs89x0_driver_s *cs89x0, uint16_t isq)
cd89x0->cs_stats.rx_errors++;
cd89x0->cs_stats.rx_lengtherrors++;
#endif
return;
return;
}
/* Copy the data data from the hardware to cs89x0->cs_dev.d_buf. Set
* amount of data in cs89x0->cs_dev.d_len
*/
@@ -425,7 +425,7 @@ static void cs89x0_receive(struct cs89x0_driver_s *cs89x0, uint16_t isq)
for (nbytes = 0; nbytes < rxlength; nbytes += sizeof(uint16_t))
{
*dest++ = cs89x0_getreg(PPR_RXFRAMELOCATION);
}
}
#ifdef CONFIG_C89x0_STATISTICS
cd89x0->cs_stats.rx_packets++;
@@ -576,7 +576,7 @@ static int cs89x0_interrupt(int irq, FAR void *context)
{
register struct cs89x0_driver_s *cs89x0 = s89x0_mapirq(irq);
uint16_t isq;
#ifdef CONFIG_DEBUG
if (!cs89x0)
{
@@ -704,7 +704,7 @@ static void cs89x0_polltimer(int argc, uint32_t arg, ...)
*
* Description:
* NuttX Callback: Bring up the Ethernet interface when an IP address is
* provided
* provided
*
* Parameters:
* dev - Reference to the NuttX driver state structure
@@ -780,7 +780,7 @@ static int cs89x0_ifdown(struct uip_driver_s *dev)
* Function: cs89x0_txavail
*
* Description:
* Driver callback invoked when new TX data is available. This is a
* Driver callback invoked when new TX data is available. This is a
* stimulus perform an out-of-cycle poll and, thereby, reduce the TX
* latency.
*
@@ -827,7 +827,7 @@ static int cs89x0_txavail(struct uip_driver_s *dev)
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be added
* mac - The MAC address to be added
*
* Returned Value:
* None
@@ -857,7 +857,7 @@ static int cs89x0_addmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be removed
* mac - The MAC address to be removed
*
* Returned Value:
* None

34
drivers/net/dm90x0.c
View File

@@ -930,19 +930,19 @@ static void dm9x_receive(struct dm9x_driver_s *dm9x)
/* Bad RX packet... update statistics */
#if defined(CONFIG_DM9X_STATS)
if (rx.desc.rx_status & 0x01)
if (rx.desc.rx_status & 0x01)
{
dm9x->dm_nrxfifoerrors++;
ndbg("RX FIFO error: %d\n", dm9x->dm_nrxfifoerrors);
}
if (rx.desc.rx_status & 0x02)
if (rx.desc.rx_status & 0x02)
{
dm9x->dm_nrxcrcerrors++;
ndbg("RX CRC error: %d\n", dm9x->dm_nrxcrcerrors);
}
if (rx.desc.rx_status & 0x80)
if (rx.desc.rx_status & 0x80)
{
dm9x->dm_nrxlengtherrors++;
ndbg("RX length error: %d\n", dm9x->dm_nrxlengtherrors);
@@ -1123,7 +1123,7 @@ static int dm9x_interrupt(int irq, FAR void *context)
/* Disable all DM90x0 interrupts */
putreg(DM9X_IMR, DM9X_IMRDISABLE);
putreg(DM9X_IMR, DM9X_IMRDISABLE);
/* Get and clear the DM90x0 interrupt status bits */
@@ -1163,7 +1163,7 @@ static int dm9x_interrupt(int irq, FAR void *context)
}
up_mdelay(1);
}
ndbg("delay: %dmS speed: %s\n", i, dm9x->dm_b100M ? "100M" : "10M");
ndbg("delay: %dmS speed: %s\n", i, dm9x->dm_b100M ? "100M" : "10M");
}
/* Check if we received an incoming packet */
@@ -1180,7 +1180,7 @@ static int dm9x_interrupt(int irq, FAR void *context)
dm9x_txdone(dm9x);
}
/* If the number of consecutive receive packets exceeds a threshold,
/* If the number of consecutive receive packets exceeds a threshold,
* then disable the RX interrupt.
*/
@@ -1234,9 +1234,9 @@ static void dm9x_txtimeout(int argc, uint32_t arg, ...)
dm9x->dm_ntxerrors++;
#endif
ndbg(" TX packet count: %d\n", dm9x->dm_ntxpending);
ndbg(" TX packet count: %d\n", dm9x->dm_ntxpending);
#if defined(CONFIG_DM9X_STATS)
ndbg(" TX timeouts: %d\n", dm9x->dm_ntxtimeouts);
ndbg(" TX timeouts: %d\n", dm9x->dm_ntxtimeouts);
#endif
ndbg(" TX read pointer address: 0x%02x:%02x\n",
getreg(DM9X_TRPAH), getreg(DM9X_TRPAL));
@@ -1324,16 +1324,16 @@ static inline void dm9x_phymode(struct dm9x_driver_s *dm9x)
phyreg0 = 0x1200; /* Auto-negotiation & Restart Auto-negotiation */
phyreg4 = 0x01e1; /* Default flow control disable*/
#elif CONFIG_DM9X_MODE_10MHD
phyreg4 = 0x21;
phyreg4 = 0x21;
phyreg0 = 0x1000;
#elif CONFIG_DM9X_MODE_10MFD
phyreg4 = 0x41;
phyreg4 = 0x41;
phyreg0 = 0x1100;
#elif CONFIG_DM9X_MODE_100MHD
phyreg4 = 0x81;
phyreg4 = 0x81;
phyreg0 = 0x3000;
#elif CONFIG_DM9X_MODE_100MFD
phyreg4 = 0x101;
phyreg4 = 0x101;
phyreg0 = 0x3100;
#else
# error "Recognized PHY mode"
@@ -1348,7 +1348,7 @@ static inline void dm9x_phymode(struct dm9x_driver_s *dm9x)
*
* Description:
* NuttX Callback: Bring up the DM90x0 interface when an IP address is
* provided
* provided
*
* Parameters:
* dev - Reference to the NuttX driver state structure
@@ -1396,7 +1396,7 @@ static int dm9x_ifup(struct uip_driver_s *dev)
up_mdelay(1);
}
ndbg("delay: %dmS speed: %s\n", i, dm9x->dm_b100M ? "100M" : "10M");
ndbg("delay: %dmS speed: %s\n", i, dm9x->dm_b100M ? "100M" : "10M");
/* Set and activate a timer process */
@@ -1463,7 +1463,7 @@ static int dm9x_ifdown(struct uip_driver_s *dev)
* Function: dm9x_txavail
*
* Description:
* Driver callback invoked when new TX data is available. This is a
* Driver callback invoked when new TX data is available. This is a
* stimulus perform an out-of-cycle poll and, thereby, reduce the TX
* latency.
*
@@ -1515,7 +1515,7 @@ static int dm9x_txavail(struct uip_driver_s *dev)
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be added
* mac - The MAC address to be added
*
* Returned Value:
* None
@@ -1545,7 +1545,7 @@ static int dm9x_addmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be removed
* mac - The MAC address to be removed
*
* Returned Value:
* None

2
drivers/net/enc28j60.h
View File

@@ -402,7 +402,7 @@
/* Bit 0: Reserved */
#define PHLCON_STRCH (1 << 1) /* Bit 1: LED Pulse Stretching Enable */
#define PHLCON_LFRQ0 (1 << 2) /* Bit 2: LED Pulse Stretch Time Configuration */
#define PHLCON_LFRQ1 (1 << 3) /* Bit 3: " " " " " " " " " */
#define PHLCON_LFRQ1 (1 << 3) /* Bit 3: " " " " " " " " " */
#define PHLCON_LBCFG0 (1 << 4) /* Bit 4: LEDB Configuration */
#define PHLCON_LBCFG1 (1 << 5) /* Bit 5: " " " " */
#define PHLCON_LBCFG2 (1 << 6) /* Bit 6: " " " " */

8
drivers/net/skeleton.c
View File

@@ -440,7 +440,7 @@ static void skel_polltimer(int argc, uint32_t arg, ...)
*
* Description:
* NuttX Callback: Bring up the Ethernet interface when an IP address is
* provided
* provided
*
* Parameters:
* dev - Reference to the NuttX driver state structure
@@ -520,7 +520,7 @@ static int skel_ifdown(struct uip_driver_s *dev)
* Function: skel_txavail
*
* Description:
* Driver callback invoked when new TX data is available. This is a
* Driver callback invoked when new TX data is available. This is a
* stimulus perform an out-of-cycle poll and, thereby, reduce the TX
* latency.
*
@@ -570,7 +570,7 @@ static int skel_txavail(struct uip_driver_s *dev)
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be added
* mac - The MAC address to be added
*
* Returned Value:
* None
@@ -599,7 +599,7 @@ static int skel_addmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be removed
* mac - The MAC address to be removed
*
* Returned Value:
* None

14
drivers/net/slip.c
View File

@@ -327,7 +327,7 @@ static int slip_transmit(FAR struct slip_driver_s *priv)
remaining = priv->dev.d_len;
start = src;
len = 0;
while (remaining-- > 0)
{
switch (*src)
@@ -559,7 +559,7 @@ static inline void slip_receive(FAR struct slip_driver_s *priv)
ch = slip_getc(priv);
/* Handle bytestuffing if necessary */
switch (ch)
{
/* If it's an END character then we're done with the packet.
@@ -727,7 +727,7 @@ static int slip_rxtask(int argc, char *argv[])
if (priv->dev.d_len > 0)
{
slip_transmit(priv);
slip_transmit(priv);
}
uip_unlock(flags);
slip_semgive(priv);
@@ -748,7 +748,7 @@ static int slip_rxtask(int argc, char *argv[])
*
* Description:
* NuttX Callback: Bring up the Ethernet interface when an IP address is
* provided
* provided
*
* Parameters:
* dev - Reference to the NuttX driver state structure
@@ -804,7 +804,7 @@ static int slip_ifdown(struct uip_driver_s *dev)
* Function: slip_txavail
*
* Description:
* Driver callback invoked when new TX data is available. This is a
* Driver callback invoked when new TX data is available. This is a
* stimulus perform an out-of-cycle poll and, thereby, reduce the TX
* latency.
*
@@ -841,7 +841,7 @@ static int slip_txavail(struct uip_driver_s *dev)
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be added
* mac - The MAC address to be added
*
* Returned Value:
* None
@@ -870,7 +870,7 @@ static int slip_addmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be removed
* mac - The MAC address to be removed
*
* Returned Value:
* None

12
drivers/net/vnet.c
View File

@@ -181,8 +181,8 @@ static int vnet_transmit(FAR struct vnet_driver_s *vnet)
/* Setup the TX timeout watchdog (perhaps restarting the timer) */
//(void)wd_start(vnet->sk_txtimeout, VNET_TXTIMEOUT, vnet_txtimeout, 1, (uint32_t)vnet);
// When vnet_xmit fail, it means TX buffer is full. Watchdog
// is of no use here because no TX done INT will happen. So
// When vnet_xmit fail, it means TX buffer is full. Watchdog
// is of no use here because no TX done INT will happen. So
// we reset the TX buffer directly.
#ifdef CONFIG_DEBUG
cprintf("VNET: TX buffer is full\n");
@@ -429,7 +429,7 @@ static void vnet_polltimer(int argc, uint32_t arg, ...)
*
* Description:
* NuttX Callback: Bring up the Ethernet interface when an IP address is
* provided
* provided
*
* Parameters:
* dev - Reference to the NuttX driver state structure
@@ -505,7 +505,7 @@ static int vnet_ifdown(struct uip_driver_s *dev)
* Function: vnet_txavail
*
* Description:
* Driver callback invoked when new TX data is available. This is a
* Driver callback invoked when new TX data is available. This is a
* stimulus perform an out-of-cycle poll and, thereby, reduce the TX
* latency.
*
@@ -562,7 +562,7 @@ out:
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be added
* mac - The MAC address to be added
*
* Returned Value:
* None
@@ -591,7 +591,7 @@ static int vnet_addmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be removed
* mac - The MAC address to be removed
*
* Returned Value:
* None

4
drivers/pipes/fifo.c
View File

@@ -93,7 +93,7 @@ static const struct file_operations fifo_fops =
* Description:
* mkfifo() makes a FIFO device driver file with name 'pathname.' Unlike
* Linux, a NuttX FIFO is not a special file type but simply a device driver
* instance. 'mode' specifies the FIFO's permissions.
* instance. 'mode' specifies the FIFO's permissions.
*
* Once the FIFO has been created by mkfifo(), any thread can open it for
* reading or writing, in the same way as an ordinary file. However, it must
@@ -120,7 +120,7 @@ int mkfifo(FAR const char *pathname, mode_t mode)
{
struct pipe_dev_s *dev;
int ret;
/* Allocate and initialize a new device structure instance */
dev = pipecommon_allocdev();

8
drivers/pipes/pipe_common.c
View File

@@ -187,7 +187,7 @@ int pipecommon_open(FAR struct file *filep)
struct pipe_dev_s *dev = inode->i_private;
int sval;
int ret;
/* Some sanity checking */
#if CONFIG_DEBUG
if (!dev)
@@ -337,7 +337,7 @@ int pipecommon_close(FAR struct file *filep)
dev->d_buffer = NULL;
/* And reset all counts and indices */
dev->d_wrndx = 0;
dev->d_rdndx = 0;
dev->d_refs = 0;
@@ -405,7 +405,7 @@ ssize_t pipecommon_read(FAR struct file *filep, FAR char *buffer, size_t len)
ret = sem_wait(&dev->d_rdsem);
sched_unlock();
if (ret < 0 || sem_wait(&dev->d_bfsem) < 0)
if (ret < 0 || sem_wait(&dev->d_bfsem) < 0)
{
return ERROR;
}
@@ -419,7 +419,7 @@ ssize_t pipecommon_read(FAR struct file *filep, FAR char *buffer, size_t len)
*buffer++ = dev->d_buffer[dev->d_rdndx];
if (++dev->d_rdndx >= CONFIG_DEV_PIPE_SIZE)
{
dev->d_rdndx = 0;
dev->d_rdndx = 0;
}
nread++;
}

2
drivers/pipes/pipe_common.h
View File

@@ -72,7 +72,7 @@
****************************************************************************/
/* Make the buffer index as small as possible for the configured pipe size */
#if CONFIG_DEV_PIPE_SIZE > 65535
typedef uint32_t pipe_ndx_t; /* 32-bit index */
#elif CONFIG_DEV_PIPE_SIZE > 255

2
drivers/power/max1704x.c
View File

@@ -107,7 +107,7 @@
# define MAX1407X_VCELL(v) MAX14071_VCELL(v)
#endif
/* "SOC Register. The SOC register is a read-only register that displays the
/* "SOC Register. The SOC register is a read-only register that displays the
* state of charge of the cell as calculated by the ModelGauge algorithm. The
* result is displayed as a percentage of the cell’s full capacity...
*

2
drivers/power/pm_internal.h
View File

@@ -67,7 +67,7 @@
* slice ticks = (CONFIG_PM_SLICEMS msec / 1000 msec/sec) /
* (CLOCKS_PER_SEC ticks/sec)
*/
#define TIME_SLICE_TICKS ((CONFIG_PM_SLICEMS * CLOCKS_PER_SEC) / 1000)
/* Function-like macros *****************************************************/

2
drivers/power/pm_update.c
View File

@@ -92,7 +92,7 @@ static const int16_t g_pmcoeffs[CONFIG_PM_MEMORY-1] =
/* Threshold activity values to enter into the next lower power consumption
* state. Indexing is next state 0:IDLE, 1:STANDBY, 2:SLEEP.
*/
static const int16_t g_pmenterthresh[3] =
{
CONFIG_PM_IDLEENTER_THRESH,

10
drivers/pwm.c
View File

@@ -200,7 +200,7 @@ static int pwm_open(FAR struct file *filep)
errout_with_sem:
sem_post(&upper->exclsem);
errout:
return ret;
}
@@ -257,7 +257,7 @@ static int pwm_close(FAR struct file *filep)
//errout_with_sem:
sem_post(&upper->exclsem);
errout:
return ret;
}
@@ -295,7 +295,7 @@ static ssize_t pwm_write(FAR struct file *filep, FAR const char *buffer, size_t
*
* Description:
* Handle the PWMIOC_START ioctl command
*
*
************************************************************************************/
#ifdef CONFIG_PWM_PULSECOUNT
@@ -402,7 +402,7 @@ static int pwm_start(FAR struct pwm_upperhalf_s *upper, unsigned int oflags)
*
* Description:
* The standard ioctl method. This is where ALL of the PWM work is done.
*
*
************************************************************************************/
static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
@@ -666,7 +666,7 @@ void pwm_expired(FAR void *handle)
upper->waiting = false;
sem_post(&upper->waitsem);
}
/* The PWM is now stopped */
upper->started = false;

2
drivers/ramdisk.c
View File

@@ -241,7 +241,7 @@ static int rd_geometry(FAR struct inode *inode, struct geometry *geometry)
geometry->geo_writeenabled ? "true" : "false");
fvdbg("nsectors: %d sectorsize: %d\n",
geometry->geo_nsectors, geometry->geo_sectorsize);
return OK;
}

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