diff --git a/arch/arm/src/lpc17xx/chip/lpc17_uart.h b/arch/arm/src/lpc17xx/chip/lpc17_uart.h index d7706561cd8..478c18b70a2 100644 --- a/arch/arm/src/lpc17xx/chip/lpc17_uart.h +++ b/arch/arm/src/lpc17xx/chip/lpc17_uart.h @@ -342,7 +342,7 @@ #define UART_FDR_DIVADDVAL_SHIFT (0) /* Bits 0-3: Baud-rate generation pre-scaler divisor value */ #define UART_FDR_DIVADDVAL_MASK (15 << UART_FDR_DIVADDVAL_SHIFT) -#define UART_FDR_MULVAL_SHIFT (3) /* Bits 4-7 Baud-rate pre-scaler multiplier value */ +#define UART_FDR_MULVAL_SHIFT (4) /* Bits 4-7 Baud-rate pre-scaler multiplier value */ #define UART_FDR_MULVAL_MASK (15 << UART_FDR_MULVAL_SHIFT) /* Bits 8-31: Reserved */ /* TER Transmit Enable Register (all) */ diff --git a/arch/arm/src/lpc17xx/lpc17_lowputc.c b/arch/arm/src/lpc17xx/lpc17_lowputc.c index 36700145880..8f163f34403 100644 --- a/arch/arm/src/lpc17xx/lpc17_lowputc.c +++ b/arch/arm/src/lpc17xx/lpc17_lowputc.c @@ -389,6 +389,13 @@ void lpc17_lowsetup(void) putreg32(UART_FCR_FIFOEN | UART_FCR_RXTRIGGER_8, CONSOLE_BASE + LPC17_UART_FCR_OFFSET); + /* Disable FDR (fractional divider), + * ignored by baudrate calculation => has to be disabled + */ + + putreg32((1 << UART_FDR_MULVAL_SHIFT) + (0 << UART_FDR_DIVADDVAL_SHIFT), + CONSOLE_BASE + LPC17_UART_FDR_OFFSET); + /* Set up the LCR and set DLAB=1 */ putreg32(CONSOLE_LCR_VALUE | UART_LCR_DLAB, diff --git a/arch/arm/src/lpc17xx/lpc17_serial.c b/arch/arm/src/lpc17xx/lpc17_serial.c index 10fd17865ca..c321e23eb2f 100644 --- a/arch/arm/src/lpc17xx/lpc17_serial.c +++ b/arch/arm/src/lpc17xx/lpc17_serial.c @@ -920,8 +920,8 @@ static int up_setup(struct uart_dev_s *dev) lcr |= (UART_LCR_PE | UART_LCR_PS_EVEN); } - /* Disable FDR (fractional divider, not used by baudrate settings -> has - * to be disabled) + /* Disable FDR (fractional divider), + * ignored by baudrate calculation => has to be disabled */ up_serialout(priv, LPC17_UART_FDR_OFFSET,