From 39877047bb484d673ac56cce77fa5214df0aa939 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 2 May 2015 06:30:19 -0600 Subject: [PATCH] LPC17 GPIO: Reorder steps when an output GPIO is configured in order to avoid transient bad values from being output. From Hal Glenn. --- arch/arm/src/lpc17xx/lpc176x_gpio.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/arm/src/lpc17xx/lpc176x_gpio.c b/arch/arm/src/lpc17xx/lpc176x_gpio.c index 545b146449b..f3231691d6b 100644 --- a/arch/arm/src/lpc17xx/lpc176x_gpio.c +++ b/arch/arm/src/lpc17xx/lpc176x_gpio.c @@ -479,13 +479,6 @@ static inline int lpc17_configoutput(lpc17_pinset_t cfgset, unsigned int port, (void)lpc17_configinput(DEFAULT_INPUT, port, pin); - /* Now, reconfigure the pin as an output */ - - fiobase = g_fiobase[port]; - regval = getreg32(fiobase + LPC17_FIO_DIR_OFFSET); - regval |= (1 << pin); - putreg32(regval, fiobase + LPC17_FIO_DIR_OFFSET); - /* Check for open drain output */ if ((cfgset & GPIO_OPEN_DRAIN) != 0) @@ -505,6 +498,14 @@ static inline int lpc17_configoutput(lpc17_pinset_t cfgset, unsigned int port, lpc17_gpiowrite(cfgset, ((cfgset & GPIO_VALUE) != GPIO_VALUE_ZERO)); + /* Now, reconfigure the pin as an output */ + + fiobase = g_fiobase[port]; + regval = getreg32(fiobase + LPC17_FIO_DIR_OFFSET); + regval |= (1 << pin); + putreg32(regval, fiobase + LPC17_FIO_DIR_OFFSET); + + return OK; }