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SAMA5: Framework for a TWI driver (incomplete)

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This commit is contained in:
Gregory Nutt
2013-09-11 12:28:52 -06:00
parent e49069b92b
commit 382a066eae
9 changed files with 873 additions and 11 deletions
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ChangeLog
+2
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@@ -5532,4 +5532,6 @@
decremented. The end result is a memory leak (2013-9-10).
* arch/arm/src/sama5/chip/sam_twi.h: Added SAMA5 TWI register
definition file (2013-9-11).
* arch/arm/src/sama5/sam_twi.c and .h: Framework for a SAMA5
TWI driver (not much present in initial checkin) (2013-9-11).
arch/arm/src/sam34/chip/sam_twi.h
+2 -2
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@@ -117,13 +117,13 @@
#define TWI_CR_QUICK (1 << 6) /* Bit 6: SMBUS Quick Command */
#define TWI_CR_SWRST (1 << 7) /* Bit 7: Software Reset */
/* TWI Master Mode Register */'
/* TWI Master Mode Register */
#define TWI_MMR_IADRSZ_SHIFT (8) /* Bits 8-9: Internal Device Address Size */
#define TWI_MMR_IADRSZ_MASK (3 << TWI_MMR_IADRSZ_SHIFT)
# define TWI_MMR_IADRSZ_NONE (0 << TWI_MMR_IADRSZ_SHIFT) /* No internal device address */
# define TWI_MMR_IADRSZ_1BYTE (1 << TWI_MMR_IADRSZ_SHIFT) /* One-byte internal device address */
# define TWI_MMR_IADRSZ_3BYTE (2 << TWI_MMR_IADRSZ_SHIFT) /* Two-byte internal device address */
# define TWI_MMR_IADRSZ_2BYTE (2 << TWI_MMR_IADRSZ_SHIFT) /* Two-byte internal device address */
# define TWI_MMR_IADRSZ_3BYTE (3 << TWI_MMR_IADRSZ_SHIFT) /* Three-byte internal device address */
#define TWI_MMR_MREAD (1 << 12) /* Bit 12: Master Read Direction */
#define TWI_MMR_DADR_SHIFT (16) /* Bits 16-22: Device Address */
arch/arm/src/sama5/Kconfig
+30
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@@ -281,6 +281,36 @@ config SAMA5_SPI_REGDEBUG
endmenu # SPI device driver options
endif # SAMA5_SPI0 || SAMA5_SPI1
if SAMA5_TWI0 || SAMA5_TWI1 || SAMA5_TWI2
menu "TWI device driver options"
config SAMA5_TWI0_FREQUENCY
int "TWI0 Frequency"
default 100000
depends on SAMA5_TWI0
config SAMA5_TWI1_FREQUENCY
int "TWI1 Frequency"
default 100000
depends on SAMA5_TWI1
config SAMA5_TWI2_FREQUENCY
int "TWI2 Frequency"
default 100000
depends on SAMA5_TWI2
config SAMA5_TWI_REGDEBUG
bool "TWI register level debug"
depends on DEBUG
default n
---help---
Output detailed register-level TWI device debug information.
Very invasive! Requires also DEBUG.
endmenu # TWI device driver options
endif # SAMA5_TWI0 || SAMA5_TWI1 || SAMA5_TWI2
if SAMA5_HSMCI0 || SAMA5_HSMCI1 || SAMA5_HSMCI2
menu "HSMCI device driver options"
arch/arm/src/sama5/Make.defs
+12
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@@ -140,6 +140,18 @@ endif
endif
endif
ifeq ($(CONFIG_SAMA5_TWI0),y)
CHIP_CSRCS += sam_twi.c
else
ifeq ($(CONFIG_SAMA5_TWI1),y)
CHIP_CSRCS += sam_twi.c
else
ifeq ($(CONFIG_SAMA5_TWI2),y)
CHIP_CSRCS += sam_twi.c
endif
endif
endif
ifeq ($(CONFIG_USBHOST_TRACE),y)
CHIP_CSRCS += sam_usbhost.c
else
arch/arm/src/sama5/chip/sam_twi.h
+2 -2
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@@ -126,13 +126,13 @@
#define TWI_CR_QUICK (1 << 6) /* Bit 6: SMBUS Quick Command */
#define TWI_CR_SWRST (1 << 7) /* Bit 7: Software Reset */
/* TWI Master Mode Register */'
/* TWI Master Mode Register */
#define TWI_MMR_IADRSZ_SHIFT (8) /* Bits 8-9: Internal Device Address Size */
#define TWI_MMR_IADRSZ_MASK (3 << TWI_MMR_IADRSZ_SHIFT)
# define TWI_MMR_IADRSZ_NONE (0 << TWI_MMR_IADRSZ_SHIFT) /* No internal device address */
# define TWI_MMR_IADRSZ_1BYTE (1 << TWI_MMR_IADRSZ_SHIFT) /* One-byte internal device address */
# define TWI_MMR_IADRSZ_3BYTE (2 << TWI_MMR_IADRSZ_SHIFT) /* Two-byte internal device address */
# define TWI_MMR_IADRSZ_2BYTE (2 << TWI_MMR_IADRSZ_SHIFT) /* Two-byte internal device address */
# define TWI_MMR_IADRSZ_3BYTE (3 << TWI_MMR_IADRSZ_SHIFT) /* Three-byte internal device address */
#define TWI_MMR_MREAD (1 << 12) /* Bit 12: Master Read Direction */
#define TWI_MMR_DADR_SHIFT (16) /* Bits 16-22: Device Address */
arch/arm/src/sama5/sam_twi.c
+755
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File diff suppressed because it is too large Load Diff
arch/arm/src/sama5/sam_twi.h
+63
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@@ -0,0 +1,63 @@
/************************************************************************************
* arch/arm/src/sama5/sam_twi.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMA5_SAM_TWI_H
#define __ARCH_ARM_SRC_SAMA5_SAM_TWI_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/i2c.h>
#include "chip/sam_twi.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMA5_SAM_TWI_H */