diff --git a/arch/arm/src/max326xx/Kconfig b/arch/arm/src/max326xx/Kconfig index 157f67a5774..23fa2768590 100644 --- a/arch/arm/src/max326xx/Kconfig +++ b/arch/arm/src/max326xx/Kconfig @@ -55,10 +55,10 @@ config ARCH_FAMILY_MAX32620 select MAX326XX_HAVE_CRC select MAX326XX_HAVE_AES select MAX326XX_HAVE_USB20 - select MAX326XX_HAVE_TIMER32_2 - select MAX326XX_HAVE_TIMER32_3 - select MAX326XX_HAVE_TIMER32_4 - select MAX326XX_HAVE_TIMER32_5 + select MAX326XX_HAVE_TMR32_2 + select MAX326XX_HAVE_TMR32_3 + select MAX326XX_HAVE_TMR32_4 + select MAX326XX_HAVE_TMR32_5 select MAX326XX_HAVE_PTENGINE select MAX326XX_HAVE_SPIM2 select MAX326XX_HAVE_SPIS1 @@ -80,10 +80,10 @@ config ARCH_FAMILY_MAX32630 select MAX326XX_HAVE_CRC select MAX326XX_HAVE_AES select MAX326XX_HAVE_USB20 - select MAX326XX_HAVE_TIMER32_2 - select MAX326XX_HAVE_TIMER32_3 - select MAX326XX_HAVE_TIMER32_4 - select MAX326XX_HAVE_TIMER32_5 + select MAX326XX_HAVE_TMR32_2 + select MAX326XX_HAVE_TMR32_3 + select MAX326XX_HAVE_TMR32_4 + select MAX326XX_HAVE_TMR32_5 select MAX326XX_HAVE_PTENGINE select MAX326XX_HAVE_SPIM2 select MAX326XX_HAVE_SPIXIP @@ -101,7 +101,7 @@ config ARCH_FAMILY_MAX32660 select MAX326XX_HAVE_I2CS1 select MAX326XX_HAVE_SPIS1 select MAX326XX_HAVE_WDOG - select MAX326XX_HAVE_TIMER8 + select MAX326XX_HAVE_TMR8 # Chip-Specific Peripheral support @@ -141,23 +141,23 @@ config MAX326XX_HAVE_USB20 bool default n -config MAX326XX_HAVE_TIMER32_2 +config MAX326XX_HAVE_TMR32_2 bool default n -config MAX326XX_HAVE_TIMER32_3 +config MAX326XX_HAVE_TMR32_3 bool default n -config MAX326XX_HAVE_TIMER32_4 +config MAX326XX_HAVE_TMR32_4 bool default n -config MAX326XX_HAVE_TIMER32_5 +config MAX326XX_HAVE_TMR32_5 bool default n -config MAX326XX_HAVE_TIMER8 +config MAX326XX_HAVE_TMR8 bool default n @@ -264,38 +264,38 @@ config MAX326XX_USB20 default n depends on MAX326XX_HAVE_USB20 -config MAX326XX_TIMER32_0 +config MAX326XX_TMR32_0 bool "32-Bit Timer 0" default n -config MAX326XX_TIMER32_1 +config MAX326XX_TMR32_1 bool "32-Bit Timer 1" default n -config MAX326XX_TIMER32_2 +config MAX326XX_TMR32_2 bool "32-Bit Timer 2" default n - depends on MAX326XX_HAVE_TIMER32_2 + depends on MAX326XX_HAVE_TMR32_2 -config MAX326XX_TIMER32_3 +config MAX326XX_TMR32_3 bool "32-Bit Timer 3" default n - depends on MAX326XX_HAVE_TIMER32_3 + depends on MAX326XX_HAVE_TMR32_3 -config MAX326XX_TIMER32_4 +config MAX326XX_TMR32_4 bool "32-Bit Timer 4" default n - depends on MAX326XX_HAVE_TIMER32_4 + depends on MAX326XX_HAVE_TMR32_4 -config MAX326XX_TIMER32_5 +config MAX326XX_TMR32_5 bool "32-Bit Timer 5" default n - depends on MAX326XX_HAVE_TIMER32_5 + depends on MAX326XX_HAVE_TMR32_5 -config MAX326XX_TIMER8 +config MAX326XX_TMR8 bool "8-Bit Timer" default n - depends on MAX326XX_HAVE_TIMER8 + depends on MAX326XX_HAVE_TMR8 config MAX326XX_PTENGINE bool "Pulse Train Engine" diff --git a/arch/arm/src/max326xx/common/max326_start.c b/arch/arm/src/max326xx/common/max326_start.c index 1369f958d50..84de7d94b5b 100644 --- a/arch/arm/src/max326xx/common/max326_start.c +++ b/arch/arm/src/max326xx/common/max326_start.c @@ -222,6 +222,7 @@ void __start(void) /* Clear .bss. We'll do this inline (vs. calling memset) just to be * certain that there are no issues with the state of global variables. + * REVISIT: Consider using MAX326xx SRAM Zeroize hardware. */ for (dest = &_sbss; dest < &_ebss; ) diff --git a/arch/arm/src/max326xx/max32660/max32660_clockconfig.c b/arch/arm/src/max326xx/max32660/max32660_clockconfig.c index a2b8123791a..d3bd0613898 100644 --- a/arch/arm/src/max326xx/max32660/max32660_clockconfig.c +++ b/arch/arm/src/max326xx/max32660/max32660_clockconfig.c @@ -48,6 +48,7 @@ #include "hardware/max326_gcr.h" #include "hardware/max326_pwrseq.h" #include "hardware/max326_flc.h" +#include "max326_periphclks.h" #include "max326_clockconfig.h" #include @@ -589,6 +590,39 @@ void max326_clockconfig(FAR const struct clock_setup_s *clksetup) /* Perform a peripheral reset */ max326_periph_reset(); + + /* Disable most clocks to peripherals by default to reduce power */ + +#ifndef CONFIG_MAX326XX_DMA + max326_dma_disableclk(); +#endif +#if !defined(CONFIG_MAX326XX_SPIM0) && !defined(CONFIG_MAX326XX_SPIS0) + max326_spi0_disableclk(); +#endif +#if !defined(CONFIG_MAX326XX_SPIM1) && !defined(CONFIG_MAX326XX_SPIS1) + max326_spi1_disableclk(); +#endif +#ifndef CONFIG_MAX326XX_UART0 + max326_uart0_disableclk(); +#endif +#ifndef CONFIG_MAX326XX_UART1 + max326_uart1_disableclk(); +#endif +#if !defined(CONFIG_MAX326XX_I2CM0) && !defined(CONFIG_MAX326XX_I2CS0) + max326_i2c0_disableclk(); +#endif +#if !defined(CONFIG_MAX326XX_I2CM1) && !defined(CONFIG_MAX326XX_I2CS1) + max326_i2c1_disableclk(); +#endif +#ifndef CONFIG_MAX326XX_TMR32_0 + max326_tmr0_disableclk(); +#endif +#ifndef CONFIG_MAX326XX_TMR32_1 + max326_tmr2_disableclk(); +#endif +#ifndef CONFIG_MAX326XX_TMR32_0 + max326_tmr2_disableclk(); +#endif } /**************************************************************************** diff --git a/arch/arm/src/max326xx/max32660/max32660_dma.c b/arch/arm/src/max326xx/max32660/max32660_dma.c index eb5e935af3e..95c1c82890c 100644 --- a/arch/arm/src/max326xx/max32660/max32660_dma.c +++ b/arch/arm/src/max326xx/max32660/max32660_dma.c @@ -48,6 +48,7 @@ #include "up_arch.h" #include "hardware/max326_dma.h" +#include "max326_periphclks.h" #include "max326_dma.h" #ifdef CONFIG_MAX326XX_DMA @@ -234,6 +235,10 @@ void weak_function up_dma_initialize(void) { int i; + /* Enable peripheral clocking to the DMA */ + + max326_dma_enableclk(); + /* Initialize each DMA channel */ for (i = 0; i < MAX326_DMA_NCHAN; i++)