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SAMA5D4: USART peripheral clock appears to be MCK/2

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This commit is contained in:
Gregory Nutt
2014-06-20 11:40:36 -06:00
parent 76d18267b1
commit 37d6366f08
12 changed files with 75 additions and 0 deletions
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configs/sama5d3-xplained/include/board_384mhz.h
+6
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@@ -167,6 +167,12 @@
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */ #define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */ #define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
/* HSMCI clocking /* HSMCI clocking
* *
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
configs/sama5d3-xplained/include/board_396mhz.h
+6
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@@ -125,6 +125,12 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */ #define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ #define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ #if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS) defined(CONFIG_SAMA5_UDPHS)
configs/sama5d3-xplained/include/board_528mhz.h
+6
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@@ -124,6 +124,12 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */ #define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ #define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ #if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS) defined(CONFIG_SAMA5_UDPHS)
configs/sama5d3-xplained/include/board_sdram.h
+6
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@@ -63,6 +63,12 @@
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY)) #define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY)) #define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY))
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ #if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS) defined(CONFIG_SAMA5_UDPHS)
configs/sama5d3x-ek/include/board_384mhz.h
+6
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@@ -167,6 +167,12 @@
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */ #define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */ #define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
/* HSMCI clocking /* HSMCI clocking
* *
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
configs/sama5d3x-ek/include/board_396mhz.h
+6
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@@ -125,6 +125,12 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */ #define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ #define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ #if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS) defined(CONFIG_SAMA5_UDPHS)
configs/sama5d3x-ek/include/board_528mhz.h
+5
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@@ -124,6 +124,11 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */ #define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ #define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ #if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS) defined(CONFIG_SAMA5_UDPHS)
configs/sama5d3x-ek/include/board_sdram.h
+6
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@@ -63,6 +63,12 @@
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY)) #define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY)) #define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY))
/* On some SAMA5's, the clocking to peripherals may be divided down from MCK,
* but not for the SAMA5D3.
*/
#define BOARD_USART_FREQUENCY BOARD_MCK_FREQUENCY
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ #if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS) defined(CONFIG_SAMA5_UDPHS)
configs/sama5d4-ek/include/board_384mhz.h
+7
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@@ -165,6 +165,13 @@
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */ #define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */ #define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
/* HSMCI clocking /* HSMCI clocking
* *
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) * Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
configs/sama5d4-ek/include/board_396mhz.h
+7
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@@ -123,6 +123,13 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */ #define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ #define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ #if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS) defined(CONFIG_SAMA5_UDPHS)
configs/sama5d4-ek/include/board_528mhz.h
+7
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@@ -122,6 +122,13 @@
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */ #define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */ #define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ #if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS) defined(CONFIG_SAMA5_UDPHS)
configs/sama5d4-ek/include/board_sdram.h
+7
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@@ -63,6 +63,13 @@
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY)) #define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY)) #define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY))
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \ #if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS) defined(CONFIG_SAMA5_UDPHS)