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Fix typos, 1 in a #define, others in comments. This changes one definition: _MQ_TIMEDRECIEVE is changed to _MQ_TIMEDRECEIVE. It appears this symbol is not used anywhere.
This commit is contained in:
Nathan Hartman
committed by
Gregory Nutt
Gregory Nutt
parent
bf3105fc8f
commit
366053e464
@@ -476,7 +476,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
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*
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* Input Parameters:
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* dev - Device-specific state data
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* buffer - A pointer to the buffer in which to recieve data
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* buffer - A pointer to the buffer in which to receive data
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* nwords - the length of data that can be received in the buffer in number
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* of words.
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* The wordsize is determined by the number of bits-per-word
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@@ -522,7 +522,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
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*
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* Input Parameters:
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* dev - Device-specific state data
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* buffer - A pointer to the buffer in which to recieve data
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* buffer - A pointer to the buffer in which to receive data
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* nwords - the length of data that can be received in the buffer in number
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* of words. The wordsize is determined by the number of
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* bits-per-word selected for the SPI interface.
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@@ -1347,7 +1347,7 @@ Networking
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CONFIG_NET_TCP_READAHEAD=y : Enable TCP read-ahead buffering
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CONFIG_NET_TCP_WRITE_BUFFERS=y : Enable TCP write buffering
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CONFIG_NET_UDP=y : Enable UDP networking
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CONFIG_NET_BROADCAST=y : Support UDP broadcase packets
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CONFIG_NET_BROADCAST=y : Support UDP broadcast packets
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CONFIG_NET_ICMP=y : Enable ICMP networking
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CONFIG_NET_ICMP_SOCKET=y : Needed for NSH ping command
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: Defaults should be okay for other options
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@@ -398,7 +398,7 @@ Selecting the GMAC peripheral
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CONFIG_NET_TCP_READAHEAD=y : Enable TCP read-ahead buffering
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CONFIG_NET_TCP_WRITE_BUFFERS=y : Enable TCP write buffering
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CONFIG_NET_UDP=y : Enable UDP networking
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CONFIG_NET_BROADCAST=y : Support UDP broadcase packets
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CONFIG_NET_BROADCAST=y : Support UDP broadcast packets
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CONFIG_NET_ICMP=y : Enable ICMP networking
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CONFIG_NET_ICMP_SOCKET=y : Needed for NSH ping command
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: Defaults should be okay for other options
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@@ -714,7 +714,7 @@ Selecting the GMAC peripheral
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CONFIG_NET_TCP_READAHEAD=y : Enable TCP read-ahead buffering
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CONFIG_NET_TCP_WRITE_BUFFERS=y : Enable TCP write buffering
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CONFIG_NET_UDP=y : Enable UDP networking
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CONFIG_NET_BROADCAST=y : Support UDP broadcase packets
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CONFIG_NET_BROADCAST=y : Support UDP broadcast packets
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CONFIG_NET_ICMP=y : Enable ICMP networking
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CONFIG_NET_ICMP_SOCKET=y : Needed for NSH ping command
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: Defaults should be okay for other options
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@@ -71,7 +71,7 @@
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
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#define STM32_LSE_FREQUENCY 32768
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/* PLL ouput is 72MHz */
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/* PLL output is 72MHz */
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#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */
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#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */
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@@ -302,7 +302,7 @@ static int waveform_init(FAR struct spwm_s *spwm, float (*f)(float))
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printf("Initialize waveform\n");
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/* Get phase step to acheive one sine waveform period */
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/* Get phase step to achieve one sine waveform period */
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spwm->phase_step = (float)(2 * M_PI / spwm->samples);
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@@ -68,7 +68,7 @@
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
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#define STM32_LSE_FREQUENCY 32768
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/* PLL ouput is 72MHz */
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/* PLL output is 72MHz */
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#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */
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#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */
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@@ -70,7 +70,7 @@
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
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#define STM32_LSE_FREQUENCY 32768
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/* PLL ouput is 72MHz */
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/* PLL output is 72MHz */
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#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */
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#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */
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@@ -1702,7 +1702,7 @@ static void stm3210e_backlight(void)
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ccer &= ~(ATIM_CCER_CC1NP|ATIM_CCER_CC1NE);
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/* Reset the Ouput Compare and Output Compare N IDLE State */
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/* Reset the Output Compare and Output Compare N IDLE State */
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cr2 &= ~(ATIM_CR2_OIS1|ATIM_CR2_OIS1N);
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@@ -486,7 +486,7 @@ MAPPING TO STM32 F4:
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FSMC_NWE ~WR pin 22 PD5 P2 pin 29 Conflict (Note 3)
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FSMC_NOE ~RD pin 21 PD4 P2 pin 32 Conflict (Note 4)
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PC6 RESET pin 24 PC6 P2 pin 47 Free I/O
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Timer ouput BL_CNT pin 23 (to be determined)
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Timer output BL_CNT pin 23 (to be determined)
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---------------- -------------- ----------------------------------
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1 Used for the RED LED
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@@ -67,7 +67,7 @@
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
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#define STM32_LSE_FREQUENCY 32768
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/* PLL ouput is 72MHz */
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/* PLL output is 72MHz */
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#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */
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#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */
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@@ -906,7 +906,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
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*
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* Input Parameters:
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* dev - Device-specific state data
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* buffer - A pointer to the buffer in which to recieve data
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* buffer - A pointer to the buffer in which to receive data
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* buflen - the length of data that can be received in the buffer in
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* number of words.
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* The wordsize is determined by the number of bits-per-word
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