diff --git a/arch/xtensa/src/common/xtensa.h b/arch/xtensa/src/common/xtensa.h index ba7da8055af..7f193ab97c4 100644 --- a/arch/xtensa/src/common/xtensa.h +++ b/arch/xtensa/src/common/xtensa.h @@ -248,6 +248,11 @@ void xtensa_dumpstate(void); uint32_t *xtensa_int_decode(uint32_t *regs); uint32_t *xtensa_irq_dispatch(int irq, uint32_t *regs); +void xtensa_context_save(uint32_t *regs); +void xtensa_full_context_save(uint32_t *regs); +void xtensa_context_restore(uint32_t *regs); +void xtensa_full_context_restore(uint32_t *regs); + /* Software interrupt handler */ int xtensa_swint(int irq, FAR void *context); diff --git a/arch/xtensa/src/common/xtensa_context.S b/arch/xtensa/src/common/xtensa_context.S index b0ab5a6ce7c..b1e7714d473 100644 --- a/arch/xtensa/src/common/xtensa_context.S +++ b/arch/xtensa/src/common/xtensa_context.S @@ -76,8 +76,8 @@ .text /**************************************************************************** - * Name: _xtensa_context_save - * _xtensa_full_context_save + * Name: xtensa_context_save + * xtensa_full_context_save * * Description: * @@ -85,14 +85,14 @@ * * These functions save Xtensa processor state: * - * - _xtensa_full_context_save saves all registers except PC, PS, A0, and + * - xtensa_full_context_save saves all registers except PC, PS, A0, and * A1 (SP) - * - _xtensa_context_save, in addition, does not save A12-A15 which + * - xtensa_context_save, in addition, does not save A12-A15 which * are preserved by the callee). * * Caller is expected to have saved PC, PS, A0, and A1 (SP). * - * The counterparts to these functions are _xtensa_context_restore() and + * The counterparts to these functions are xtensa_context_restore() and * xtensa_full_context_restore(). * * Entry Conditions: @@ -110,16 +110,16 @@ * ****************************************************************************/ - .global _xtensa_full_context_save - .global _xtensa_context_save - .type _xtensa_full_context_save, @function - .type _xtensa_context_save, @function + .global xtensa_full_context_save + .global xtensa_context_save + .type xtensa_full_context_save, @function + .type xtensa_context_save, @function .align 4 .literal_position .align 4 -_xtensa_full_context_save: +xtensa_full_context_save: #ifndef CONFIG_XTENSA_CALL0_ABI /* Save Call0 ABI callee-saved regs a12-15. */ @@ -130,7 +130,7 @@ _xtensa_full_context_save: s32i a15, sp, (4 * REG_A15) #endif -_xtensa_context_save: +xtensa_context_save: s32i a2, sp, (4 * REG_A2) s32i a3, sp, (4 * REG_A3) @@ -238,8 +238,8 @@ _xtensa_context_save: ret /**************************************************************************** - * Name: _xtensa_context_restore - * _xtensa_full_context_restore + * Name: xtensa_context_restore + * xtensa_full_context_restore * * Description: * @@ -248,14 +248,14 @@ _xtensa_context_save: * These functions restores Xtensa processor state and differ in which * registers are saved: * - * - _xtensa_full_context_restore restores all registers except PC, PS, + * - xtensa_full_context_restore restores all registers except PC, PS, * A0, and A1 (SP) - * - _xtensa_context_restore, in addition, does not restore A12-A15 which + * - xtensa_context_restore, in addition, does not restore A12-A15 which * are preserved by the callee). * * The caller is responsible for restoring PC, PS, A0, A1 (SP) in both cases. * - * _xtensa_context_save and _xtensa_full_context_save are the counterparts + * xtensa_context_save and xtensa_full_context_save are the counterparts * to these functions. * * Entry Conditions: @@ -269,16 +269,16 @@ _xtensa_context_save: * ****************************************************************************/ - .global _xtensa_full_context_restore - .global _xtensa_context_restore - .type _xtensa_full_context_restore,@function - .type _xtensa_context_restore,@function + .global xtensa_full_context_restore + .global xtensa_context_restore + .type xtensa_full_context_restore,@function + .type xtensa_context_restore,@function .align 4 .literal_position .align 4 -_xtensa_full_context_restore: +xtensa_full_context_restore: #ifndef CONFIG_XTENSA_CALL0_ABI /* Restore Call0 ABI callee-saved regs a12-15. */ @@ -289,7 +289,7 @@ _xtensa_full_context_restore: l32i a15, sp, (4 * REG_A15) #endif -_xtensa_context_restore: +xtensa_context_restore: #if XTENSA_EXTRA_SA_SIZE > 0 /* NOTE: Normally the xthal_restore_extra_nw macro only affects address diff --git a/arch/xtensa/src/common/xtensa_dumpstate.c b/arch/xtensa/src/common/xtensa_dumpstate.c index 14217d0117b..0fd5538f308 100644 --- a/arch/xtensa/src/common/xtensa_dumpstate.c +++ b/arch/xtensa/src/common/xtensa_dumpstate.c @@ -95,7 +95,8 @@ static void xtensa_stackdump(uint32_t sp, uint32_t stack_base) static inline void xtensa_registerdump(void) { - uint32_ *regs = CURRENT_REGS; + uint32_t *regs = (uint32_t *)CURRENT_REGS; /* Don't need volatile here */ + /* Are user registers available from interrupt processing? */ if (regs != NULL) diff --git a/arch/xtensa/src/common/xtensa_exit.c b/arch/xtensa/src/common/xtensa_exit.c index 0bc6da54d82..0352a4d8f5d 100644 --- a/arch/xtensa/src/common/xtensa_exit.c +++ b/arch/xtensa/src/common/xtensa_exit.c @@ -142,8 +142,8 @@ void _exit(int status) { struct tcb_s *tcb; - /* Disable interrupts. They will be restored when the next - * task is started. + /* Disable interrupts. They will be restored when the next task is + * started. */ (void)up_irq_save(); @@ -177,7 +177,7 @@ void _exit(int status) /* Then switch contexts */ - up_fullcontextrestore(tcb->xcp.regs); + xtensa_full_context_restore(tcb->xcp.regs); /* up_fullcontextrestore() should not return but could if the software * interrupts are disabled. diff --git a/arch/xtensa/src/common/xtensa_inthandlers.S b/arch/xtensa/src/common/xtensa_inthandlers.S index cac66b0892c..cc48797c809 100644 --- a/arch/xtensa/src/common/xtensa_inthandlers.S +++ b/arch/xtensa/src/common/xtensa_inthandlers.S @@ -272,7 +272,7 @@ * a CALL0 instruction. See "NOTES on the use of call0 ..." above. * * The corresponding handler sets up the appropriate stack frame, saves - * a few vector-specific registers and calls _xtensa_full_context_save() + * a few vector-specific registers and calls xtensa_full_context_save() * to save the rest of the interrupted context. It then calls the C * logic to decode the specific interrupt source and dispatch to the * appropriate C interrupt handler. @@ -296,7 +296,7 @@ _xtensa_level2_handler: /* Save rest of interrupt context and enter RTOS. */ - call0 _xtensa_full_context_save /* Save full register state */ + call0 xtensa_full_context_save /* Save full register state */ /* Set up PS for C, enable interrupts above this level and clear EXCM. */ diff --git a/arch/xtensa/src/esp32/esp32_intdecode.c b/arch/xtensa/src/esp32/esp32_intdecode.c index 96bc4c8092a..5490e614e36 100644 --- a/arch/xtensa/src/esp32/esp32_intdecode.c +++ b/arch/xtensa/src/esp32/esp32_intdecode.c @@ -39,6 +39,9 @@ #include +#include + +#include "chip/esp32_dport.h" #include "xtensa.h" /**************************************************************************** @@ -70,7 +73,6 @@ uint32_t *xtensa_int_decode(uint32_t *regs) int regndx; int bit; int baseirq; - int irq; #ifdef CONFIG_SMP int cpu;