Fix an error introduced into ALL implmentations of interrupt dispatch logic

arch/arm/src/arm/up_doirq.c

@@ -118,7 +118,7 @@ void up_doirq(int irq, uint32_t *regs)
        * thread at the head of the ready-to-run list.
        */
 
-      (void)group_addrenv(rtcb);
+      (void)group_addrenv(NULL);
 #endif
     }
 #endif

arch/arm/src/armv7-a/arm_doirq.c

@@ -118,7 +118,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
        * thread at the head of the ready-to-run list.
        */
 
-      (void)group_addrenv(rtcb);
+      (void)group_addrenv(NULL);
 #endif
     }
 #endif

arch/arm/src/dm320/dm320_decodeirq.c

@@ -134,7 +134,7 @@ void up_decodeirq(uint32_t* regs)
                * thread at the head of the ready-to-run list.
                */
 
-              (void)group_addrenv(rtcb);
+              (void)group_addrenv(NULL);
 #endif
             }
 #endif

arch/arm/src/imx/imx_decodeirq.c

@@ -141,7 +141,7 @@ void up_decodeirq(uint32_t* regs)
                * thread at the head of the ready-to-run list.
                */
 
-              (void)group_addrenv(rtcb);
+              (void)group_addrenv(NULL);
 #endif
             }
 #endif

arch/arm/src/lpc31xx/lpc31_decodeirq.c

@@ -1,6 +1,5 @@
 /********************************************************************************
  * arch/arm/src/lpc31xx/lpc31_decodeirq.c
- * arch/arm/src/chip/lpc31_decodeirq.c
  *
  *   Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -142,7 +141,7 @@ void up_decodeirq(uint32_t *regs)
                * thread at the head of the ready-to-run list.
                */
 
-              (void)group_addrenv(rtcb);
+              (void)group_addrenv(NULL);
 #endif
             }
 #endif

arch/avr/src/avr32/up_doirq.c

@@ -113,7 +113,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
        * thread at the head of the ready-to-run list.
        */
 
-      (void)group_addrenv(rtcb);
+      (void)group_addrenv(NULL);
 #endif
     }
 #endif

arch/hc/src/common/up_doirq.c

@@ -113,7 +113,7 @@ uint8_t *up_doirq(int irq, uint8_t *regs)
        * thread at the head of the ready-to-run list.
        */
 
-      (void)group_addrenv(rtcb);
+      (void)group_addrenv(NULL);
 #endif
     }
 #endif

arch/mips/src/mips32/up_doirq.c

@@ -119,7 +119,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
        * thread at the head of the ready-to-run list.
        */
 
-      (void)group_addrenv(rtcb);
+      (void)group_addrenv(NULL);
 #endif
     }
 #endif

arch/mips/src/pic32mx/pic32mx-decodeirq.c

@@ -170,7 +170,7 @@ uint32_t *pic32mx_decodeirq(uint32_t *regs)
        * thread at the head of the ready-to-run list.
        */
 
-      (void)group_addrenv(rtcb);
+      (void)group_addrenv(NULL);
 #endif
     }
 #endif

arch/sh/src/common/up_doirq.c

@@ -121,7 +121,7 @@ uint32_t *up_doirq(int irq, uint32_t* regs)
            * thread at the head of the ready-to-run list.
            */
 
-          (void)group_addrenv(rtcb);
+          (void)group_addrenv(NULL);
 #endif
         }
 #endif

arch/x86/src/qemu/qemu_handlers.c

@@ -125,7 +125,7 @@ static uint32_t *common_handler(int irq, uint32_t *regs)
        * thread at the head of the ready-to-run list.
        */
 
-      (void)group_addrenv(rtcb);
+      (void)group_addrenv(NULL);
 #endif
     }
 #endif

arch/z80/src/common/up_doirq.c

@@ -112,7 +112,7 @@ FAR chipreg_t *up_doirq(uint8_t irq, FAR chipreg_t *regs)
            * ready-to-run list.
            */
 
-          (void)group_addrenv(rtcb);
+          (void)group_addrenv(NULL);
         }
 
       regs = newregs;