Add ENC28J60 GPIO configuration

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2644 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2010-05-02 17:29:37 +00:00
parent 2a17959c7e
commit 34ebc7312c
4 changed files with 420 additions and 132 deletions
+37 -11
View File
@@ -228,9 +228,33 @@ GENERAL STEPS:
The same commands from the telnet interface can now be accessed through the The same commands from the telnet interface can now be accessed through the
'monitor' command, e.g. 'monitor help' 'monitor' command, e.g. 'monitor help'
MMC/SD Slot
^^^^^^^^^^^
STR-P711 PIN MMC/SD USAGE PIN CONFIGURATION
------------ ---------------- -----------------------
P0.7/S1.SS 1 CD/DAT3/CS P.07 output
P0.5/S1.MOSI 2 CMD/DI MOSI1
--- 3 VSS1 ---
--- 4 VDD ---
P0.6/S1.SCLK 5 CLK/SCLK SLCK1
--- 6 VSS2 ---
P0.4/S1.MISO 7 DAT0/D0 MISO1
--- 8 DAT1/RES (Pulled up)
--- 9 DAT2/RES (Pulled up)
P1.10/USBCLK 10/14 WP P1.10 input
P1.15/HTXD 13/15 CP P1.15 input
Use of SPI1 doesn't conflict with anything. WP conflicts USB; CP conflicts
with NTXD.
ENC28J60 Module ENC28J60 Module
^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^
The ENC28J60 module does not come on the Olimex-STR-P711, but this describes
how I have connected it:
Module CON5 QFN ENC2860 Description Module CON5 QFN ENC2860 Description
--------------- ------------------------------------------------------- --------------- -------------------------------------------------------
1 J8-1 NET CS 5 ~CS Chip select input pin for SPI interface (active low) 1 J8-1 NET CS 5 ~CS Chip select input pin for SPI interface (active low)
@@ -244,22 +268,24 @@ ENC28J60 Module
7 4 CLKOUT 27 CLKOUT Programmable clock output pin 7 4 CLKOUT 27 CLKOUT Programmable clock output pin
6 5 NET RST 6 ~RESET Active-low device Reset input 6 5 NET RST 6 ~RESET Active-low device Reset input
For the Olimex STR-P711, the ENC28J60 module is placed on SPI1 (with For the Olimex STR-P711, the ENC28J60 module is placed on SPI0 and uses
the MMC slot) and uses P0.0 for CS, P0.1 for an interrupt, and P0.2 as P0.3 for CS, P1.4 for an interrupt, and P1.5 as a reset:
a reset:
Module CON5 Olimex STR-P711 Connection Module CON5 Olimex STR-P711 Connection
--------------- ------------------------------------------------------- --------------- -------------------------------------------------------
1 J8-1 NET CS SPI0-4 P0.0 P0.0/S0.MISO/U3.TX 1 J8-1 NET CS SPI0-2 P0.3 output P0.3/S0.SS/I1.SDA
2 2 SCK SPI1-5 SCLK1 P0.6/S1.SCLK 2 2 SCK SPI0-5 SCLK0 P0.2/S0.SCLK/I1.SCL
3 3 MOSI SPI1-3 MOSI1 P0.5/S1.MOSI 3 3 MOSI SPI0-3 MOSI0 P0.0/S0.MOSI/U3.RX
4 4 MISO SPI1-4 MISO1 P0.4/S1.MISO 4 4 MISO SPI0-4 MISO0 P0.1/S0.MISO/U3.TX
5 5 GND SPI1-1 GND 5 5 GND SPI0-1 GND
10 J9-1 3V3 SPI1-6 3.3V 10 J9-1 3V3 SPI0-6 3.3V
9 2 WOL NC 9 2 WOL NC
8 3 NET INT SPI0-3 P0.1 P0.1/S0.MOSI/U3.RX 8 3 NET INT TMR1_EXT-5 P1.4 input P1.4/T1.ICAPA/T1.EXTCLK
7 4 CLKOUT NC 7 4 CLKOUT NC
6 5 NET RST SPI0-5 P0.2 P0.2/S0 6 5 NET RST TMR1_EXT_4 P1.5 output P1.5/T1.ICAPB
UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60
interrupt conflict with TIM1.
Configurations: Configurations:
--------------- ---------------
+2 -2
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@@ -115,8 +115,8 @@ CONFIG_STR71X_UART2=n
CONFIG_STR71X_UART3=n CONFIG_STR71X_UART3=n
CONFIG_STR71X_USB=n CONFIG_STR71X_USB=n
CONFIG_STR71X_CAN=n CONFIG_STR71X_CAN=n
CONFIG_STR71X_BSPI0=n CONFIG_STR71X_BSPI0=y
CONFIG_STR71X_BSPI1=y CONFIG_STR71X_BSPI1=n
CONFIG_STR71X_HDLC=n CONFIG_STR71X_HDLC=n
CONFIG_STR71X_XTI=n CONFIG_STR71X_XTI=n
CONFIG_STR71X_GPIO0=y CONFIG_STR71X_GPIO0=y
+55 -2
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@@ -33,6 +33,45 @@
* *
****************************************************************************/ ****************************************************************************/
/*
* ENC28J60 Module
*
* The ENC28J60 module does not come on the Olimex-STR-P711, but this describes
* how I have connected it:
*
* Module CON5 QFN ENC2860 Description
* --------------- -------------------------------------------------------
* 1 J8-1 NET CS 5 ~CS Chip select input pin for SPI interface (active low)
* 2 2 SCK 4 SCK Clock in pin for SPI interface
* 3 3 MOSI 3 SI Data in pin for SPI interface
* 4 4 MISO 2 SO Data out pin for SPI interface
* 5 5 GND -- --- ---
* 10 J9-1 3V3 -- --- ---
* 9 2 WOL 1 ~WOL Unicast WOL filter
* 8 3 NET INT 28 ~INT Interrupt output pin (active low)
* 7 4 CLKOUT 27 CLKOUT Programmable clock output pin
* 6 5 NET RST 6 ~RESET Active-low device Reset input
*
* For the Olimex STR-P711, the ENC28J60 module is placed on SPI0 and uses
* P0.3 for CS, P1.4 for an interrupt, and P1.5 as a reset:
*
* Module CON5 Olimex STR-P711 Connection
* --------------- -------------------------------------------------------
* 1 J8-1 NET CS SPI0-2 P0.3 output P0.3/S0.SS/I1.SDA
* 2 2 SCK SPI0-5 SCLK0 P0.2/S0.SCLK/I1.SCL
* 3 3 MOSI SPI0-3 MOSI0 P0.0/S0.MOSI/U3.RX
* 4 4 MISO SPI0-4 MISO0 P0.1/S0.MISO/U3.TX
* 5 5 GND SPI0-1 GND
* 10 J9-1 3V3 SPI0-6 3.3V
* 9 2 WOL NC
* 8 3 NET INT TMR1_EXT-5 P1.4 input P1.4/T1.ICAPA/T1.EXTCLK
* 7 4 CLKOUT NC
* 6 5 NET RST TMR1_EXT_4 P1.5 output P1.5/T1.ICAPB
*
* UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60
* interrupt conflict with TMR1.
*/
/**************************************************************************** /****************************************************************************
* Included Files * Included Files
****************************************************************************/ ****************************************************************************/
@@ -60,8 +99,22 @@
/* Configuration ************************************************************/ /* Configuration ************************************************************/
#ifndef CONFIG_STR71X_BSPI1 /* We assume that the ENC28J60 is on SPI0 */
# error "Need CONFIG_STR71X_BSP1 in the configuration"
#ifndef CONFIG_STR71X_BSPI0
# error "Need CONFIG_STR71X_BSPI0 in the configuration"
#endif
/* UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60
* interrupt conflict with TIM1.
*/
#ifdef CONFIG_STR71X_UART3
# error "CONFIG_STR71X_UART3 cannot be used in this configuration"
#endif
#ifdef CONFIG_STR71X_TIM1
# error "CONFIG_STR71X_TIM1 cannot be used in this configuration"
#endif #endif
/* SPI Assumptions **********************************************************/ /* SPI Assumptions **********************************************************/
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