diff --git a/arch/arm/src/armv7-a/arm_addrenv.c b/arch/arm/src/armv7-a/arm_addrenv.c
index a58642533e6..717e4475d37 100644
--- a/arch/arm/src/armv7-a/arm_addrenv.c
+++ b/arch/arm/src/armv7-a/arm_addrenv.c
@@ -195,6 +195,8 @@ static int up_addrenv_initdata(uintptr_t l2table)
    * the beginning of .bss/.data by setting it to zero.
    */
 
+  binfo("*** clear .bss/data (virtptr=%p, size=%d)\n",
+        virtptr, ARCH_DATA_RESERVE_SIZE);
   memset(virtptr, 0, ARCH_DATA_RESERVE_SIZE);
 
   /* Make sure that the initialized data is flushed to physical memory. */
@@ -248,8 +250,11 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
 {
   int ret;
 
-  binfo("addrenv=%p textsize=%lu datasize=%lu\n",
-        addrenv, (unsigned long)textsize, (unsigned long)datasize);
+  binfo("addrenv=%p textsize=%lu datasize=%lu heapsize=%lu\n",
+        addrenv,
+        (unsigned long)textsize,
+        (unsigned long)datasize,
+        (unsigned long)heapsize);
 
   DEBUGASSERT(addrenv);
 
@@ -319,6 +324,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
    */
 
   addrenv->heapsize = (size_t)ret << MM_PGSHIFT;
+  binfo("addrenv->heapsize=%d\n", addrenv->heapsize);
 #endif
   return OK;
 
@@ -500,6 +506,7 @@ int up_addrenv_select(FAR const group_addrenv_t *addrenv,
   uintptr_t paddr;
   int i;
 
+  binfo("addrenv=%p oldenv=%p\n", addrenv, oldenv);
   DEBUGASSERT(addrenv);
 
   for (vaddr = CONFIG_ARCH_TEXT_VBASE, i = 0;
@@ -518,10 +525,12 @@ int up_addrenv_select(FAR const group_addrenv_t *addrenv,
       paddr = (uintptr_t)addrenv->text[i];
       if (paddr)
         {
+          binfo("text: set l1 entry (paddr=%x vaddr=%x)\n", paddr, vaddr);
           mmu_l1_setentry(paddr, vaddr, MMU_L1_PGTABFLAGS);
         }
       else
         {
+          binfo("text: clear l1 (vaddr=%x)\n", vaddr);
           mmu_l1_clrentry(vaddr);
         }
     }
@@ -542,10 +551,12 @@ int up_addrenv_select(FAR const group_addrenv_t *addrenv,
       paddr = (uintptr_t)addrenv->data[i];
       if (paddr)
         {
+          binfo("data: set l1 entry (paddr=%x vaddr=%x)\n", paddr, vaddr);
           mmu_l1_setentry(paddr, vaddr, MMU_L1_PGTABFLAGS);
         }
       else
         {
+          binfo("data: clear l1 (vaddr=%x)\n", vaddr);
           mmu_l1_clrentry(vaddr);
         }
     }
@@ -567,10 +578,12 @@ int up_addrenv_select(FAR const group_addrenv_t *addrenv,
       paddr = (uintptr_t)addrenv->heap[i];
       if (paddr)
         {
+          binfo("heap: set l1 entry (paddr=%x vaddr=%x)\n", paddr, vaddr);
           mmu_l1_setentry(paddr, vaddr, MMU_L1_PGTABFLAGS);
         }
       else
         {
+          binfo("data: clear l1 (vaddr=%x)\n", vaddr);
           mmu_l1_clrentry(vaddr);
         }
     }
diff --git a/arch/arm/src/armv7-a/arm_addrenv_utils.c b/arch/arm/src/armv7-a/arm_addrenv_utils.c
index 4a22e2a4586..1c735d4e200 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_utils.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_utils.c
@@ -99,6 +99,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
       /* Allocate one physical page for the L2 page table */
 
       paddr = mm_pgalloc(1);
+      binfo("a new l2 page table (paddr=%x)\n", paddr);
       if (!paddr)
         {
           return -ENOMEM;
@@ -134,6 +135,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
           /* Allocate one physical page for region data */
 
           paddr = mm_pgalloc(1);
+          binfo("a new page (paddr=%x)\n", paddr);
           if (!paddr)
             {
 #ifndef CONFIG_ARCH_PGPOOL_MAPPING
diff --git a/arch/arm/src/armv7-a/arm_pgalloc.c b/arch/arm/src/armv7-a/arm_pgalloc.c
index 13f33b7c3ec..4ca10bf3b4a 100644
--- a/arch/arm/src/armv7-a/arm_pgalloc.c
+++ b/arch/arm/src/armv7-a/arm_pgalloc.c
@@ -63,6 +63,7 @@ static uintptr_t alloc_pgtable(void)
   /* Allocate one physical page for the L2 page table */
 
   paddr = mm_pgalloc(1);
+  binfo("a new l2 page table (paddr=%x)\n", paddr);
   if (paddr)
     {
       DEBUGASSERT(MM_ISALIGNED(paddr));
@@ -209,6 +210,8 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages)
 #endif
   unsigned int index;
 
+  binfo("tcb->pid=%d tcb->group=%p\n", tcb->pid, tcb->group);
+  binfo("brkaddr=%x npages=%d\n", brkaddr, npages);
   DEBUGASSERT(tcb && tcb->group);
   group = tcb->group;
 
@@ -235,6 +238,8 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages)
       /* Get the physical address of the level 2 page table */
 
       paddr = get_pgtable(&group->tg_addrenv, brkaddr);
+      binfo("l2 page table (paddr=%x)\n", paddr);
+      binfo("brkaddr=%x\n", brkaddr);
       if (paddr == 0)
         {
           return 0;
@@ -261,6 +266,7 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages)
       /* Back up L2 entry with physical memory */
 
       paddr = mm_pgalloc(1);
+      binfo("a new page (paddr=%x)\n", paddr);
       if (paddr == 0)
         {
 #ifndef CONFIG_ARCH_PGPOOL_MAPPING