mirror of
https://github.com/apache/nuttx.git
synced 2026-05-28 11:56:10 +08:00
Fix nuttx coding style
Remove TABs Remove spaces Fix indentation
This commit is contained in:
simbit18
committed by
Alan Carvalho de Assis
Alan Carvalho de Assis
parent
dafa4e4413
commit
34bb0b6544
@@ -115,7 +115,7 @@
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#define AT32_IRQ_DMA1CH2 (AT32_IRQ_FIRST+57) /* 57: DMA1 Stream 2 global interrupt */
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#define AT32_IRQ_DMA1CH2 (AT32_IRQ_FIRST+57) /* 57: DMA1 Stream 2 global interrupt */
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#define AT32_IRQ_DMA1CH3 (AT32_IRQ_FIRST+58) /* 58: DMA1 Stream 3 global interrupt */
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#define AT32_IRQ_DMA1CH3 (AT32_IRQ_FIRST+58) /* 58: DMA1 Stream 3 global interrupt */
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#define AT32_IRQ_DMA1CH4 (AT32_IRQ_FIRST+59) /* 59: DMA1 Stream 4 global interrupt */
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#define AT32_IRQ_DMA1CH4 (AT32_IRQ_FIRST+59) /* 59: DMA1 Stream 4 global interrupt */
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#define AT32_IRQ_DMA1CH5 (AT32_IRQ_FIRST+60) /* 60: DMA1 Stream 5 global interrupt */
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#define AT32_IRQ_DMA1CH5 (AT32_IRQ_FIRST+60) /* 60: DMA1 Stream 5 global interrupt */
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#if defined(CONFIG_AT32_AT32F437)
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#if defined(CONFIG_AT32_AT32F437)
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# define AT32_IRQ_ETH (AT32_IRQ_FIRST+61) /* 61: Ethernet global interrupt */
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# define AT32_IRQ_ETH (AT32_IRQ_FIRST+61) /* 61: Ethernet global interrupt */
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# define AT32_IRQ_ETHWKUP (AT32_IRQ_FIRST+62) /* 62: Ethernet Wakeup through EXTI line interrupt */
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# define AT32_IRQ_ETHWKUP (AT32_IRQ_FIRST+62) /* 62: Ethernet Wakeup through EXTI line interrupt */
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@@ -136,40 +136,40 @@
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# define AT32_CAN1_INTEN (AT32_CAN1_BASE+AT32_CAN_INTEN_OFFSET)
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# define AT32_CAN1_INTEN (AT32_CAN1_BASE+AT32_CAN_INTEN_OFFSET)
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# define AT32_CAN1_ESTS (AT32_CAN1_BASE+AT32_CAN_ESTS_OFFSET)
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# define AT32_CAN1_ESTS (AT32_CAN1_BASE+AT32_CAN_ESTS_OFFSET)
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# define AT32_CAN1_BTMG (AT32_CAN1_BASE+AT32_CAN_BTMG_OFFSET)
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# define AT32_CAN1_BTMG (AT32_CAN1_BASE+AT32_CAN_BTMG_OFFSET)
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# define AT32_CAN1_TMI(x) (AT32_CAN1_BASE+AT32_CAN_TMI_OFFSET(x))
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# define AT32_CAN1_TMI(x) (AT32_CAN1_BASE+AT32_CAN_TMI_OFFSET(x))
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# define AT32_CAN1_TMI0 (AT32_CAN1_BASE+AT32_CAN_TMI0_FFSET)
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# define AT32_CAN1_TMI0 (AT32_CAN1_BASE+AT32_CAN_TMI0_FFSET)
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# define AT32_CAN1_TMI1 (AT32_CAN1_BASE+AT32_CAN_TMI1_FFSET)
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# define AT32_CAN1_TMI1 (AT32_CAN1_BASE+AT32_CAN_TMI1_FFSET)
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# define AT32_CAN1_TMI2 (AT32_CAN1_BASE+AT32_CAN_TMI2_FFSET)
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# define AT32_CAN1_TMI2 (AT32_CAN1_BASE+AT32_CAN_TMI2_FFSET)
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# define AT32_CAN1_TMC(x) (AT32_CAN1_BASE+AT32_CAN_TMC_OFFSET(x))
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# define AT32_CAN1_TMC(x) (AT32_CAN1_BASE+AT32_CAN_TMC_OFFSET(x))
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# define AT32_CAN1_TMC0 (AT32_CAN1_BASE+AT32_CAN_TMC0_OFFSET)
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# define AT32_CAN1_TMC0 (AT32_CAN1_BASE+AT32_CAN_TMC0_OFFSET)
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# define AT32_CAN1_TMC1 (AT32_CAN1_BASE+AT32_CAN_TMC1_OFFSET)
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# define AT32_CAN1_TMC1 (AT32_CAN1_BASE+AT32_CAN_TMC1_OFFSET)
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# define AT32_CAN1_TMC2 (AT32_CAN1_BASE+AT32_CAN_TMC2_OFFSET)
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# define AT32_CAN1_TMC2 (AT32_CAN1_BASE+AT32_CAN_TMC2_OFFSET)
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# define AT32_CAN1_TMDTL(x) (AT32_CAN1_BASE+AT32_CAN_TMDTL_OFFSET(x))
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# define AT32_CAN1_TMDTL(x) (AT32_CAN1_BASE+AT32_CAN_TMDTL_OFFSET(x))
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# define AT32_CAN1_TMDTL0 (AT32_CAN1_BASE+AT32_CAN_TMDTL0_OFFSET)
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# define AT32_CAN1_TMDTL0 (AT32_CAN1_BASE+AT32_CAN_TMDTL0_OFFSET)
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# define AT32_CAN1_TMDTL1 (AT32_CAN1_BASE+AT32_CAN_TMDTL1_OFFSET)
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# define AT32_CAN1_TMDTL1 (AT32_CAN1_BASE+AT32_CAN_TMDTL1_OFFSET)
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# define AT32_CAN1_TMDTL2 (AT32_CAN1_BASE+AT32_CAN_TMDTL2_OFFSET)
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# define AT32_CAN1_TMDTL2 (AT32_CAN1_BASE+AT32_CAN_TMDTL2_OFFSET)
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# define AT32_CAN1_TMDTH(x) (AT32_CAN1_BASE+AT32_CAN_TMDTH_OFFSET(x))
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# define AT32_CAN1_TMDTH(x) (AT32_CAN1_BASE+AT32_CAN_TMDTH_OFFSET(x))
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# define AT32_CAN1_TMDTH0 (AT32_CAN1_BASE+AT32_CAN_TMDTH0_OFFSET)
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# define AT32_CAN1_TMDTH0 (AT32_CAN1_BASE+AT32_CAN_TMDTH0_OFFSET)
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# define AT32_CAN1_TMDTH1 (AT32_CAN1_BASE+AT32_CAN_TMDTH1_OFFSET)
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# define AT32_CAN1_TMDTH1 (AT32_CAN1_BASE+AT32_CAN_TMDTH1_OFFSET)
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# define AT32_CAN1_TMDTH2 (AT32_CAN1_BASE+AT32_CAN_TMDTH2_OFFSET)
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# define AT32_CAN1_TMDTH2 (AT32_CAN1_BASE+AT32_CAN_TMDTH2_OFFSET)
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# define AT32_CAN1_RFI(x) (AT32_CAN1_BASE+AT32_CAN_RFI_OFFSET(x))
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# define AT32_CAN1_RFI(x) (AT32_CAN1_BASE+AT32_CAN_RFI_OFFSET(x))
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# define AT32_CAN1_RFI0 (AT32_CAN1_BASE+AT32_CAN_RFI0_OFFSET)
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# define AT32_CAN1_RFI0 (AT32_CAN1_BASE+AT32_CAN_RFI0_OFFSET)
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# define AT32_CAN1_RFI1 (AT32_CAN1_BASE+AT32_CAN_RFI1_OFFSET)
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# define AT32_CAN1_RFI1 (AT32_CAN1_BASE+AT32_CAN_RFI1_OFFSET)
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# define AT32_CAN1_RFC(x) (AT32_CAN1_BASE+AT32_CAN_RFC_OFFSET(x))
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# define AT32_CAN1_RFC(x) (AT32_CAN1_BASE+AT32_CAN_RFC_OFFSET(x))
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# define AT32_CAN1_RFC0 (AT32_CAN1_BASE+AT32_CAN_RFC0_OFFSET)
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# define AT32_CAN1_RFC0 (AT32_CAN1_BASE+AT32_CAN_RFC0_OFFSET)
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# define AT32_CAN1_RFC1 (AT32_CAN1_BASE+AT32_CAN_RFC1_OFFSET)
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# define AT32_CAN1_RFC1 (AT32_CAN1_BASE+AT32_CAN_RFC1_OFFSET)
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# define AT32_CAN1_RFDTL(x) (AT32_CAN1_BASE+AT32_CAN_RFDTL_OFFSET(x))
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# define AT32_CAN1_RFDTL(x) (AT32_CAN1_BASE+AT32_CAN_RFDTL_OFFSET(x))
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# define AT32_CAN1_RFDTL0 (AT32_CAN1_BASE+AT32_CAN_RFDTL0_OFFSET)
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# define AT32_CAN1_RFDTL0 (AT32_CAN1_BASE+AT32_CAN_RFDTL0_OFFSET)
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# define AT32_CAN1_RFDTL1 (AT32_CAN1_BASE+AT32_CAN_RFDTL1_OFFSET)
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# define AT32_CAN1_RFDTL1 (AT32_CAN1_BASE+AT32_CAN_RFDTL1_OFFSET)
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# define AT32_CAN1_RFDTH(x) (AT32_CAN1_BASE+AT32_CAN_RFDTH_OFFSET(x))
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# define AT32_CAN1_RFDTH(x) (AT32_CAN1_BASE+AT32_CAN_RFDTH_OFFSET(x))
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# define AT32_CAN1_RFDTH0 (AT32_CAN1_BASE+AT32_CAN_RFDTH0_OFFSET)
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# define AT32_CAN1_RFDTH0 (AT32_CAN1_BASE+AT32_CAN_RFDTH0_OFFSET)
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# define AT32_CAN1_RFDTH1 (AT32_CAN1_BASE+AT32_CAN_RFDTH1_OFFSET)
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# define AT32_CAN1_RFDTH1 (AT32_CAN1_BASE+AT32_CAN_RFDTH1_OFFSET)
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# define AT32_CAN1_FCTRL (AT32_CAN1_BASE+AT32_CAN_FCTRL_OFFSET)
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# define AT32_CAN1_FCTRL (AT32_CAN1_BASE+AT32_CAN_FCTRL_OFFSET)
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# define AT32_CAN1_FMCFG (AT32_CAN1_BASE+AT32_CAN_FMCFG_OFFSET)
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# define AT32_CAN1_FMCFG (AT32_CAN1_BASE+AT32_CAN_FMCFG_OFFSET)
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# define AT32_CAN1_FSCFG (AT32_CAN1_BASE+AT32_CAN_FSCFG_OFFSET)
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# define AT32_CAN1_FSCFG (AT32_CAN1_BASE+AT32_CAN_FSCFG_OFFSET)
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# define AT32_CAN1_FRF (AT32_CAN1_BASE+AT32_CAN_FRF_OFFSET)
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# define AT32_CAN1_FRF (AT32_CAN1_BASE+AT32_CAN_FRF_OFFSET)
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# define AT32_CAN1_FACFG (AT32_CAN1_BASE+AT32_CAN_FACFG_OFFSET)
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# define AT32_CAN1_FACFG (AT32_CAN1_BASE+AT32_CAN_FACFG_OFFSET)
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# define AT32_CAN1_FIR(b,i) (AT32_CAN1_BASE+AT32_CAN_FIR_OFFSET(b,i))
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# define AT32_CAN1_FIR(b,i) (AT32_CAN1_BASE+AT32_CAN_FIR_OFFSET(b,i))
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#endif
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#endif
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#if AT32_NCAN > 1
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#if AT32_NCAN > 1
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@@ -180,41 +180,41 @@
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# define AT32_CAN2_RF1 (AT32_CAN2_BASE+AT32_CAN_RF1_OFFSET)
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# define AT32_CAN2_RF1 (AT32_CAN2_BASE+AT32_CAN_RF1_OFFSET)
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# define AT32_CAN2_INTEN (AT32_CAN2_BASE+AT32_CAN_INTEN_OFFSET)
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# define AT32_CAN2_INTEN (AT32_CAN2_BASE+AT32_CAN_INTEN_OFFSET)
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# define AT32_CAN2_ESTS (AT32_CAN2_BASE+AT32_CAN_ESTS_OFFSET)
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# define AT32_CAN2_ESTS (AT32_CAN2_BASE+AT32_CAN_ESTS_OFFSET)
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# define AT32_CAN2_BTMG (AT32_CAN2_BASE+AT32_CAN_BTMG_OFFSET)
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# define AT32_CAN2_BTMG (AT32_CAN2_BASE+AT32_CAN_BTMG_OFFSET)
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# define AT32_CAN2_TMI(x) (AT32_CAN2_BASE+AT32_CAN_TMI_OFFSET(x))
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# define AT32_CAN2_TMI(x) (AT32_CAN2_BASE+AT32_CAN_TMI_OFFSET(x))
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# define AT32_CAN2_TMI0 (AT32_CAN2_BASE+AT32_CAN_TMI0_FFSET)
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# define AT32_CAN2_TMI0 (AT32_CAN2_BASE+AT32_CAN_TMI0_FFSET)
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# define AT32_CAN2_TMI1 (AT32_CAN2_BASE+AT32_CAN_TMI1_FFSET)
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# define AT32_CAN2_TMI1 (AT32_CAN2_BASE+AT32_CAN_TMI1_FFSET)
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# define AT32_CAN2_TMI2 (AT32_CAN2_BASE+AT32_CAN_TMI2_FFSET)
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# define AT32_CAN2_TMI2 (AT32_CAN2_BASE+AT32_CAN_TMI2_FFSET)
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# define AT32_CAN2_TMC(x) (AT32_CAN2_BASE+AT32_CAN_TMC_OFFSET(x))
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# define AT32_CAN2_TMC(x) (AT32_CAN2_BASE+AT32_CAN_TMC_OFFSET(x))
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# define AT32_CAN2_TMC0 (AT32_CAN2_BASE+AT32_CAN_TMC0_OFFSET)
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# define AT32_CAN2_TMC0 (AT32_CAN2_BASE+AT32_CAN_TMC0_OFFSET)
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# define AT32_CAN2_TMC1 (AT32_CAN2_BASE+AT32_CAN_TMC1_OFFSET)
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# define AT32_CAN2_TMC1 (AT32_CAN2_BASE+AT32_CAN_TMC1_OFFSET)
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# define AT32_CAN2_TMC2 (AT32_CAN2_BASE+AT32_CAN_TMC2_OFFSET)
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# define AT32_CAN2_TMC2 (AT32_CAN2_BASE+AT32_CAN_TMC2_OFFSET)
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# define AT32_CAN2_TMDTL(x) (AT32_CAN2_BASE+AT32_CAN_TMDTL_OFFSET(x))
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# define AT32_CAN2_TMDTL(x) (AT32_CAN2_BASE+AT32_CAN_TMDTL_OFFSET(x))
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# define AT32_CAN2_TMDTL0 (AT32_CAN2_BASE+AT32_CAN_TMDTL0_OFFSET)
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# define AT32_CAN2_TMDTL0 (AT32_CAN2_BASE+AT32_CAN_TMDTL0_OFFSET)
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# define AT32_CAN2_TMDTL1 (AT32_CAN2_BASE+AT32_CAN_TMDTL1_OFFSET)
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# define AT32_CAN2_TMDTL1 (AT32_CAN2_BASE+AT32_CAN_TMDTL1_OFFSET)
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# define AT32_CAN2_TMDTL2 (AT32_CAN2_BASE+AT32_CAN_TMDTL2_OFFSET)
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# define AT32_CAN2_TMDTL2 (AT32_CAN2_BASE+AT32_CAN_TMDTL2_OFFSET)
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# define AT32_CAN2_TMDTH(x) (AT32_CAN2_BASE+AT32_CAN_TMDTH_OFFSET(x))
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# define AT32_CAN2_TMDTH(x) (AT32_CAN2_BASE+AT32_CAN_TMDTH_OFFSET(x))
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# define AT32_CAN2_TMDTH0 (AT32_CAN2_BASE+AT32_CAN_TMDTH0_OFFSET)
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# define AT32_CAN2_TMDTH0 (AT32_CAN2_BASE+AT32_CAN_TMDTH0_OFFSET)
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# define AT32_CAN2_TMDTH1 (AT32_CAN2_BASE+AT32_CAN_TMDTH1_OFFSET)
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# define AT32_CAN2_TMDTH1 (AT32_CAN2_BASE+AT32_CAN_TMDTH1_OFFSET)
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# define AT32_CAN2_TMDTH2 (AT32_CAN2_BASE+AT32_CAN_TMDTH2_OFFSET)
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# define AT32_CAN2_TMDTH2 (AT32_CAN2_BASE+AT32_CAN_TMDTH2_OFFSET)
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# define AT32_CAN2_RFI(x) (AT32_CAN2_BASE+AT32_CAN_RFI_OFFSET(x))
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# define AT32_CAN2_RFI(x) (AT32_CAN2_BASE+AT32_CAN_RFI_OFFSET(x))
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# define AT32_CAN2_RFI0 (AT32_CAN2_BASE+AT32_CAN_RFI0_OFFSET)
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# define AT32_CAN2_RFI0 (AT32_CAN2_BASE+AT32_CAN_RFI0_OFFSET)
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# define AT32_CAN2_RFI1 (AT32_CAN2_BASE+AT32_CAN_RFI1_OFFSET)
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# define AT32_CAN2_RFI1 (AT32_CAN2_BASE+AT32_CAN_RFI1_OFFSET)
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# define AT32_CAN2_RFC(x) (AT32_CAN2_BASE+AT32_CAN_RFC_OFFSET(x))
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# define AT32_CAN2_RFC(x) (AT32_CAN2_BASE+AT32_CAN_RFC_OFFSET(x))
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# define AT32_CAN2_RFC0 (AT32_CAN2_BASE+AT32_CAN_RFC0_OFFSET)
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# define AT32_CAN2_RFC0 (AT32_CAN2_BASE+AT32_CAN_RFC0_OFFSET)
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# define AT32_CAN2_RFC1 (AT32_CAN2_BASE+AT32_CAN_RFC1_OFFSET)
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# define AT32_CAN2_RFC1 (AT32_CAN2_BASE+AT32_CAN_RFC1_OFFSET)
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# define AT32_CAN2_RFDTL(x) (AT32_CAN2_BASE+AT32_CAN_RFDTL_OFFSET(x))
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# define AT32_CAN2_RFDTL(x) (AT32_CAN2_BASE+AT32_CAN_RFDTL_OFFSET(x))
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# define AT32_CAN2_RFDTL0 (AT32_CAN2_BASE+AT32_CAN_RFDTL0_OFFSET)
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# define AT32_CAN2_RFDTL0 (AT32_CAN2_BASE+AT32_CAN_RFDTL0_OFFSET)
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# define AT32_CAN2_RFDTL1 (AT32_CAN2_BASE+AT32_CAN_RFDTL1_OFFSET)
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# define AT32_CAN2_RFDTL1 (AT32_CAN2_BASE+AT32_CAN_RFDTL1_OFFSET)
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# define AT32_CAN2_RFDTH(x) (AT32_CAN2_BASE+AT32_CAN_RFDTH_OFFSET(x))
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# define AT32_CAN2_RFDTH(x) (AT32_CAN2_BASE+AT32_CAN_RFDTH_OFFSET(x))
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# define AT32_CAN2_RFDTH0 (AT32_CAN2_BASE+AT32_CAN_RFDTH0_OFFSET)
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# define AT32_CAN2_RFDTH0 (AT32_CAN2_BASE+AT32_CAN_RFDTH0_OFFSET)
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# define AT32_CAN2_RFDTH1 (AT32_CAN2_BASE+AT32_CAN_RFDTH1_OFFSET)
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# define AT32_CAN2_RFDTH1 (AT32_CAN2_BASE+AT32_CAN_RFDTH1_OFFSET)
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# define AT32_CAN2_FCTRL (AT32_CAN2_BASE+AT32_CAN_FCTRL_OFFSET)
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# define AT32_CAN2_FCTRL (AT32_CAN2_BASE+AT32_CAN_FCTRL_OFFSET)
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# define AT32_CAN2_FMCFG (AT32_CAN2_BASE+AT32_CAN_FMCFG_OFFSET)
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# define AT32_CAN2_FMCFG (AT32_CAN2_BASE+AT32_CAN_FMCFG_OFFSET)
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# define AT32_CAN2_FSCFG (AT32_CAN2_BASE+AT32_CAN_FSCFG_OFFSET)
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# define AT32_CAN2_FSCFG (AT32_CAN2_BASE+AT32_CAN_FSCFG_OFFSET)
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# define AT32_CAN2_FRF (AT32_CAN2_BASE+AT32_CAN_FRF_OFFSET)
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# define AT32_CAN2_FRF (AT32_CAN2_BASE+AT32_CAN_FRF_OFFSET)
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# define AT32_CAN2_FACFG (AT32_CAN2_BASE+AT32_CAN_FACFG_OFFSET)
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# define AT32_CAN2_FACFG (AT32_CAN2_BASE+AT32_CAN_FACFG_OFFSET)
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# define AT32_CAN2_FIR(b,i) (AT32_CAN2_BASE+AT32_CAN_FIR_OFFSET(b,i))
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# define AT32_CAN2_FIR(b,i) (AT32_CAN2_BASE+AT32_CAN_FIR_OFFSET(b,i))
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#endif
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#endif
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/* Register Bitfield Definitions ********************************************/
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/* Register Bitfield Definitions ********************************************/
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@@ -646,13 +646,13 @@
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/* Capture/compare mode register 3 -- Output compare mode */
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/* Capture/compare mode register 3 -- Output compare mode */
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#define ATIM_CCMR3_OC5FE (1 << 2) /* Bit 2: Output Compare 5 Fast enable */
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#define ATIM_CCMR3_OC5FE (1 << 2) /* Bit 2: Output Compare 5 Fast enable */
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#define ATIM_CCMR3_OC5PE (1 << 3) /* Bit 3: Output Compare 5 Preload enable */
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#define ATIM_CCMR3_OC5PE (1 << 3) /* Bit 3: Output Compare 5 Preload enable */
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#define ATIM_CCMR3_OC5M_SHIFT (4) /* Bits 6-4: Output Compare 5 Mode */
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#define ATIM_CCMR3_OC5M_SHIFT (4) /* Bits 6-4: Output Compare 5 Mode */
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#define ATIM_CCMR3_OC5M_MASK (7 << ATIM_CCMR3_OC5M_SHIFT)
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#define ATIM_CCMR3_OC5M_MASK (7 << ATIM_CCMR3_OC5M_SHIFT)
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/* (See common (unshifted) bit field definitions below) */
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/* (See common (unshifted) bit field definitions below) */
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#define ATIM_CCMR3_OC5CE (1 << 7) /* Bit 7: Output Compare 5 Clear Enable */
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#define ATIM_CCMR3_OC5CE (1 << 7) /* Bit 7: Output Compare 5 Clear Enable */
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/* Capture/compare enable register */
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/* Capture/compare enable register */
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@@ -922,7 +922,7 @@
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/* Helpers for common configurations */
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/* Helpers for common configurations */
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#define GPIO_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE | PAD_CTL_DSE2)
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#define GPIO_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE | PAD_CTL_DSE2)
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#define UART_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PE)
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#define UART_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PE)
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#endif /* __ARCH_ARM_SRC_MX8MP_HARDWARE_MX8MP_PINMUX_H */
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#endif /* __ARCH_ARM_SRC_MX8MP_HARDWARE_MX8MP_PINMUX_H */
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@@ -198,7 +198,7 @@
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* board the AT32F437-MINI. The following definitions describe how NuttX
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* board the AT32F437-MINI. The following definitions describe how NuttX
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* controls the LEDs:
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* controls the LEDs:
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*
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*
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* SYMBOL Meaning LED state
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* SYMBOL Meaning LED state
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* LED1 LED2
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* LED1 LED2
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* ------------------- ----------------------- -------- --------
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* ------------------- ----------------------- -------- --------
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* LED_STARTED NuttX has been started OFF OFF
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* LED_STARTED NuttX has been started OFF OFF
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@@ -221,13 +221,11 @@
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#define LED_ASSERTION 2
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#define LED_ASSERTION 2
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#define LED_PANIC 3
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#define LED_PANIC 3
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/* USB */
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/* USB
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/**
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* pll clock = AT32_HCLK_FREQUENCY(288MHz)
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* pll clock = AT32_HCLK_FREQUENCY(288MHz)
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* usb clock use pll
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* usb clock use pll
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* usb_clk = 288/6 = 48MHz
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* usb_clk = 288/6 = 48MHz
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* **/
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*/
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||||||
#define USB_CONFIG_USBDIV (CRM_MISC2_USBDIV_6P0)
|
#define USB_CONFIG_USBDIV (CRM_MISC2_USBDIV_6P0)
|
||||||
|
|
||||||
/* USART1 */
|
/* USART1 */
|
||||||
@@ -254,9 +252,9 @@
|
|||||||
|
|
||||||
/* ETH */
|
/* ETH */
|
||||||
|
|
||||||
#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_1 //PB11
|
#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_1 /* PB11 */
|
||||||
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_1 //PB12
|
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_1 /* PB12 */
|
||||||
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1 //PB13
|
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1 /* PB13 */
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
|
|
||||||
|
|||||||
@@ -656,8 +656,8 @@
|
|||||||
|
|
||||||
/* (see nuttx/include/crypto/se05x.h */
|
/* (see nuttx/include/crypto/se05x.h */
|
||||||
|
|
||||||
#define _SEIOCVALID(c) (_IOC_TYPE(c)==_SEIOCBASE)
|
#define _SEIOCVALID(c) (_IOC_TYPE(c)==_SEIOCBASE)
|
||||||
#define _SEIOC(nr) _IOC(_SEIOCBASE,nr)
|
#define _SEIOC(nr) _IOC(_SEIOCBASE,nr)
|
||||||
|
|
||||||
/* syslog driver ioctl definitions ******************************************/
|
/* syslog driver ioctl definitions ******************************************/
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user