diff --git a/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h b/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h index 16bbdec7ab1..906e53dccb5 100644 --- a/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h +++ b/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/stm32l4/chip/stm32_pinmap.h + * arch/arm/src/stm32l4/chip/stm32l4_pinmap.h * * Copyright (C) 2015 Sebastien Lorquet. All rights reserved. * Author: Sebastien Lorquet diff --git a/arch/arm/src/stm32l4/stm32l4.h b/arch/arm/src/stm32l4/stm32l4.h index b19fd62c43b..fad620ad86a 100644 --- a/arch/arm/src/stm32l4/stm32l4.h +++ b/arch/arm/src/stm32l4/stm32l4.h @@ -57,7 +57,7 @@ #include "chip.h" #include "stm32l4_adc.h" -//#include "stm32_bkp.h" +//#include "stm32l4_bkp.h" #include "stm32l4_can.h" #include "stm32l4_dbgmcu.h" #include "stm32l4_dma.h" diff --git a/arch/arm/src/stm32l4/stm32l4_freerun.c b/arch/arm/src/stm32l4/stm32l4_freerun.c index 74fc952ef05..a11df0ba0ee 100644 --- a/arch/arm/src/stm32l4/stm32l4_freerun.c +++ b/arch/arm/src/stm32l4/stm32l4_freerun.c @@ -1,4 +1,4 @@ -/**************************************************************************** +s/**************************************************************************** * arch/arm/src/stm32l4/stm32l4_freerun.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. @@ -64,7 +64,7 @@ static struct stm32l4_freerun_s *g_freerun; ****************************************************************************/ /**************************************************************************** - * Name: stm32_freerun_handler + * Name: stm32l4_freerun_handler * * Description: * Timer interrupt callback. When the freerun timer counter overflows, @@ -81,7 +81,7 @@ static struct stm32l4_freerun_s *g_freerun; * ****************************************************************************/ -static int stm32_freerun_handler(int irq, void *context) +static int stm32l4_freerun_handler(int irq, void *context) { struct stm32l4_freerun_s *freerun = g_freerun; @@ -149,7 +149,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan, /* Set up to receive the callback when the counter overflow occurs */ - STM32L4_TIM_SETISR(freerun->tch, stm32_freerun_handler, 0); + STM32L4_TIM_SETISR(freerun->tch, stm32l4_freerun_handler, 0); /* Set timer period */ @@ -173,7 +173,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan, * Input Parameters: * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * stm32_freerun_initialize(); + * stm32l4_freerun_initialize(); * ts The location in which to return the time from the free-running * timer. * @@ -197,7 +197,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun, DEBUGASSERT(freerun && freerun->tch && ts); /* Temporarily disable the overflow counter. NOTE that we have to be - * careful here because stm32_tc_getpending() will reset the pending + * careful here because stm32l4_tc_getpending() will reset the pending * interrupt status. If we do not handle the overflow here then, it will * be lost. */ @@ -267,7 +267,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun, * Input Parameters: * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * stm32_freerun_initialize(); + * stm32l4_freerun_initialize(); * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/arch/arm/src/stm32l4/stm32l4_freerun.h b/arch/arm/src/stm32l4/stm32l4_freerun.h index 8b5e004d509..7d551978b4c 100644 --- a/arch/arm/src/stm32l4/stm32l4_freerun.h +++ b/arch/arm/src/stm32l4/stm32l4_freerun.h @@ -56,7 +56,7 @@ ****************************************************************************/ /* The freerun client must allocate an instance of this structure and called - * stm32_freerun_initialize() before using the freerun facilities. The client + * stm32l4_freerun_initialize() before using the freerun facilities. The client * should not access the contents of this structure directly since the * contents are subject to change. */ @@ -118,7 +118,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan, * Input Parameters: * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * stm32_freerun_initialize(); + * stm32l4_freerun_initialize(); * ts The location in which to return the time remaining on the * oneshot timer. * @@ -140,7 +140,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun, * Input Parameters: * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * stm32_freerun_initialize(); + * stm32l4_freerun_initialize(); * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/arch/arm/src/stm32l4/stm32l4_gpio.h b/arch/arm/src/stm32l4/stm32l4_gpio.h index 49f8c95fa5d..04dbc5679b1 100644 --- a/arch/arm/src/stm32l4/stm32l4_gpio.h +++ b/arch/arm/src/stm32l4/stm32l4_gpio.h @@ -268,7 +268,7 @@ EXTERN const uint32_t g_gpiobase[STM32L4_NPORTS]; * Description: * Configure a GPIO pin based on bit-encoded description of the pin. * Once it is configured as Alternative (GPIO_ALT|GPIO_CNF_AFPP|...) - * function, it must be unconfigured with stm32_unconfiggpio() with + * function, it must be unconfigured with stm32l4_unconfiggpio() with * the same cfgset first before it can be set to non-alternative function. * * Returns: diff --git a/arch/arm/src/stm32l4/stm32l4_rcc.c b/arch/arm/src/stm32l4/stm32l4_rcc.c index 34e6052eefe..599ed7c4cc8 100644 --- a/arch/arm/src/stm32l4/stm32l4_rcc.c +++ b/arch/arm/src/stm32l4/stm32l4_rcc.c @@ -140,7 +140,7 @@ static inline void rcc_resetbkp(void) ****************************************************************************/ /**************************************************************************** - * Name: stm32_clockconfig + * Name: stm32l4_clockconfig * * Description: * Called to establish the clock settings based on the values in board.h. diff --git a/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c index 558aa2533be..437faf54f13 100644 --- a/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c +++ b/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c @@ -57,7 +57,7 @@ * Pre-processor Definitions ****************************************************************************/ -#define STM32_NALARMS 2 +#define STM32L4_NALARMS 2 /**************************************************************************** * Private Types @@ -93,7 +93,7 @@ struct stm32l4_lowerhalf_s #ifdef CONFIG_RTC_ALARM /* Alarm callback information */ - struct stm32l4_cbinfo_s cbinfo[STM32_NALARMS]; + struct stm32l4_cbinfo_s cbinfo[STM32L4_NALARMS]; #endif }; @@ -200,7 +200,7 @@ static void stm32l4_alarm_callback(FAR void *arg, unsigned int alarmid) #endif /* CONFIG_RTC_ALARM */ /**************************************************************************** - * Name: stm32_rdtime + * Name: stm32l4_rdtime * * Description: * Implements the rdtime() method of the RTC driver interface diff --git a/arch/arm/src/stm32l4/stm32l4_rtcc.c b/arch/arm/src/stm32l4/stm32l4_rtcc.c index 390e104d726..d15a8981b48 100644 --- a/arch/arm/src/stm32l4/stm32l4_rtcc.c +++ b/arch/arm/src/stm32l4/stm32l4_rtcc.c @@ -685,7 +685,7 @@ static int rtchw_check_alrbwf(void) #endif /************************************************************************************ - * Name: stm32_rtchw_set_alrmXr X is a or b + * Name: stm32l4_rtchw_set_alrmXr X is a or b * * Description: * Set the alarm (A or B) hardware registers, using the required hardware access diff --git a/arch/arm/src/stm32l4/stm32l4_serial.c b/arch/arm/src/stm32l4/stm32l4_serial.c index f29a229992e..aa21ada61d5 100644 --- a/arch/arm/src/stm32l4/stm32l4_serial.c +++ b/arch/arm/src/stm32l4/stm32l4_serial.c @@ -1755,7 +1755,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) /* Configure TX as a GPIO output pin and Send a break signal*/ tx_break = GPIO_OUTPUT | (~(GPIO_MODE_MASK|GPIO_OUTPUT_SET) & priv->tx_gpio); - stm32_configgpio(tx_break); + stm32l4_configgpio(tx_break); leave_critical_section(flags); } @@ -1769,7 +1769,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) /* Configure TX back to U(S)ART */ - stm32_configgpio(priv->tx_gpio); + stm32l4_configgpio(priv->tx_gpio); priv->ie &= ~USART_CR1_IE_BREAK_INPROGRESS; diff --git a/arch/arm/src/stm32l4/stm32l4_tim.c b/arch/arm/src/stm32l4/stm32l4_tim.c index 8d273fce1bd..d4c560855c2 100644 --- a/arch/arm/src/stm32l4/stm32l4_tim.c +++ b/arch/arm/src/stm32l4/stm32l4_tim.c @@ -215,7 +215,7 @@ /* TIM Device Structure */ -struct stm32_tim_priv_s +struct stm32l4_tim_priv_s { const struct stm32l4_tim_ops_s *ops; stm32l4_tim_mode_t mode; @@ -228,163 +228,163 @@ struct stm32_tim_priv_s /* Register helpers */ -static inline uint16_t stm32_getreg16(FAR struct stm32l4_tim_dev_s *dev, +static inline uint16_t stm32l4_getreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset); -static inline void stm32_putreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, +static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint16_t value); -static inline void stm32_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, +static inline void stm32l4_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint16_t clearbits, uint16_t setbits); -static inline uint32_t stm32_getreg32(FAR struct stm32l4_tim_dev_s *dev, +static inline uint32_t stm32l4_getreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset); -static inline void stm32_putreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, +static inline void stm32l4_putreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint32_t value); /* Timer helpers */ -static void stm32_tim_reload_counter(FAR struct stm32l4_tim_dev_s *dev); -static void stm32_tim_enable(FAR struct stm32l4_tim_dev_s *dev); -static void stm32_tim_disable(FAR struct stm32l4_tim_dev_s *dev); -static void stm32_tim_reset(FAR struct stm32l4_tim_dev_s *dev); +static void stm32l4_tim_reload_counter(FAR struct stm32l4_tim_dev_s *dev); +static void stm32l4_tim_enable(FAR struct stm32l4_tim_dev_s *dev); +static void stm32l4_tim_disable(FAR struct stm32l4_tim_dev_s *dev); +static void stm32l4_tim_reset(FAR struct stm32l4_tim_dev_s *dev); #if defined(HAVE_TIM1_GPIOCONFIG)||defined(HAVE_TIM2_GPIOCONFIG)||\ defined(HAVE_TIM3_GPIOCONFIG)||defined(HAVE_TIM4_GPIOCONFIG)||\ defined(HAVE_TIM5_GPIOCONFIG)||defined(HAVE_TIM8_GPIOCONFIG) -static void stm32_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode); +static void stm32l4_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode); #endif /* Timer methods */ -static int stm32_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode_t mode); -static int stm32_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq); -static void stm32_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev, +static int stm32l4_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode_t mode); +static int stm32l4_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq); +static void stm32l4_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev, uint32_t period); -static uint32_t stm32_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev); -static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, +static uint32_t stm32l4_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev); +static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, stm32l4_tim_channel_t mode); -static int stm32_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, +static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, uint32_t compare); -static int stm32_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel); -static int stm32_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, +static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel); +static int stm32l4_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, int (*handler)(int irq, void *context), int source); -static void stm32_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, int source); -static void stm32_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, int source); -static void stm32_tim_ackint(FAR struct stm32l4_tim_dev_s *dev, int source); -static int stm32_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source); +static void stm32l4_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, int source); +static void stm32l4_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, int source); +static void stm32l4_tim_ackint(FAR struct stm32l4_tim_dev_s *dev, int source); +static int stm32l4_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source); /************************************************************************************ * Private Data ************************************************************************************/ -static const struct stm32l4_tim_ops_s stm32_tim_ops = +static const struct stm32l4_tim_ops_s stm32l4_tim_ops = { - .setmode = stm32_tim_setmode, - .setclock = stm32_tim_setclock, - .setperiod = stm32_tim_setperiod, - .getcounter = stm32_tim_getcounter, - .setchannel = stm32_tim_setchannel, - .setcompare = stm32_tim_setcompare, - .getcapture = stm32_tim_getcapture, - .setisr = stm32_tim_setisr, - .enableint = stm32_tim_enableint, - .disableint = stm32_tim_disableint, - .ackint = stm32_tim_ackint, - .checkint = stm32_tim_checkint, + .setmode = stm32l4_tim_setmode, + .setclock = stm32l4_tim_setclock, + .setperiod = stm32l4_tim_setperiod, + .getcounter = stm32l4_tim_getcounter, + .setchannel = stm32l4_tim_setchannel, + .setcompare = stm32l4_tim_setcompare, + .getcapture = stm32l4_tim_getcapture, + .setisr = stm32l4_tim_setisr, + .enableint = stm32l4_tim_enableint, + .disableint = stm32l4_tim_disableint, + .ackint = stm32l4_tim_ackint, + .checkint = stm32l4_tim_checkint, }; #ifdef CONFIG_STM32L4_TIM1 -struct stm32_tim_priv_s stm32_tim1_priv = +struct stm32l4_tim_priv_s stm32l4_tim1_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM1_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM2 -struct stm32_tim_priv_s stm32_tim2_priv = +struct stm32l4_tim_priv_s stm32l4_tim2_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM2_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM3 -struct stm32_tim_priv_s stm32_tim3_priv = +struct stm32l4_tim_priv_s stm32l4_tim3_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM3_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM4 -struct stm32_tim_priv_s stm32_tim4_priv = +struct stm32l4_tim_priv_s stm32l4_tim4_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM4_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM5 -struct stm32_tim_priv_s stm32_tim5_priv = +struct stm32l4_tim_priv_s stm32l4_tim5_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM5_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM6 -struct stm32_tim_priv_s stm32_tim6_priv = +struct stm32l4_tim_priv_s stm32l4_tim6_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM6_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM7 -struct stm32_tim_priv_s stm32_tim7_priv = +struct stm32l4_tim_priv_s stm32l4_tim7_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM7_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM8 -struct stm32_tim_priv_s stm32_tim8_priv = +struct stm32l4_tim_priv_s stm32l4_tim8_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM8_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM15 -struct stm32_tim_priv_s stm32_tim15_priv = +struct stm32l4_tim_priv_s stm32l4_tim15_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM15_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM16 -struct stm32_tim_priv_s stm32_tim16_priv = +struct stm32l4_tim_priv_s stm32l4_tim16_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM16_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM17 -struct stm32_tim_priv_s stm32_tim17_priv = +struct stm32l4_tim_priv_s stm32l4_tim17_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM17_BASE, }; @@ -395,50 +395,50 @@ struct stm32_tim_priv_s stm32_tim17_priv = ************************************************************************************/ /************************************************************************************ - * Name: stm32_getreg16 + * Name: stm32l4_getreg16 * * Description: * Get a 16-bit register value by offset * ************************************************************************************/ -static inline uint16_t stm32_getreg16(FAR struct stm32l4_tim_dev_s *dev, +static inline uint16_t stm32l4_getreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset) { - return getreg16(((struct stm32_tim_priv_s *)dev)->base + offset); + return getreg16(((struct stm32l4_tim_priv_s *)dev)->base + offset); } /************************************************************************************ - * Name: stm32_putreg16 + * Name: stm32l4_putreg16 * * Description: * Put a 16-bit register value by offset * ************************************************************************************/ -static inline void stm32_putreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, +static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint16_t value) { - putreg16(value, ((struct stm32_tim_priv_s *)dev)->base + offset); + putreg16(value, ((struct stm32l4_tim_priv_s *)dev)->base + offset); } /************************************************************************************ - * Name: stm32_modifyreg16 + * Name: stm32l4_modifyreg16 * * Description: * Modify a 16-bit register value by offset * ************************************************************************************/ -static inline void stm32_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, +static inline void stm32l4_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint16_t clearbits, uint16_t setbits) { - modifyreg16(((struct stm32_tim_priv_s *)dev)->base + offset, clearbits, setbits); + modifyreg16(((struct stm32l4_tim_priv_s *)dev)->base + offset, clearbits, setbits); } /************************************************************************************ - * Name: stm32_getreg32 + * Name: stm32l4_getreg32 * * Description: * Get a 32-bit register value by offset. This applies only for the STM32 F4 @@ -446,14 +446,14 @@ static inline void stm32_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, * ************************************************************************************/ -static inline uint32_t stm32_getreg32(FAR struct stm32l4_tim_dev_s *dev, +static inline uint32_t stm32l4_getreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset) { - return getreg32(((struct stm32_tim_priv_s *)dev)->base + offset); + return getreg32(((struct stm32l4_tim_priv_s *)dev)->base + offset); } /************************************************************************************ - * Name: stm32_putreg32 + * Name: stm32l4_putreg32 * * Description: * Put a 32-bit register value by offset. This applies only for the STM32 F4 @@ -461,87 +461,87 @@ static inline uint32_t stm32_getreg32(FAR struct stm32l4_tim_dev_s *dev, * ************************************************************************************/ -static inline void stm32_putreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, +static inline void stm32l4_putreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint32_t value) { - putreg32(value, ((struct stm32_tim_priv_s *)dev)->base + offset); + putreg32(value, ((struct stm32l4_tim_priv_s *)dev)->base + offset); } /************************************************************************************ - * Name: stm32_tim_reload_counter + * Name: stm32l4_tim_reload_counter ************************************************************************************/ -static void stm32_tim_reload_counter(FAR struct stm32l4_tim_dev_s *dev) +static void stm32l4_tim_reload_counter(FAR struct stm32l4_tim_dev_s *dev) { - uint16_t val = stm32_getreg16(dev, STM32L4_BTIM_EGR_OFFSET); + uint16_t val = stm32l4_getreg16(dev, STM32L4_BTIM_EGR_OFFSET); val |= ATIM_EGR_UG; - stm32_putreg16(dev, STM32L4_BTIM_EGR_OFFSET, val); + stm32l4_putreg16(dev, STM32L4_BTIM_EGR_OFFSET, val); } /************************************************************************************ - * Name: stm32_tim_enable + * Name: stm32l4_tim_enable ************************************************************************************/ -static void stm32_tim_enable(FAR struct stm32l4_tim_dev_s *dev) +static void stm32l4_tim_enable(FAR struct stm32l4_tim_dev_s *dev) { - uint16_t val = stm32_getreg16(dev, STM32L4_BTIM_CR1_OFFSET); + uint16_t val = stm32l4_getreg16(dev, STM32L4_BTIM_CR1_OFFSET); val |= ATIM_CR1_CEN; - stm32_tim_reload_counter(dev); - stm32_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); + stm32l4_tim_reload_counter(dev); + stm32l4_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); } /************************************************************************************ - * Name: stm32_tim_disable + * Name: stm32l4_tim_disable ************************************************************************************/ -static void stm32_tim_disable(FAR struct stm32l4_tim_dev_s *dev) +static void stm32l4_tim_disable(FAR struct stm32l4_tim_dev_s *dev) { - uint16_t val = stm32_getreg16(dev, STM32L4_BTIM_CR1_OFFSET); + uint16_t val = stm32l4_getreg16(dev, STM32L4_BTIM_CR1_OFFSET); val &= ~ATIM_CR1_CEN; - stm32_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); + stm32l4_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); } /************************************************************************************ - * Name: stm32_tim_reset + * Name: stm32l4_tim_reset * * Description: * Reset timer into system default state, but do not affect output/input pins * ************************************************************************************/ -static void stm32_tim_reset(FAR struct stm32l4_tim_dev_s *dev) +static void stm32l4_tim_reset(FAR struct stm32l4_tim_dev_s *dev) { - ((struct stm32_tim_priv_s *)dev)->mode = STM32L4_TIM_MODE_DISABLED; - stm32_tim_disable(dev); + ((struct stm32l4_tim_priv_s *)dev)->mode = STM32L4_TIM_MODE_DISABLED; + stm32l4_tim_disable(dev); } /************************************************************************************ - * Name: stm32_tim_gpioconfig + * Name: stm32l4_tim_gpioconfig ************************************************************************************/ #if defined(HAVE_TIM1_GPIOCONFIG)||defined(HAVE_TIM2_GPIOCONFIG)||\ defined(HAVE_TIM3_GPIOCONFIG)||defined(HAVE_TIM4_GPIOCONFIG)||\ defined(HAVE_TIM5_GPIOCONFIG)||defined(HAVE_TIM8_GPIOCONFIG) -static void stm32_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode) +static void stm32l4_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode) { /* TODO: Add support for input capture and bipolar dual outputs for TIM8 */ if (mode & STM32L4_TIM_CH_MODE_MASK) { - stm32_configgpio(cfg); + stm32l4_configgpio(cfg); } else { - stm32_unconfiggpio(cfg); + stm32l4_unconfiggpio(cfg); } } #endif /************************************************************************************ - * Name: stm32_tim_setmode + * Name: stm32l4_tim_setmode ************************************************************************************/ -static int stm32_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode_t mode) +static int stm32l4_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode_t mode) { uint16_t val = ATIM_CR1_CEN | ATIM_CR1_ARPE; @@ -552,10 +552,10 @@ static int stm32_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode */ #if STM32L4_NBTIM > 0 - if (((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM6_BASE + if (((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM6_BASE #endif #if STM32L4_NBTIM > 1 - || ((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM7_BASE + || ((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM7_BASE #endif #if STM32L4_NBTIM > 0 ) @@ -591,16 +591,16 @@ static int stm32_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode return -EINVAL; } - stm32_tim_reload_counter(dev); - stm32_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); + stm32l4_tim_reload_counter(dev); + stm32l4_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); #if STM32L4_NATIM > 0 /* Advanced registers require Main Output Enable */ - if (((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM1_BASE || - ((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM8_BASE) + if (((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM1_BASE || + ((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM8_BASE) { - stm32_modifyreg16(dev, STM32L4_ATIM_BDTR_OFFSET, 0, ATIM_BDTR_MOE); + stm32l4_modifyreg16(dev, STM32L4_ATIM_BDTR_OFFSET, 0, ATIM_BDTR_MOE); } #endif @@ -608,10 +608,10 @@ static int stm32_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode } /************************************************************************************ - * Name: stm32_tim_setclock + * Name: stm32l4_tim_setclock ************************************************************************************/ -static int stm32_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq) +static int stm32l4_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq) { uint32_t freqin; int prescaler; @@ -622,7 +622,7 @@ static int stm32_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq) if (freq == 0) { - stm32_tim_disable(dev); + stm32l4_tim_disable(dev); return 0; } @@ -632,7 +632,7 @@ static int stm32_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq) * must be defined in the board.h header file. */ - switch (((struct stm32_tim_priv_s *)dev)->base) + switch (((struct stm32l4_tim_priv_s *)dev)->base) { #ifdef CONFIG_STM32L4_TIM1 case STM32L4_TIM1_BASE: @@ -716,44 +716,44 @@ static int stm32_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq) prescaler = 0xffff; } - stm32_putreg16(dev, STM32L4_BTIM_PSC_OFFSET, prescaler); - stm32_tim_enable(dev); + stm32l4_putreg16(dev, STM32L4_BTIM_PSC_OFFSET, prescaler); + stm32l4_tim_enable(dev); return prescaler; } /************************************************************************************ - * Name: stm32_tim_setperiod + * Name: stm32l4_tim_setperiod ************************************************************************************/ -static void stm32_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev, +static void stm32l4_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev, uint32_t period) { DEBUGASSERT(dev != NULL); - stm32_putreg32(dev, STM32L4_BTIM_ARR_OFFSET, period); + stm32l4_putreg32(dev, STM32L4_BTIM_ARR_OFFSET, period); } /************************************************************************************ - * Name: stm32_tim_getcounter + * Name: stm32l4_tim_getcounter ************************************************************************************/ -static uint32_t stm32_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev) +static uint32_t stm32l4_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev) { DEBUGASSERT(dev != NULL); - return stm32_getreg32(dev, STM32L4_BTIM_CNT_OFFSET); + return stm32l4_getreg32(dev, STM32L4_BTIM_CNT_OFFSET); } /************************************************************************************ - * Name: stm32_tim_setchannel + * Name: stm32l4_tim_setchannel ************************************************************************************/ -static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, +static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, stm32l4_tim_channel_t mode) { uint16_t ccmr_orig = 0; uint16_t ccmr_val = 0; uint16_t ccmr_mask = 0xff; - uint16_t ccer_val = stm32_getreg16(dev, STM32L4_GTIM_CCER_OFFSET); + uint16_t ccer_val = stm32l4_getreg16(dev, STM32L4_GTIM_CCER_OFFSET); uint8_t ccmr_offset = STM32L4_GTIM_CCMR1_OFFSET; DEBUGASSERT(dev != NULL); @@ -774,10 +774,10 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann */ #if STM32L4_NBTIM > 0 - if (((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM6_BASE + if (((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM6_BASE #endif #if STM32L4_NBTIM > 1 - || ((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM7_BASE + || ((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM7_BASE #endif #if STM32L4_NBTIM > 0 ) @@ -822,15 +822,15 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann ccmr_offset = STM32L4_GTIM_CCMR2_OFFSET; } - ccmr_orig = stm32_getreg16(dev, ccmr_offset); + ccmr_orig = stm32l4_getreg16(dev, ccmr_offset); ccmr_orig &= ~ccmr_mask; ccmr_orig |= ccmr_val; - stm32_putreg16(dev, ccmr_offset, ccmr_orig); - stm32_putreg16(dev, STM32L4_GTIM_CCER_OFFSET, ccer_val); + stm32l4_putreg16(dev, ccmr_offset, ccmr_orig); + stm32l4_putreg16(dev, STM32L4_GTIM_CCER_OFFSET, ccer_val); /* set GPIO */ - switch (((struct stm32_tim_priv_s *)dev)->base) + switch (((struct stm32l4_tim_priv_s *)dev)->base) { #ifdef CONFIG_STM32L4_TIM1 case STM32L4_TIM1_BASE: @@ -838,19 +838,19 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM1_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break; #endif #if defined(GPIO_TIM1_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break; #endif #if defined(GPIO_TIM1_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break; #endif #if defined(GPIO_TIM1_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break; #endif default: return -EINVAL; @@ -863,22 +863,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM2_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM2_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM2_CH1OUT, mode); break; #endif #if defined(GPIO_TIM2_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM2_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM2_CH2OUT, mode); break; #endif #if defined(GPIO_TIM2_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM2_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM2_CH3OUT, mode); break; #endif #if defined(GPIO_TIM2_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM2_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM2_CH4OUT, mode); break; #endif default: @@ -892,22 +892,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM3_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM3_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM3_CH1OUT, mode); break; #endif #if defined(GPIO_TIM3_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM3_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM3_CH2OUT, mode); break; #endif #if defined(GPIO_TIM3_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM3_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM3_CH3OUT, mode); break; #endif #if defined(GPIO_TIM3_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM3_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM3_CH4OUT, mode); break; #endif default: @@ -921,22 +921,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM4_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM4_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM4_CH1OUT, mode); break; #endif #if defined(GPIO_TIM4_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM4_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM4_CH2OUT, mode); break; #endif #if defined(GPIO_TIM4_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM4_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM4_CH3OUT, mode); break; #endif #if defined(GPIO_TIM4_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM4_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM4_CH4OUT, mode); break; #endif default: @@ -950,22 +950,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM5_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM5_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM5_CH1OUT, mode); break; #endif #if defined(GPIO_TIM5_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM5_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM5_CH2OUT, mode); break; #endif #if defined(GPIO_TIM5_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM5_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM5_CH3OUT, mode); break; #endif #if defined(GPIO_TIM5_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM5_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM5_CH4OUT, mode); break; #endif default: @@ -979,19 +979,19 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM8_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM8_CH1OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM8_CH1OUT, mode); break; #endif #if defined(GPIO_TIM8_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM8_CH2OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM8_CH2OUT, mode); break; #endif #if defined(GPIO_TIM8_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM8_CH3OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM8_CH3OUT, mode); break; #endif #if defined(GPIO_TIM8_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM8_CH4OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM8_CH4OUT, mode); break; #endif default: return -EINVAL; @@ -1004,22 +1004,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM15_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM15_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM15_CH1OUT, mode); break; #endif #if defined(GPIO_TIM15_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM15_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM15_CH2OUT, mode); break; #endif #if defined(GPIO_TIM15_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM15_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM15_CH3OUT, mode); break; #endif #if defined(GPIO_TIM15_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM15_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM15_CH4OUT, mode); break; #endif default: @@ -1033,22 +1033,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM16_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM16_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM16_CH1OUT, mode); break; #endif #if defined(GPIO_TIM16_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM16_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM16_CH2OUT, mode); break; #endif #if defined(GPIO_TIM16_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM16_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM16_CH3OUT, mode); break; #endif #if defined(GPIO_TIM16_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM16_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM16_CH4OUT, mode); break; #endif default: @@ -1062,22 +1062,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM17_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM17_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM17_CH1OUT, mode); break; #endif #if defined(GPIO_TIM17_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM17_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM17_CH2OUT, mode); break; #endif #if defined(GPIO_TIM17_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM17_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM17_CH3OUT, mode); break; #endif #if defined(GPIO_TIM17_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM17_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM17_CH4OUT, mode); break; #endif default: @@ -1093,10 +1093,10 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann } /************************************************************************************ - * Name: stm32_tim_setcompare + * Name: stm32l4_tim_setcompare ************************************************************************************/ -static int stm32_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, +static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, uint32_t compare) { DEBUGASSERT(dev != NULL); @@ -1104,16 +1104,16 @@ static int stm32_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann switch (channel) { case 1: - stm32_putreg32(dev, STM32L4_GTIM_CCR1_OFFSET, compare); + stm32l4_putreg32(dev, STM32L4_GTIM_CCR1_OFFSET, compare); break; case 2: - stm32_putreg32(dev, STM32L4_GTIM_CCR2_OFFSET, compare); + stm32l4_putreg32(dev, STM32L4_GTIM_CCR2_OFFSET, compare); break; case 3: - stm32_putreg32(dev, STM32L4_GTIM_CCR3_OFFSET, compare); + stm32l4_putreg32(dev, STM32L4_GTIM_CCR3_OFFSET, compare); break; case 4: - stm32_putreg32(dev, STM32L4_GTIM_CCR4_OFFSET, compare); + stm32l4_putreg32(dev, STM32L4_GTIM_CCR4_OFFSET, compare); break; default: return -EINVAL; @@ -1122,33 +1122,33 @@ static int stm32_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann } /************************************************************************************ - * Name: stm32_tim_getcapture + * Name: stm32l4_tim_getcapture ************************************************************************************/ -static int stm32_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel) +static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel) { DEBUGASSERT(dev != NULL); switch (channel) { case 1: - return stm32_getreg32(dev, STM32L4_GTIM_CCR1_OFFSET); + return stm32l4_getreg32(dev, STM32L4_GTIM_CCR1_OFFSET); case 2: - return stm32_getreg32(dev, STM32L4_GTIM_CCR2_OFFSET); + return stm32l4_getreg32(dev, STM32L4_GTIM_CCR2_OFFSET); case 3: - return stm32_getreg32(dev, STM32L4_GTIM_CCR3_OFFSET); + return stm32l4_getreg32(dev, STM32L4_GTIM_CCR3_OFFSET); case 4: - return stm32_getreg32(dev, STM32L4_GTIM_CCR4_OFFSET); + return stm32l4_getreg32(dev, STM32L4_GTIM_CCR4_OFFSET); } return -EINVAL; } /************************************************************************************ - * Name: stm32_tim_setisr + * Name: stm32l4_tim_setisr ************************************************************************************/ -static int stm32_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, +static int stm32l4_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, int (*handler)(int irq, void *context), int source) { @@ -1157,7 +1157,7 @@ static int stm32_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, DEBUGASSERT(dev != NULL); DEBUGASSERT(source == 0); - switch (((struct stm32_tim_priv_s *)dev)->base) + switch (((struct stm32l4_tim_priv_s *)dev)->base) { #ifdef CONFIG_STM32L4_TIM1 case STM32L4_TIM1_BASE: @@ -1243,41 +1243,41 @@ static int stm32_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, } /************************************************************************************ - * Name: stm32_tim_enableint + * Name: stm32l4_tim_enableint ************************************************************************************/ -static void stm32_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, int source) +static void stm32l4_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, int source) { DEBUGASSERT(dev != NULL); - stm32_modifyreg16(dev, STM32L4_BTIM_DIER_OFFSET, 0, ATIM_DIER_UIE); + stm32l4_modifyreg16(dev, STM32L4_BTIM_DIER_OFFSET, 0, ATIM_DIER_UIE); } /************************************************************************************ - * Name: stm32_tim_disableint + * Name: stm32l4_tim_disableint ************************************************************************************/ -static void stm32_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, int source) +static void stm32l4_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, int source) { DEBUGASSERT(dev != NULL); - stm32_modifyreg16(dev, STM32L4_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0); + stm32l4_modifyreg16(dev, STM32L4_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0); } /************************************************************************************ - * Name: stm32_tim_ackint + * Name: stm32l4_tim_ackint ************************************************************************************/ -static void stm32_tim_ackint(FAR struct stm32l4_tim_dev_s *dev, int source) +static void stm32l4_tim_ackint(FAR struct stm32l4_tim_dev_s *dev, int source) { - stm32_putreg16(dev, STM32L4_BTIM_SR_OFFSET, ~ATIM_SR_UIF); + stm32l4_putreg16(dev, STM32L4_BTIM_SR_OFFSET, ~ATIM_SR_UIF); } /************************************************************************************ - * Name: stm32_tim_checkint + * Name: stm32l4_tim_checkint ************************************************************************************/ -static int stm32_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source) +static int stm32l4_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source) { - uint16_t regval = stm32_getreg16(dev, STM32L4_BTIM_SR_OFFSET); + uint16_t regval = stm32l4_getreg16(dev, STM32L4_BTIM_SR_OFFSET); return (regval & ATIM_SR_UIF) ? 1 : 0; } @@ -1286,7 +1286,7 @@ static int stm32_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source) ************************************************************************************/ /************************************************************************************ - * Name: stm32_tim_init + * Name: stm32l4_tim_init ************************************************************************************/ FAR struct stm32l4_tim_dev_s *stm32l4_tim_init(int timer) @@ -1299,67 +1299,67 @@ FAR struct stm32l4_tim_dev_s *stm32l4_tim_init(int timer) { #ifdef CONFIG_STM32L4_TIM1 case 1: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim1_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim1_priv; modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN); break; #endif #ifdef CONFIG_STM32L4_TIM2 case 2: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim2_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim2_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM2EN); break; #endif #ifdef CONFIG_STM32L4_TIM3 case 3: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim3_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim3_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM3EN); break; #endif #ifdef CONFIG_STM32L4_TIM4 case 4: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim4_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim4_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM4EN); break; #endif #ifdef CONFIG_STM32L4_TIM5 case 5: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim5_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim5_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM5EN); break; #endif #ifdef CONFIG_STM32L4_TIM6 case 6: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim6_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim6_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM6EN); break; #endif #ifdef CONFIG_STM32L4_TIM7 case 7: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim7_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim7_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM7EN); break; #endif #ifdef CONFIG_STM32L4_TIM8 case 8: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim8_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim8_priv; modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM8EN); break; #endif #ifdef CONFIG_STM32L4_TIM15 case 15: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim15_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim15_priv; modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM15EN); break; #endif #ifdef CONFIG_STM32L4_TIM16 case 16: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim16_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim16_priv; modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM16EN); break; #endif #ifdef CONFIG_STM32L4_TIM17 case 17: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim17_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim17_priv; modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM17EN); break; #endif @@ -1369,12 +1369,12 @@ FAR struct stm32l4_tim_dev_s *stm32l4_tim_init(int timer) /* Is device already allocated */ - if (((struct stm32_tim_priv_s *)dev)->mode != STM32L4_TIM_MODE_UNUSED) + if (((struct stm32l4_tim_priv_s *)dev)->mode != STM32L4_TIM_MODE_UNUSED) { return NULL; } - stm32_tim_reset(dev); + stm32l4_tim_reset(dev); return dev; } @@ -1392,7 +1392,7 @@ int stm32l4_tim_deinit(FAR struct stm32l4_tim_dev_s * dev) /* Disable power */ - switch (((struct stm32_tim_priv_s *)dev)->base) + switch (((struct stm32l4_tim_priv_s *)dev)->base) { #ifdef CONFIG_STM32L4_TIM1 case STM32L4_TIM1_BASE: @@ -1455,7 +1455,7 @@ int stm32l4_tim_deinit(FAR struct stm32l4_tim_dev_s * dev) /* Mark it as free */ - ((struct stm32_tim_priv_s *)dev)->mode = STM32L4_TIM_MODE_UNUSED; + ((struct stm32l4_tim_priv_s *)dev)->mode = STM32L4_TIM_MODE_UNUSED; return OK; } diff --git a/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c index 5a7639cb3a8..7fff996234c 100644 --- a/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c +++ b/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c @@ -87,7 +87,7 @@ * timer_lowerhalf_s structure. */ -struct stm32_lowerhalf_s +struct stm32l4_lowerhalf_s { FAR const struct timer_ops_s *ops; /* Lower half operations */ FAR struct stm32l4_tim_dev_s *tim; /* stm32 timer driver */ @@ -104,48 +104,48 @@ struct stm32_lowerhalf_s /* Interrupt handling *******************************************************/ #ifdef CONFIG_STM32L4_TIM1 -static int stm32_tim1_interrupt(int irq, FAR void *context); +static int stm32l4_tim1_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM2 -static int stm32_tim2_interrupt(int irq, FAR void *context); +static int stm32l4_tim2_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM3 -static int stm32_tim3_interrupt(int irq, FAR void *context); +static int stm32l4_tim3_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM4 -static int stm32_tim4_interrupt(int irq, FAR void *context); +static int stm32l4_tim4_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM5 -static int stm32_tim5_interrupt(int irq, FAR void *context); +static int stm32l4_tim5_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM6 -static int stm32_tim6_interrupt(int irq, FAR void *context); +static int stm32l4_tim6_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM7 -static int stm32_tim7_interrupt(int irq, FAR void *context); +static int stm32l4_tim7_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM8 -static int stm32_tim8_interrupt(int irq, FAR void *context); +static int stm32l4_tim8_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM15 -static int stm32_tim15_interrupt(int irq, FAR void *context); +static int stm32l4_tim15_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM16 -static int stm32_tim16_interrupt(int irq, FAR void *context); +static int stm32l4_tim16_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM17 -static int stm32_tim17_interrupt(int irq, FAR void *context); +static int stm32l4_tim17_interrupt(int irq, FAR void *context); #endif -static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower); +static int stm32l4_timer_handler(FAR struct stm32l4_lowerhalf_s *lower); /* "Lower half" driver methods **********************************************/ -static int stm32_start(FAR struct timer_lowerhalf_s *lower); -static int stm32_stop(FAR struct timer_lowerhalf_s *lower); -static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, +static int stm32l4_start(FAR struct timer_lowerhalf_s *lower); +static int stm32l4_stop(FAR struct timer_lowerhalf_s *lower); +static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeout); -static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower, +static tccb_t stm32l4_sethandler(FAR struct timer_lowerhalf_s *lower, tccb_t handler); /**************************************************************************** @@ -155,109 +155,109 @@ static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower, static const struct timer_ops_s g_timer_ops = { - .start = stm32_start, - .stop = stm32_stop, + .start = stm32l4_start, + .stop = stm32l4_stop, .getstatus = NULL, - .settimeout = stm32_settimeout, - .sethandler = stm32_sethandler, + .settimeout = stm32l4_settimeout, + .sethandler = stm32l4_sethandler, .ioctl = NULL, }; #ifdef CONFIG_STM32L4_TIM1 -static struct stm32_lowerhalf_s g_tim1_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim1_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim1_interrupt, + .timhandler = stm32l4_tim1_interrupt, .resolution = STM32L4_TIM1_RES, }; #endif #ifdef CONFIG_STM32L4_TIM2 -static struct stm32_lowerhalf_s g_tim2_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim2_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim2_interrupt, + .timhandler = stm32l4_tim2_interrupt, .resolution = STM32L4_TIM2_RES, }; #endif #ifdef CONFIG_STM32L4_TIM3 -static struct stm32_lowerhalf_s g_tim3_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim3_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim3_interrupt, + .timhandler = stm32l4_tim3_interrupt, .resolution = STM32L4_TIM3_RES, }; #endif #ifdef CONFIG_STM32L4_TIM4 -static struct stm32_lowerhalf_s g_tim4_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim4_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim4_interrupt, + .timhandler = stm32l4_tim4_interrupt, .resolution = STM32L4_TIM4_RES, }; #endif #ifdef CONFIG_STM32L4_TIM5 -static struct stm32_lowerhalf_s g_tim5_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim5_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim5_interrupt, + .timhandler = stm32l4_tim5_interrupt, .resolution = STM32L4_TIM5_RES, }; #endif #ifdef CONFIG_STM32L4_TIM6 -static struct stm32_lowerhalf_s g_tim6_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim6_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim6_interrupt, + .timhandler = stm32l4_tim6_interrupt, .resolution = STM32L4_TIM6_RES, }; #endif #ifdef CONFIG_STM32L4_TIM7 -static struct stm32_lowerhalf_s g_tim7_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim7_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim7_interrupt, + .timhandler = stm32l4_tim7_interrupt, .resolution = STM32L4_TIM7_RES, }; #endif #ifdef CONFIG_STM32L4_TIM8 -static struct stm32_lowerhalf_s g_tim8_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim8_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim8_interrupt, + .timhandler = stm32l4_tim8_interrupt, .resolution = STM32L4_TIM8_RES, }; #endif #ifdef CONFIG_STM32L4_TIM15 -static struct stm32_lowerhalf_s g_tim15_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim15_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim15_interrupt, + .timhandler = stm32l4_tim15_interrupt, .resolution = STM32L4_TIM15_RES, }; #endif #ifdef CONFIG_STM32L4_TIM16 -static struct stm32_lowerhalf_s g_tim16_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim16_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim16_interrupt, + .timhandler = stm32l4_tim16_interrupt, .resolution = STM32L4_TIM16_RES, }; #endif #ifdef CONFIG_STM32L4_TIM17 -static struct stm32_lowerhalf_s g_tim17_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim17_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim17_interrupt, + .timhandler = stm32l4_tim17_interrupt, .resolution = STM32L4_TIM17_RES, }; #endif @@ -267,7 +267,7 @@ static struct stm32_lowerhalf_s g_tim17_lowerhalf = ****************************************************************************/ /**************************************************************************** - * Name: stm32_timN_interrupt, N=1..14 + * Name: stm32l4_timN_interrupt, N=1..14 * * Description: * Individual interrupt handlers for each timer @@ -275,84 +275,84 @@ static struct stm32_lowerhalf_s g_tim17_lowerhalf = ****************************************************************************/ #ifdef CONFIG_STM32L4_TIM1 -static int stm32_tim1_interrupt(int irq, FAR void *context) +static int stm32l4_tim1_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim1_lowerhalf); + return stm32l4_timer_handler(&g_tim1_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM2 -static int stm32_tim2_interrupt(int irq, FAR void *context) +static int stm32l4_tim2_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim2_lowerhalf); + return stm32l4_timer_handler(&g_tim2_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM3 -static int stm32_tim3_interrupt(int irq, FAR void *context) +static int stm32l4_tim3_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim3_lowerhalf); + return stm32l4_timer_handler(&g_tim3_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM4 -static int stm32_tim4_interrupt(int irq, FAR void *context) +static int stm32l4_tim4_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim4_lowerhalf); + return stm32l4_timer_handler(&g_tim4_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM5 -static int stm32_tim5_interrupt(int irq, FAR void *context) +static int stm32l4_tim5_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim5_lowerhalf); + return stm32l4_timer_handler(&g_tim5_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM6 -static int stm32_tim6_interrupt(int irq, FAR void *context) +static int stm32l4_tim6_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim6_lowerhalf); + return stm32l4_timer_handler(&g_tim6_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM7 -static int stm32_tim7_interrupt(int irq, FAR void *context) +static int stm32l4_tim7_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim7_lowerhalf); + return stm32l4_timer_handler(&g_tim7_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM8 -static int stm32_tim8_interrupt(int irq, FAR void *context) +static int stm32l4_tim8_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim8_lowerhalf); + return stm32l4_timer_handler(&g_tim8_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM15 -static int stm32_tim15_interrupt(int irq, FAR void *context) +static int stm32l4_tim15_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim15_lowerhalf); + return stm32l4_timer_handler(&g_tim15_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM16 -static int stm32_tim16_interrupt(int irq, FAR void *context) +static int stm32l4_tim16_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim16_lowerhalf); + return stm32l4_timer_handler(&g_tim16_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM17 -static int stm32_tim17_interrupt(int irq, FAR void *context) +static int stm32l4_tim17_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim17_lowerhalf); + return stm32l4_timer_handler(&g_tim17_lowerhalf); } #endif /**************************************************************************** - * Name: stm32_timer_handler + * Name: stm32l4_timer_handler * * Description: * timer interrupt handler @@ -363,7 +363,7 @@ static int stm32_tim17_interrupt(int irq, FAR void *context) * ****************************************************************************/ -static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower) +static int stm32l4_timer_handler(FAR struct stm32l4_lowerhalf_s *lower) { uint32_t next_interval_us = 0; @@ -378,14 +378,14 @@ static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower) } else { - stm32_stop((struct timer_lowerhalf_s *)lower); + stm32l4_stop((struct timer_lowerhalf_s *)lower); } return OK; } /**************************************************************************** - * Name: stm32_start + * Name: stm32l4_start * * Description: * Start the timer, resetting the time to the current timeout, @@ -399,9 +399,9 @@ static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower) * ****************************************************************************/ -static int stm32_start(FAR struct timer_lowerhalf_s *lower) +static int stm32l4_start(FAR struct timer_lowerhalf_s *lower) { - FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; + FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; if (!priv->started) { @@ -423,7 +423,7 @@ static int stm32_start(FAR struct timer_lowerhalf_s *lower) } /**************************************************************************** - * Name: stm32_stop + * Name: stm32l4_stop * * Description: * Stop the timer @@ -437,9 +437,9 @@ static int stm32_start(FAR struct timer_lowerhalf_s *lower) * ****************************************************************************/ -static int stm32_stop(struct timer_lowerhalf_s *lower) +static int stm32l4_stop(struct timer_lowerhalf_s *lower) { - struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower; + struct stm32l4_lowerhalf_s *priv = (struct stm32l4_lowerhalf_s *)lower; if (priv->started) { @@ -456,7 +456,7 @@ static int stm32_stop(struct timer_lowerhalf_s *lower) } /**************************************************************************** - * Name: stm32_settimeout + * Name: stm32l4_settimeout * * Description: * Set a new timeout value (and reset the timer) @@ -471,9 +471,9 @@ static int stm32_stop(struct timer_lowerhalf_s *lower) * ****************************************************************************/ -static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeout) +static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeout) { - FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; + FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; uint64_t maxtimeout; if (priv->started) @@ -498,7 +498,7 @@ static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeou } /**************************************************************************** - * Name: stm32_sethandler + * Name: stm32l4_sethandler * * Description: * Call this user provided timeout handler. @@ -516,10 +516,10 @@ static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeou * ****************************************************************************/ -static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower, +static tccb_t stm32l4_sethandler(FAR struct timer_lowerhalf_s *lower, tccb_t newhandler) { - FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; + FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; irqstate_t flags = enter_critical_section(); @@ -570,7 +570,7 @@ static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower, int stm32l4_timer_initialize(FAR const char *devpath, int timer) { - FAR struct stm32_lowerhalf_s *lower; + FAR struct stm32l4_lowerhalf_s *lower; switch (timer) {