diff --git a/arch/arm/src/armv7-m/barriers.h b/arch/arm/src/armv7-m/barriers.h
new file mode 100644
index 00000000000..89c672211b4
--- /dev/null
+++ b/arch/arm/src/armv7-m/barriers.h
@@ -0,0 +1,57 @@
+/************************************************************************************
+ * arch/arm/src/armv7-m/barriers.h
+ *
+ *   Copyright (C) 2019 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H
+#define __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* ARMv7-M memory barriers */
+
+#define arm_isb(n) __asm__ __volatile__ ("isb " #n : : : "memory")
+#define arm_dsb(n) __asm__ __volatile__ ("dsb " #n : : : "memory")
+#define arm_dmb(n) __asm__ __volatile__ ("dmb " #n : : : "memory")
+
+#define ARM_DSB()  arm_dsb(15)
+#define ARM_ISB()  arm_isb(15)
+#define ARM_DMB()  arm_dmb(15)
+
+#endif  /* __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H */
diff --git a/arch/arm/src/armv7-m/up_cache.c b/arch/arm/src/armv7-m/up_cache.c
index a168d0f35df..03416e1afeb 100644
--- a/arch/arm/src/armv7-m/up_cache.c
+++ b/arch/arm/src/armv7-m/up_cache.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv7-m/up_cache.c
  *
- *   Copyright (C) 2015, 2018 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2018-2019 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *           Bob Feretich <bob.feretich@rafresearch.com>
  *
@@ -47,6 +47,7 @@
 #include <nuttx/cache.h>
 
 #include "up_arch.h"
+#include "barriers.h"
 #include "nvic.h"
 
 /****************************************************************************
@@ -71,16 +72,6 @@
 #define CCSIDR_LSSHIFT(n) \
   (((n) & NVIC_CCSIDR_LINESIZE_MASK) >> NVIC_CCSIDR_LINESIZE_SHIFT)
 
-/* intrinsics are used in these inline functions */
-
-#define arm_isb(n) __asm__ __volatile__ ("isb " #n : : : "memory")
-#define arm_dsb(n) __asm__ __volatile__ ("dsb " #n : : : "memory")
-#define arm_dmb(n) __asm__ __volatile__ ("dmb " #n : : : "memory")
-
-#define ARM_DSB()  arm_dsb(15)
-#define ARM_ISB()  arm_isb(15)
-#define ARM_DMB()  arm_dmb(15)
-
 /****************************************************************************
  * Inline Functions
  ****************************************************************************/
diff --git a/arch/arm/src/imxrt/imxrt_mpuinit.c b/arch/arm/src/imxrt/imxrt_mpuinit.c
index b428bc9a35b..85b3a59116c 100644
--- a/arch/arm/src/imxrt/imxrt_mpuinit.c
+++ b/arch/arm/src/imxrt/imxrt_mpuinit.c
@@ -44,6 +44,8 @@
 #include <nuttx/userspace.h>
 
 #include "mpu.h"
+#include "barriers.h"
+
 #include "chip/imxrt_memorymap.h"
 
 #include "imxrt_mpuinit.h"
diff --git a/arch/arm/src/imxrt/imxrt_start.c b/arch/arm/src/imxrt/imxrt_start.c
index 0247d8113fa..4a4edfb4880 100644
--- a/arch/arm/src/imxrt/imxrt_start.c
+++ b/arch/arm/src/imxrt/imxrt_start.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/imxrt/imxrt_start.c
  *
- *   Copyright (C) 2018 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2018, 2019 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,6 +49,7 @@
 
 #include "up_arch.h"
 #include "up_internal.h"
+#include "barriers.h"
 
 #ifdef CONFIG_ARCH_FPU
 #  include "nvic.h"
diff --git a/arch/arm/src/nrf52/nrf52_nvmc.c b/arch/arm/src/nrf52/nrf52_nvmc.c
index 8b5d3d1ef62..9c17f048fe8 100644
--- a/arch/arm/src/nrf52/nrf52_nvmc.c
+++ b/arch/arm/src/nrf52/nrf52_nvmc.c
@@ -45,6 +45,8 @@
 #include <nuttx/config.h>
 #include <stdbool.h>
 
+#include "barriers.h"
+
 #include "chip/nrf52_ficr.h"
 #include "chip/nrf52_nvmc.h"
 #include "nrf52_nvmc.h"
diff --git a/arch/arm/src/samv7/sam_mpuinit.c b/arch/arm/src/samv7/sam_mpuinit.c
index 4b2d67716b6..59f48fca5ee 100644
--- a/arch/arm/src/samv7/sam_mpuinit.c
+++ b/arch/arm/src/samv7/sam_mpuinit.c
@@ -44,6 +44,8 @@
 #include <nuttx/userspace.h>
 
 #include "mpu.h"
+#include "barriers.h"
+
 #include "chip/sam_memorymap.h"
 
 #include "sam_mpuinit.h"
diff --git a/arch/arm/src/samv7/sam_progmem.c b/arch/arm/src/samv7/sam_progmem.c
index 991cee2b550..48c2e78a64f 100644
--- a/arch/arm/src/samv7/sam_progmem.c
+++ b/arch/arm/src/samv7/sam_progmem.c
@@ -47,6 +47,8 @@
 #include <arch/samv7/chip.h>
 
 #include "up_arch.h"
+#include "barriers.h"
+
 #include "chip/sam_memorymap.h"
 
 #include "sam_progmem.h"
diff --git a/arch/arm/src/samv7/sam_qspi.c b/arch/arm/src/samv7/sam_qspi.c
index 6823f0dff94..379c21d88fd 100644
--- a/arch/arm/src/samv7/sam_qspi.c
+++ b/arch/arm/src/samv7/sam_qspi.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/samv7/sam_qspi.c
  *
- *   Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2017, 2019 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -60,6 +60,7 @@
 
 #include "up_internal.h"
 #include "up_arch.h"
+#include "barriers.h"
 
 #include "sam_gpio.h"
 #include "sam_xdmac.h"
diff --git a/arch/arm/src/samv7/sam_start.c b/arch/arm/src/samv7/sam_start.c
index 400c202b1cf..94c8e7bef39 100644
--- a/arch/arm/src/samv7/sam_start.c
+++ b/arch/arm/src/samv7/sam_start.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/samv7/sam_start.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2019 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,6 +49,7 @@
 
 #include "up_arch.h"
 #include "up_internal.h"
+#include "barriers.h"
 
 #ifdef CONFIG_ARCH_FPU
 #  include "nvic.h"
diff --git a/arch/arm/src/samv7/sam_usbdevhs.c b/arch/arm/src/samv7/sam_usbdevhs.c
index aabff02b62c..06fb0b66f8d 100644
--- a/arch/arm/src/samv7/sam_usbdevhs.c
+++ b/arch/arm/src/samv7/sam_usbdevhs.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/samv7/sam_usbdevhs.c
  *
- *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016, 2019 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.orgr>
  *
  * This code derives from the UDPHS device controller driver for the SAMA5D3.
@@ -70,6 +70,7 @@
 
 #include "up_arch.h"
 #include "up_internal.h"
+#include "barriers.h"
 
 #include "chip.h"
 #include "sam_periphclks.h"
diff --git a/arch/arm/src/stm32f7/stm32_ethernet.c b/arch/arm/src/stm32f7/stm32_ethernet.c
index 42c48af67e8..01e0e6ca447 100644
--- a/arch/arm/src/stm32f7/stm32_ethernet.c
+++ b/arch/arm/src/stm32f7/stm32_ethernet.c
@@ -62,6 +62,7 @@
 #endif
 
 #include "up_internal.h"
+#include "barriers.h"
 
 #include "chip/stm32_syscfg.h"
 #include "chip/stm32_pinmap.h"
diff --git a/arch/arm/src/stm32f7/stm32_flash.c b/arch/arm/src/stm32f7/stm32_flash.c
index d8152fe5a91..26619bb65dd 100644
--- a/arch/arm/src/stm32f7/stm32_flash.c
+++ b/arch/arm/src/stm32f7/stm32_flash.c
@@ -58,6 +58,8 @@
 #include <assert.h>
 #include <errno.h>
 
+#include "barriers.h"
+
 #include "chip/stm32_flash.h"
 #include "up_arch.h"
 
diff --git a/arch/arm/src/stm32f7/stm32_start.c b/arch/arm/src/stm32f7/stm32_start.c
index 78b379019ea..8b158b7e4f1 100644
--- a/arch/arm/src/stm32f7/stm32_start.c
+++ b/arch/arm/src/stm32f7/stm32_start.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32f7/stm32_start.c
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015, 2019 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,6 +49,7 @@
 
 #include "up_arch.h"
 #include "up_internal.h"
+#include "barriers.h"
 
 #ifdef CONFIG_ARCH_FPU
 #  include "nvic.h"
@@ -62,6 +63,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Memory Map ***************************************************************/
 /*
  * 0x0400:0000 - Beginning of the internal FLASH.   Address of vectors.
diff --git a/arch/arm/src/stm32h7/stm32_start.c b/arch/arm/src/stm32h7/stm32_start.c
index d47b588a3ad..6b92bec6fc5 100644
--- a/arch/arm/src/stm32h7/stm32_start.c
+++ b/arch/arm/src/stm32h7/stm32_start.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32h7/stm32_start.c
  *
- *   Copyright (C) 2018 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2018-2019 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,6 +49,7 @@
 
 #include "up_arch.h"
 #include "up_internal.h"
+#include "barriers.h"
 
 #ifdef CONFIG_ARCH_FPU
 #  include "nvic.h"
diff --git a/arch/arm/src/stm32l4/stm32l4_qspi.c b/arch/arm/src/stm32l4/stm32l4_qspi.c
index 46baa893833..ef245fc6c11 100644
--- a/arch/arm/src/stm32l4/stm32l4_qspi.c
+++ b/arch/arm/src/stm32l4/stm32l4_qspi.c
@@ -60,6 +60,7 @@
 
 #include "up_internal.h"
 #include "up_arch.h"
+#include "barriers.h"
 
 #include "stm32l4_gpio.h"
 #include "stm32l4_dma.h"
diff --git a/arch/arm/src/stm32l4/stm32l4_sdmmc.c b/arch/arm/src/stm32l4/stm32l4_sdmmc.c
index 966fef561e9..b131c3f9b41 100644
--- a/arch/arm/src/stm32l4/stm32l4_sdmmc.c
+++ b/arch/arm/src/stm32l4/stm32l4_sdmmc.c
@@ -2784,10 +2784,7 @@ static int stm32_dmapreflight(FAR struct sdio_dev_s *dev,
  * Name: stm32_dmarecvsetup
  *
  * Description:
- *   Setup to perform a read DMA.  If the processor supports a data cache,
- *   then this method will also make sure that the contents of the DMA memory
- *   and the data cache are coherent.  For read transfers this may mean
- *   invalidating the data cache.
+ *   Setup to perform a read DMA.
  *
  * Input Parameters:
  *   dev    - An instance of the SDIO device interface
@@ -2809,21 +2806,6 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
   DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
 #ifdef CONFIG_ARCH_HAVE_SDIO_PREFLIGHT
   DEBUGASSERT(stm32_dmapreflight(dev, buffer, buflen) == 0);
-#else
-#  if defined(CONFIG_ARMV7M_DCACHE) && !defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
-  /* buffer alignment is required for DMA transfers with dcache in buffered
-   * mode (not write-through) because the up_invalidate_dcache could lose
-   * buffered buffered writes if the buffer alignment and sizes are not on
-   * ARMV7M_DCACHE_LINESIZE boundaries.
-   */
-
-  if (((uintptr_t)buffer & (ARMV7M_DCACHE_LINESIZE-1)) != 0 ||
-      (buflen & (ARMV7M_DCACHE_LINESIZE-1)) != 0)
-    {
-      return -EFAULT;
-    }
-#  endif
-
 #endif
 
   /* Reset the DPSM configuration */
@@ -2856,10 +2838,6 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
                  (uint32_t)buffer, (buflen + 3) >> 2,
                  SDMMC_RXDMA32_CONFIG | priv->dmapri);
 
-  /* Force RAM reread */
-
-  up_invalidate_dcache((uintptr_t)buffer,(uintptr_t)buffer + buflen);
-
   /* Start the DMA */
 
   stm32_sample(priv, SAMPLENDX_BEFORE_ENABLE);
@@ -2874,10 +2852,7 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
  * Name: stm32_dmasendsetup
  *
  * Description:
- *   Setup to perform a write DMA.  If the processor supports a data cache,
- *   then this method will also make sure that the contents of the DMA memory
- *   and the data cache are coherent.  For write transfers, this may mean
- *   flushing the data cache.
+ *   Setup to perform a write DMA.
  *
  * Input Parameters:
  *   dev    - An instance of the SDIO device interface
@@ -2900,19 +2875,6 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
 #ifdef CONFIG_ARCH_HAVE_SDIO_PREFLIGHT
   DEBUGASSERT(stm32_dmapreflight(dev, buffer, buflen) == 0);
 #else
-#  if defined(CONFIG_ARMV7M_DCACHE) && !defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
-  /* buffer alignment is required for DMA transfers with dcache in buffered
-   * mode (not write-through) because the up_flush_dcache would corrupt adjacent
-   * memory if the buffer alignment and sizes are not on ARMV7M_DCACHE_LINESIZE
-   * boundaries.
-   */
-
-  if (((uintptr_t)buffer & (ARMV7M_DCACHE_LINESIZE-1)) != 0 ||
-      (buflen & (ARMV7M_DCACHE_LINESIZE-1)) != 0)
-    {
-      return -EFAULT;
-    }
-#  endif
 #endif
 
   /* Reset the DPSM configuration */
@@ -2924,10 +2886,6 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
   stm32_sampleinit();
   stm32_sample(priv, SAMPLENDX_BEFORE_SETUP);
 
-  /* Flush cache to physical memory */
-
-  up_flush_dcache((uintptr_t)buffer, (uintptr_t)buffer + buflen);
-
   /* Save the source buffer information for use by the interrupt handler */
 
   priv->buffer    = (uint32_t *)buffer;