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Removed stm32_internal.h; Changes for clean compile of STM32F3Discovery configuration with SPI and USB

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5630 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2013-02-09 15:03:49 +00:00
parent 19c205e9da
commit 3458ee74a4
106 changed files with 235 additions and 355 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/stm32/Kconfig
+15
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@@ -2420,3 +2420,18 @@ config STM32_USBHOST_PKTDUMP
Dump all incoming and outgoing USB packets. Depends on DEBUG.
endmenu
menu "USB Device Configuration"
config STM32_USB_ITRMP
bool "Re-map USB interrupt"
default n if !STM32_CAN1
default y if STM32_CAN1
depends on STM32_USB && STM32_STM32F30XX
---help---
The legacy USB in the F1 series shared interrupt lines with USB
device and CAN1. In the F3 series, a hardware options was added to
either retain the legacy F1 behavior or to map the USB interupts to
there own dedicated vectors. The option is available only for the
F3 family and selects the use of the dedicated USB interrupts.
arch/arm/src/stm32/chip/stm32_usbdev.h
+3 -3
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@@ -43,7 +43,7 @@
#include <nuttx/config.h>
#include <chip.h>
#ifdef CONFIG_STM32_STM32F10XX
#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX)
/************************************************************************************
* Definitions
@@ -108,7 +108,7 @@
/* Buffer Descriptor Table (Relatative to BTABLE address) */
#define STM32_USB_BTABLE_ADDR(ep,o) (STM32_USBCANRAM_BASE+STM32_USB_BTABLE_RADDR(ep,o))
#define STM32_USB_BTABLE_ADDR(ep,o) (STM32_USBRAM_BASE+STM32_USB_BTABLE_RADDR(ep,o))
#define STM32_USB_ADDR_TX(ep) STM32_USB_BTABLE_ADDR(ep,STM32_USB_ADDR_TX_WOFFSET)
#define STM32_USB_COUNT_TX(ep) STM32_USB_BTABLE_ADDR(ep,STM32_USB_COUNT_TX_WOFFSET)
#define STM32_USB_ADDR_RX(ep) STM32_USB_BTABLE_ADDR(ep,STM32_USB_ADDR_RX_WOFFSET)
@@ -231,6 +231,6 @@
#define USB_COUNT_RX_SHIFT (0) /* Bits 9-0: Reception Byte Count */
#define USB_COUNT_RX_MASK (0x03ff << USB_COUNT_RX_SHIFT)
#endif /* CONFIG_STM32_STM32F10XX */
#endif /* CONFIG_STM32_STM32F10XX || CONFIG_STM32_STM32F10XX */
#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_USBDEV_H */
arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h
+3 -2
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@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2011, 3013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -79,7 +79,8 @@
#define STM32_I2C1_BASE 0x40005400 /* 0x40005400 - 0x400057ff: I2C1 */
#define STM32_I2C2_BASE 0x40005800 /* 0x40005800 - 0x40005Bff: I2C2 */
#define STM32_USB_BASE 0x40005c00 /* 0x40005c00 - 0x40005fff: USB device FS registers */
#define STM32_USBCANRAM_BASE 0x40006000 /* 0x40006000 - 0x400063ff: Shared USB/CAN SRAM 512 bytes */
#define STM32_USBRAM_BASE 0x40006000 /* 0x40006000 - 0x400063ff: Shared USB/CAN SRAM 512 bytes */
#define STM32_CANRAM_BASE 0x40006000 /* 0x40006000 - 0x400063ff: Shared USB/CAN SRAM 512 bytes */
#define STM32_CAN1_BASE 0x40006400 /* 0x40006400 - 0x400067ff: bxCAN1 */
#define STM32_CAN2_BASE 0x40006800 /* 0x40006800 - 0x40006bff: bxCAN2 */
#define STM32_BKP_BASE 0x40006c00 /* 0x40006c00 - 0x40006fff: Backup registers (BKP) */
arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h
+1 -1
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@@ -99,7 +99,7 @@
#define STM32_I2C1_BASE 0x40005400 /* 0x40005400-0x400057ff I2C1 */
#define STM32_I2C2_BASE 0x40005800 /* 0x40005800-0x40005bff I2C2 */
#define STM32_USB_BASE 0x40005c00 /* 0x40005c00-0x40005fff USB device FS */
#define STM32_USBSRAM_BASE 0x40006000 /* 0x40006000-0x400063ff USB SRAM 512B */
#define STM32_USBRAM_BASE 0x40006000 /* 0x40006000-0x400063ff USB SRAM 512B */
#define STM32_CAN1_BASE 0x40006400 /* 0x40006400-0x400067ff bxCAN */
#define STM32_PWR_BASE 0x40007000 /* 0x40007000-0x400073ff PWR */
#define STM32_DAC_BASE 0x40007400 /* 0x40007400-0x400077ff DAC (dual) */
arch/arm/src/stm32/chip/stm32f30xxx_syscfg.h
+2 -2
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@@ -92,8 +92,8 @@
#define SYSCFG_CFGR1_TIM17_DMARMP (1 << 12) /* Bit 12: TIM17 DMA request remapping bit */
#define SYSCFG_CFGR1_TIM6_DMARMP (1 << 13) /* Bit 13: TIM6 DMA remap, or */
#define SYSCFG_CFGR1_DAC1_DMARMP (1 << 13) /* Bit 13: DAC channel DMA remap */
#define SYSCFG_CFGR1_TIM7_DMARMP (1 << 14) /* Bit 14: : TIM7 DMA remap */
#define SYSCFG_CFGR1_DAC2_DMARMP (1 << 14) /* Bit 14: : DAC channel2 DMA remap */
#define SYSCFG_CFGR1_TIM7_DMARMP (1 << 14) /* Bit 14: TIM7 DMA remap */
#define SYSCFG_CFGR1_DAC2_DMARMP (1 << 14) /* Bit 14: DAC channel2 DMA remap */
#define SYSCFG_CFGR1_I2C_PBXFMP_SHIFT (0) /* Bits 16-19: Fast Mode Plus (FM+) driving capability */
#define SYSCFG_CFGR1_I2C_PBXFMP_MASK (15 << SYSCFG_CFGR1_I2C_PBXFMP_SHIFT)
#define SYSCFG_CFGR1_I2C1_FMP (1 << 20) /* Bit 20: I2C1 fast mode Plus driving capability */
arch/arm/src/stm32/stm32_adc.c
+1 -1
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@@ -60,7 +60,7 @@
#include "up_arch.h"
#include "chip.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "stm32_adc.h"
#ifdef CONFIG_ADC
arch/arm/src/stm32/stm32_can.c
+1 -1
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@@ -57,7 +57,7 @@
#include "os_internal.h"
#include "chip.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "stm32_can.h"
#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
arch/arm/src/stm32/stm32_dac.c
+1 -1
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@@ -55,7 +55,7 @@
#include "up_arch.h"
#include "chip.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "stm32_dac.h"
#ifdef CONFIG_DAC
arch/arm/src/stm32/stm32_internal.h
-45
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@@ -1,45 +0,0 @@
/************************************************************************************
* arch/arm/src/stm32/stm32_internal.h
*
* Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32_STM32_INTERNAL_H
#define __ARCH_ARM_SRC_STM32_STM32_INTERNAL_H
/************************************************************************************
* Included Files
************************************************************************************/
#include "stm32.h"
#endif /* __ARCH_ARM_SRC_STM32_STM32_INTERNAL_H */
arch/arm/src/stm32/stm32_irq.c
+1 -1
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@@ -51,7 +51,7 @@
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
#include "stm32_internal.h"
#include "stm32.h"
/****************************************************************************
* Definitions
arch/arm/src/stm32/stm32_lowputc.c
+3 -3
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@@ -48,10 +48,10 @@
#include "chip.h"
#include "stm32.h"
#include "stm32_rcc.h"
#include "stm32_gpio.h"
#include "stm32_uart.h"
#include "stm32_internal.h"
/**************************************************************************
* Private Definitions
@@ -255,14 +255,14 @@
# define STM32_USARTDIV16 \
((STM32_APBCLOCK + (STM32_CONSOLE_BAUD >> 1)) / STM32_CONSOLE_BAUD)
/* Use oversamply by 8 only if the divisor is small */
/* Use oversamply by 8 only if the divisor is small. But what is small? */
# if STM32_USARTDIV8 > 100
# define STM32_BRR_VALUE STM32_USARTDIV16
# else
# define USE_OVER8 1
# define STM32_BRR_VALUE \
((STM32_USARTDIV8 && 0xfff0) | ((STM32_USARTDIV8 & 0x000f) >> 1)
((STM32_USARTDIV8 & 0xfff0) | ((STM32_USARTDIV8 & 0x000f) >> 1))
# endif
#else
arch/arm/src/stm32/stm32_pwm.c
+1 -1
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@@ -54,7 +54,7 @@
#include "chip.h"
#include "stm32_pwm.h"
#include "stm32_internal.h"
#include "stm32.h"
/* This module then only compiles if there is at least one enabled timer
* intended for use with the PWM upper half driver.
arch/arm/src/stm32/stm32_qencoder.c
+1 -1
View File
@@ -55,7 +55,7 @@
#include "up_internal.h"
#include "up_arch.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "stm32_gpio.h"
#include "stm32_tim.h"
#include "stm32_qencoder.h"
arch/arm/src/stm32/stm32_rcc.c
+1 -1
View File
@@ -52,7 +52,7 @@
#include "chip.h"
#include "stm32_rcc.h"
#include "stm32_flash.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "stm32_waste.h"
/****************************************************************************
arch/arm/src/stm32/stm32_sdio.c
+1 -1
View File
@@ -60,7 +60,7 @@
#include "chip.h"
#include "up_arch.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "stm32_dma.h"
#include "stm32_sdio.h"
arch/arm/src/stm32/stm32_serial.c
+71 -7
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@@ -939,6 +939,66 @@ static int up_dma_nextrx(struct up_dev_s *priv)
#ifndef CONFIG_SUPPRESS_UART_CONFIG
static void up_setspeed(struct uart_dev_s *dev)
{
#ifdef CONFIG_STM32_STM32F30XX
/* This first implementation is for U[S]ARTs that support oversampling
* by 8 in additional to the standard oversampling by 16.
*/
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
uint32_t usartdiv8;
uint32_t cr1;
uint32_t brr;
/* In case of oversampling by 8, the equation is:
*
* baud = 2 * fCK / usartdiv8
* usartdiv8 = 2 * fCK / baud
*/
usartdiv8 = ((priv->apbclock << 1) + (priv->baud >> 1)) / priv->baud;
/* Baud rate for standard USART (SPI mode included):
*
* In case of oversampling by 16, the equation is:
* baud = fCK / usartdiv16
* usartdiv16 = fCK / baud
* = 2 * usartdiv8
*/
/* Use oversamply by 8 only if the divisor is small. But what is small? */
cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
if (usartdiv8 > 100)
{
/* Use usartdiv16 */
brr = (usartdiv8 + 1) >> 1;
/* Clear oversampling by 8 to enable oversampling by 16 */
cr1 &= ~USART_CR1_OVER8;
}
else
{
/* Perform mysterious operations on bits 0-3 */
brr = ((usartdiv8 & 0xfff0) | ((usartdiv8 & 0x000f) >> 1));
/* Set oversampling by 8 */
cr1 |= USART_CR1_OVER8;
}
up_serialout(priv, STM32_USART_CR1_OFFSET, cr1);
up_serialout(priv, STM32_USART_BRR_OFFSET, brr);
#else
/* This second implementation is for U[S]ARTs that support fractional
* dividers.
*/
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
uint32_t usartdiv32;
uint32_t mantissa;
@@ -973,6 +1033,8 @@ static void up_setspeed(struct uart_dev_s *dev)
fraction = (usartdiv32 - (mantissa << 5) + 1) >> 1;
brr |= fraction << USART_BRR_FRAC_SHIFT;
up_serialout(priv, STM32_USART_BRR_OFFSET, brr);
#endif
}
#endif
@@ -1031,6 +1093,7 @@ static int up_setup(struct uart_dev_s *dev)
{
regval |= USART_CR2_STOP2;
}
up_serialout(priv, STM32_USART_CR2_OFFSET, regval);
/* Configure CR1 */
@@ -1077,6 +1140,7 @@ static int up_setup(struct uart_dev_s *dev)
regval = up_serialin(priv, STM32_USART_CR1_OFFSET);
regval |= (USART_CR1_UE|USART_CR1_TE|USART_CR1_RE);
up_serialout(priv, STM32_USART_CR1_OFFSET, regval);
#endif
/* Set up the cached interrupt enables value */
@@ -1119,7 +1183,7 @@ static int up_dma_setup(struct uart_dev_s *dev)
/* Configure for circular DMA reception into the RX fifo */
stm32_dmasetup(priv->rxdma,
priv->usartbase + STM32_USART_DR_OFFSET,
priv->usartbase + STM32_USART_RDR_OFFSET,
(uint32_t)priv->rxfifo,
RXDMA_BUFFER_SIZE,
SERIAL_DMA_CONTROL_WORD);
@@ -1351,7 +1415,7 @@ static int up_interrupt_common(struct up_dev_s *priv)
* good byte will be lost.
*/
(void)up_serialin(priv, STM32_USART_DR_OFFSET);
(void)up_serialin(priv, STM32_USART_RDR_OFFSET);
}
/* Handle outgoing, transmit bytes */
@@ -1510,20 +1574,20 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
static int up_receive(struct uart_dev_s *dev, uint32_t *status)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
uint32_t dr;
uint32_t rdr;
/* Get the Rx byte */
dr = up_serialin(priv, STM32_USART_DR_OFFSET);
rdr = up_serialin(priv, STM32_USART_RDR_OFFSET);
/* Get the Rx byte plux error information. Return those in status */
*status = priv->sr << 16 | dr;
*status = priv->sr << 16 | rdr;
priv->sr = 0;
/* Then return the actual received byte */
return dr & 0xff;
return rdr & 0xff;
}
#endif
@@ -1693,7 +1757,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
if (priv->rs485_dir_gpio != 0)
stm32_gpiowrite(priv->rs485_dir_gpio, priv->rs485_dir_polarity);
#endif
up_serialout(priv, STM32_USART_DR_OFFSET, (uint32_t)ch);
up_serialout(priv, STM32_USART_TDR_OFFSET, (uint32_t)ch);
}
/****************************************************************************
arch/arm/src/stm32/stm32_spi.c
+2 -2
View File
@@ -77,7 +77,7 @@
#include "up_arch.h"
#include "chip.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "stm32_gpio.h"
#include "stm32_dma.h"
#include "stm32_spi.h"
@@ -130,7 +130,7 @@
/* DMA channel configuration */
#if defined(CONFIG_STM32_STM32F10XX)
#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX)
# define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC )
# define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC )
# define SPI_RXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS )
arch/arm/src/stm32/stm32_start.c
+1 -1
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@@ -46,7 +46,7 @@
#include "up_arch.h"
#include "up_internal.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "stm32_gpio.h"
#ifdef CONFIG_ARCH_FPU
arch/arm/src/stm32/stm32_tim.c
+1 -1
View File
@@ -59,7 +59,7 @@
#include "up_internal.h"
#include "up_arch.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "stm32_gpio.h"
#include "stm32_tim.h"
arch/arm/src/stm32/stm32_timerisr.c
+1 -1
View File
@@ -51,7 +51,7 @@
#include "up_arch.h"
#include "chip.h"
#include "stm32_internal.h"
#include "stm32.h"
/****************************************************************************
* Definitions
arch/arm/src/stm32/stm32_usbdev.c
+32 -3
View File
@@ -59,7 +59,8 @@
#include <arch/irq.h>
#include "up_arch.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "stm32_syscfg.h"
#include "stm32_usbdev.h"
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
@@ -78,6 +79,20 @@
# define CONFIG_USB_PRI NVIC_SYSH_PRIORITY_DEFAULT
#endif
/* USB Interrupts. Should be re-mapped if CAN is used. */
#ifdef CONFIG_STM32_STM32F30XX
# ifdef CONFIG_STM32_USB_ITRMP
# define STM32_IRQ_USBHP STM32_IRQ_USBHP_1
# define STM32_IRQ_USBLP STM32_IRQ_USBLP_1
# define STM32_IRQ_USBWKUP STM32_IRQ_USBWKUP_1
# else
# define STM32_IRQ_USBHP STM32_IRQ_USBHP_2
# define STM32_IRQ_USBLP STM32_IRQ_USBLP_2
# define STM32_IRQ_USBWKUP STM32_IRQ_USBWKUP_2
# endif
#endif
/* Extremely detailed register debug that you would normally never want
* enabled.
*/
@@ -1014,7 +1029,7 @@ static void stm32_copytopma(const uint8_t *buffer, uint16_t pma, uint16_t nbytes
/* Copy loop. Source=user buffer, Dest=packet memory */
dest = (uint16_t*)(STM32_USBCANRAM_BASE + ((uint32_t)pma << 1));
dest = (uint16_t*)(STM32_USBRAM_BASE + ((uint32_t)pma << 1));
for (i = nwords; i != 0; i--)
{
/* Read two bytes and pack into on 16-bit word */
@@ -1044,7 +1059,7 @@ stm32_copyfrompma(uint8_t *buffer, uint16_t pma, uint16_t nbytes)
/* Copy loop. Source=packet memory, Dest=user buffer */
src = (uint32_t*)(STM32_USBCANRAM_BASE + ((uint32_t)pma << 1));
src = (uint32_t*)(STM32_USBRAM_BASE + ((uint32_t)pma << 1));
for (i = nwords; i != 0; i--)
{
/* Copy 16-bits from packet memory to user buffer. */
@@ -3470,6 +3485,20 @@ void up_usbinitialize(void)
stm32_hwsetup(priv);
/* Remap the USB interrupt as needed (Only supported by the STM32 F3 family) */
#ifdef CONFIG_STM32_STM32F30XX
# ifdef CONFIG_STM32_USB_ITRMP
/* Clear the ITRMP bit to use the legacy, shared USB/CAN interrupts */
modifyreg32(STM32_RCC_APB1ENR, SYSCFG_CFGR1_USB_ITRMP, 0);
# else
/* Set the ITRMP bit to use the STM32 F3's dedicated USB interrupts */
modifyreg32(STM32_RCC_APB1ENR, 0, SYSCFG_CFGR1_USB_ITRMP);
# endif
#endif
/* Attach USB controller interrupt handlers. The hardware will not be
* initialized and interrupts will not be enabled until the class device
* driver is bound. Getting the IRQs here only makes sure that we have
arch/arm/src/stm32/stm32f10xxx_dma.c
+1 -1
View File
@@ -54,7 +54,7 @@
#include "os_internal.h"
#include "chip.h"
#include "stm32_dma.h"
#include "stm32_internal.h"
#include "stm32.h"
/* Only for the STM32F10xx family for now */
arch/arm/src/stm32/stm32f20xxx_dma.c
+1 -1
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@@ -54,7 +54,7 @@
#include "os_internal.h"
#include "chip.h"
#include "stm32_dma.h"
#include "stm32_internal.h"
#include "stm32.h"
/* This file supports only the STM32 F2 family (although it is identical to
* the corresponding F4 file).
arch/arm/src/stm32/stm32f40xxx_dma.c
+1 -1
View File
@@ -54,7 +54,7 @@
#include "os_internal.h"
#include "chip.h"
#include "stm32_dma.h"
#include "stm32_internal.h"
#include "stm32.h"
/* This file supports only the STM32 F4 family (an probably the F2 family
* as well?)
configs/cloudctrl/include/board.h
+1 -1
View File
@@ -48,7 +48,7 @@
#endif
#include "stm32_rcc.h"
#include "stm32_sdio.h"
#include "stm32_internal.h"
#include "stm32.h"
#include <nuttx/arch.h>
configs/cloudctrl/src/up_autoleds.c
+1 -1
View File
@@ -51,7 +51,7 @@
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "cloudctrl-internal.h"
/****************************************************************************
configs/cloudctrl/src/up_nsh.c
+1 -1
View File
@@ -46,7 +46,7 @@
#include <debug.h>
#include <errno.h>
#include "stm32_internal.h"
#include "stm32.h"
#include "cloudctrl-internal.h"
/****************************************************************************
configs/cloudctrl/src/up_spi.c
+1 -1
View File
@@ -50,7 +50,7 @@
#include "up_arch.h"
#include "chip.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "cloudctrl-internal.h"
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3)
configs/cloudctrl/src/up_usb.c
+1 -1
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@@ -53,7 +53,7 @@
#include <nuttx/usb/usbdev_trace.h>
#include "up_arch.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "cloudctrl-internal.h"
#ifdef CONFIG_STM32_OTGFS
configs/cloudctrl/src/up_usbmsc.c
+1 -1
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@@ -46,7 +46,7 @@
#include <debug.h>
#include <errno.h>
#include "stm32_internal.h"
#include "stm32.h"
/****************************************************************************
* Pre-Processor Definitions
configs/cloudctrl/src/up_userleds.c
+1 -1
View File
@@ -50,7 +50,7 @@
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "cloudctrl-internal.h"
#ifndef CONFIG_ARCH_LEDS
configs/fire-stm32v2/include/board.h
+1 -1
View File
@@ -47,7 +47,7 @@
#endif
#include "stm32_rcc.h"
#include "stm32_sdio.h"
#include "stm32_internal.h"
#include "stm32.h"
/************************************************************************************
* Definitions
configs/fire-stm32v2/src/up_autoleds.c
+1 -1
View File
@@ -50,7 +50,7 @@
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "fire-internal.h"
/****************************************************************************
configs/fire-stm32v2/src/up_nsh.c
+1 -1
View File
@@ -45,7 +45,7 @@
#include <debug.h>
#include <errno.h>
#include "stm32_internal.h"
#include "stm32.h"
#include "fire-internal.h"
/****************************************************************************
configs/fire-stm32v2/src/up_selectlcd.c
+1 -1
View File
@@ -51,7 +51,7 @@
#include "stm32_fsmc.h"
#include "stm32_gpio.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "fire-internal.h"
#ifdef CONFIG_STM32_FSMC
configs/fire-stm32v2/src/up_spi.c
+1 -1
View File
@@ -49,7 +49,7 @@
#include "up_arch.h"
#include "chip.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "fire-internal.h"
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
configs/fire-stm32v2/src/up_usbdev.c
+1 -1
View File
@@ -49,7 +49,7 @@
#include <nuttx/usb/usbdev_trace.h>
#include "up_arch.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "fire-internal.h"
/************************************************************************************
configs/fire-stm32v2/src/up_usbmsc.c
+1 -1
View File
@@ -45,7 +45,7 @@
#include <debug.h>
#include <errno.h>
#include "stm32_internal.h"
#include "stm32.h"
/****************************************************************************
* Pre-Processor Definitions
configs/fire-stm32v2/src/up_userleds.c
+1 -1
View File
@@ -49,7 +49,7 @@
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "fire-internal.h"
#ifndef CONFIG_ARCH_LEDS
configs/hymini-stm32v/include/board.h
+1 -1
View File
@@ -52,7 +52,7 @@
#endif
#include "stm32_rcc.h"
#include "stm32_sdio.h"
#include "stm32_internal.h"
#include "stm32.h"
/************************************************************************************
* Definitions
configs/hymini-stm32v/src/ssd1289.c
-1
View File
@@ -51,7 +51,6 @@
#include "up_arch.h"
#include "stm32.h"
#include "stm32_internal.h"
#include "hymini_stm32v-internal.h"
#include "ssd1289.h"
configs/hymini-stm32v/src/up_leds.c
+1 -1
View File
@@ -50,7 +50,7 @@
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "hymini_stm32v-internal.h"
/****************************************************************************
configs/hymini-stm32v/src/up_nsh.c
+1 -1
View File
@@ -55,7 +55,7 @@
# include <nuttx/mmcsd.h>
#endif
#include "stm32_internal.h"
#include "stm32.h"
#include "hymini_stm32v-internal.h"
/****************************************************************************
configs/hymini-stm32v/src/up_spi.c
+1 -1
View File
@@ -50,7 +50,7 @@
#include "up_arch.h"
#include "chip.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "hymini_stm32v-internal.h"
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
configs/hymini-stm32v/src/up_ts.c
-1
View File
@@ -43,7 +43,6 @@
#include <debug.h>
#include "stm32.h"
#include "stm32_internal.h"
#include "hymini_stm32v-internal.h"
#include <nuttx/input/touchscreen.h>
configs/hymini-stm32v/src/up_usbdev.c
+1 -1
View File
@@ -49,7 +49,7 @@
#include <nuttx/usb/usbdev_trace.h>
#include "up_arch.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "hymini_stm32v-internal.h"
/************************************************************************************
configs/hymini-stm32v/src/up_usbmsc.c
+1 -1
View File
@@ -48,7 +48,7 @@
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include "stm32_internal.h"
#include "stm32.h"
/* There is nothing to do here if SDIO support is not selected. */
configs/olimex-stm32-p107/include/board.h
+1 -1
View File
@@ -47,7 +47,7 @@
#endif
#include "stm32_rcc.h"
#include "stm32_sdio.h"
#include "stm32_internal.h"
#include "stm32.h"
/************************************************************************************
* Pre-processor Definitions
configs/shenzhou/include/board.h
+1 -1
View File
@@ -47,7 +47,7 @@
#endif
#include "stm32_rcc.h"
#include "stm32_sdio.h"
#include "stm32_internal.h"
#include "stm32.h"
#include <nuttx/arch.h>
configs/shenzhou/src/up_autoleds.c
+1 -1
View File
@@ -50,7 +50,7 @@
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32_internal.h"
#include "stm32.h"
#include "shenzhou-internal.h"
/****************************************************************************

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