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Add register dump logic

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3024 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2010-10-16 17:00:20 +00:00
parent c7fa3cd716
commit 32b4ad2e1c
1 changed files with 26 additions and 9 deletions
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arch/avr/src/avr32/up_assert.c
+24 -7
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@@ -56,8 +56,8 @@
* Pre-processor Definitions * Pre-processor Definitions
****************************************************************************/ ****************************************************************************/
/* Output debug info if stack dump is selected -- even if /* Output debug info if stack dump is selected -- even if debug is not
* debug is not selected. * selected.
*/ */
#ifdef CONFIG_ARCH_STACKDUMP #ifdef CONFIG_ARCH_STACKDUMP
@@ -70,7 +70,7 @@
* *
* CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name * CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
* (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used) * (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used)
* defined(CONFIG_ARCH_STACKDUMP) <-- Or lib_lowprintf() is used * defined(CONFIG_ARCH_STACKDUMP)) <-- Or lib_lowprintf() is used
*/ */
#undef CONFIG_PRINT_TASKNAME #undef CONFIG_PRINT_TASKNAME
@@ -94,8 +94,13 @@
static inline uint32_t up_getsp(void) static inline uint32_t up_getsp(void)
{ {
# warning "Not implemented" uint32_t retval;
return 0; __asm__ __volatile__ (
"mov\t%0,sp\n\t"
: "=r" (retval)
:
);
return retval;
} }
/**************************************************************************** /****************************************************************************
@@ -130,9 +135,21 @@ static inline void up_registerdump(void)
if (current_regs) if (current_regs)
{ {
/* Yes.. dump the interrupt registers */ lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
0,
current_regs[REG_R0], current_regs[REG_R1],
current_regs[REG_R2], current_regs[REG_R3],
current_regs[REG_R4], current_regs[REG_R5],
current_regs[REG_R6], current_regs[REG_R7]);
# warning "Not implemented" lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
8,
current_regs[REG_R8], current_regs[REG_R9],
current_regs[REG_R10], current_regs[REG_R11],
current_regs[REG_R12], current_regs[REG_R13],
current_regs[REG_R14], current_regs[REG_R15]);
lldbg("SR: %08x\n", current_regs[REG_SR]);
} }
} }
#else #else