From 32b49e6db881ab59014f36bccd88f2597c36eaee Mon Sep 17 00:00:00 2001 From: Nathan Hartman <59230071+hartmannathan@users.noreply.github.com> Date: Tue, 1 Dec 2020 19:53:09 -0500 Subject: [PATCH] arch/stm32: Fix a wrong bitfield definition arch/arm/src/stm32/hardware/stm32_adc_v2.h: * ADC_CFGR1_JAWD1EN: Change from (1 << 22) to (1 << 24) and update comment. --- arch/arm/src/stm32/hardware/stm32_adc_v2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/src/stm32/hardware/stm32_adc_v2.h b/arch/arm/src/stm32/hardware/stm32_adc_v2.h index 5b52c8a4332..4deae87124c 100644 --- a/arch/arm/src/stm32/hardware/stm32_adc_v2.h +++ b/arch/arm/src/stm32/hardware/stm32_adc_v2.h @@ -465,7 +465,7 @@ #define ADC_CFGR1_JQM (1 << 21) /* Bit 21: JSQR queue mode */ #define ADC_CFGR1_AWD1SGL (1 << 22) /* Bit 22: Enable watchdog on single/all channels */ #define ADC_CFGR1_AWD1EN (1 << 23) /* Bit 23: Analog watchdog enable 1 regular channels */ -#define ADC_CFGR1_JAWD1EN (1 << 22) /* Bit 22: Analog watchdog enable 1 injected channels */ +#define ADC_CFGR1_JAWD1EN (1 << 24) /* Bit 24: Analog watchdog enable 1 injected channels */ #define ADC_CFGR1_JAUTO (1 << 25) /* Bit 25: Automatic Injected Group conversion */ #define ADC_CFGR1_AWD1CH_SHIFT (26) /* Bits 26-30: Analog watchdog 1 channel select bits */ #define ADC_CFGR1_AWD1CH_MASK (31 << ADC_CFGR1_AWD1CH_SHIFT)