mirror of
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ARM stack check logic; ARM no-console build fixes; Nucleus-2G updates
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3760 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
@@ -1292,4 +1292,13 @@ o Other Applications & Tests (apps/examples/)
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Status: Open
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Priority: Med
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Description: The font caching logic in examples/nx is incomplete. Fonts are
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added to the cache, but never removed. When the cache is full
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it stops rendering. This is not a problem for the examples/nx
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code because it uses so few fonts, but if the logic were
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leveraged for more general purposes, it would be a problem.
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Status: Open
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Priority: Low. This is not really a problem becauses examples/nx works
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fine with its bogus font caching.
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@@ -0,0 +1,147 @@
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/****************************************************************************
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* arch/arm/src/common/up_checkstack.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <sched.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include "os_internal.h"
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#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_STACK)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Global Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_check_stack
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*
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* Description:
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* Determine (approximately) how much stack has been used be searching the
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* stack memory for a high water mark. That is, the deepest level of the
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* stack that clobbered some recognizable marker in the stack memory.
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*
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* Input Parameters:
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* None
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*
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* Returned value:
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* The estimated amount of stack space used.
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*
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****************************************************************************/
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size_t up_check_tcbstack(FAR _TCB *tcb)
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{
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FAR uint32_t *ptr;
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size_t mark;
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/* The ARM uses a push-down stack: the stack grows toward lower addresses
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* in memory. We need to start at the lowest address in the stack memory
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* allocation and search to higher addresses. The first word we encounter
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* that does not have the magic value is the high water mark.
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*/
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for (ptr = (FAR uint32_t *)tcb->stack_alloc_ptr, mark = tcb->adj_stack_size/4;
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*ptr == 0xDEADBEEF && mark > 0;
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ptr++, mark--);
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/* If the stack is completely used, then this might mean that the stack
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* overflowed from above (meaning that the stack is too small), or may
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* have been overwritten from below meaning that some other stack or data
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* structure overflowed.
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*
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* If you see returned values saying that the entire stack is being used
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* then enable the following logic to see it there are unused areas in the
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* middle of the stack.
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*/
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#if 0
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if (mark + 16 > tcb->adj_stack_size)
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{
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int i, j;
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ptr = (FAR uint32_t *)tcb->stack_alloc_ptr;
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for (i = 0; i < tcb->adj_stack_size; i += 4*64)
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{
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for (j = 0; j < 64; j++)
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{
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int ch;
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if (*ptr++ == 0xDEADBEEF)
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{
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ch = '.';
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}
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else
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{
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ch = 'X';
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}
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up_putc(ch);
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}
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up_putc('\n');
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}
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}
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#endif
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/* Return our guess about how much stack space was used */
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return mark*4;
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}
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size_t up_check_stack(void)
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{
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return up_check_tcbstack((FAR _TCB*)g_readytorun.head);
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}
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size_t up_check_stack_remain(void)
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{
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return ((FAR _TCB*)g_readytorun.head)->adj_stack_size - up_check_tcbstack((FAR _TCB*)g_readytorun.head);
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}
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#endif /* CONFIG_DEBUG && CONFIG_DEBUG_STACK */
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@@ -55,6 +55,16 @@
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* Private Types
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****************************************************************************/
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/* On most larger then 8 bit archs this will need to be word aligned so
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* so maybe some checks should be put in place?
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*/
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static void *memset32(void *s, uint32_t c, size_t n)
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{
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uint32_t *p = (uint32_t *)s;
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while (n-- > 0) *p++ = c;
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return s;
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}
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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@@ -129,9 +139,19 @@ int up_create_stack(_TCB *tcb, size_t stack_size)
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tcb->adj_stack_ptr = (uint32_t*)top_of_stack;
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tcb->adj_stack_size = size_of_stack;
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/* If stack debug is enabled, then fill the stack with a
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* recognizable value that we can use later to test for high
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* water marks.
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*/
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#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_STACK)
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memset32(tcb->stack_alloc_ptr, 0xDEADBEEF, tcb->adj_stack_size/4);
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#endif
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up_ledon(LED_STACKCREATED);
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return OK;
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}
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return ERROR;
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}
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@@ -41,6 +41,7 @@
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****************************************************************************/
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#ifndef __ASSEMBLY__
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# include <sys/types.h>
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# include <stdint.h>
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#endif
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@@ -280,6 +281,29 @@ extern void up_usbuninitialize(void);
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# define up_usbuninitialize()
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#endif
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/****************************************************************************
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* Name: up_check_stack
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*
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* Description:
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* Determine (approximately) how much stack has been used be searching the
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* stack memory for a high water mark. That is, the deepest level of the
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* stack that clobbered some recognizable marker in the stack memory.
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*
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* Input Parameters:
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* None
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*
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* Returned value:
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* The estimated amount of stack space used.
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*
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****************************************************************************/
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#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_STACK)
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extern size_t up_check_stack(void);
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extern size_t up_check_tcbstack(FAR _TCB);
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extern size_t up_check_tcbstack_remain(FAR _TCB);
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __UP_INTERNAL_H */
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@@ -46,7 +46,7 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
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up_modifyreg16.c up_modifyreg32.c up_releasepending.c \
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up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
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up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
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up_hardfault.c up_svcall.c
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up_hardfault.c up_svcall.c up_checkstack.c
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ifeq ($(CONFIG_NET),y)
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ifneq ($(CONFIG_LPC17_ETHERNET),y)
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@@ -82,7 +82,7 @@
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# define CONSOLE_BITS CONFIG_UART3_BITS
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# define CONSOLE_PARITY CONFIG_UART3_PARITY
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# define CONSOLE_2STOP CONFIG_UART3_2STOP
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#else
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#elif defined(HAVE_CONSOLE)
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# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
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#endif
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@@ -96,7 +96,7 @@
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# define CONSOLE_LCR_WLS UART_LCR_WLS_7BIT
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#elif CONSOLE_BITS == 8
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# define CONSOLE_LCR_WLS UART_LCR_WLS_8BIT
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#else
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#elif defined(HAVE_CONSOLE)
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# error "Invalid CONFIG_UARTn_BITS setting for console "
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#endif
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@@ -112,7 +112,7 @@
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# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK1)
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#elif CONSOLE_PARITY == 4
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# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK0)
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#else
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#elif defined(HAVE_CONSOLE)
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# error "Invalid CONFIG_UARTn_PARITY setting for CONSOLE"
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#endif
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@@ -246,7 +246,7 @@
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void up_lowputc(char ch)
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{
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#ifdef HAVE_UART
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#if defined HAVE_UART && defined HAVE_CONSOLE
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/* Wait for the transmitter to be available */
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while ((getreg32(CONSOLE_BASE+LPC17_UART_LSR_OFFSET) & UART_LSR_THRE) == 0);
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@@ -351,7 +351,6 @@ void lpc17_lowsetup(void)
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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lpc17_configgpio(GPIO_UART2_TXD);
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lpc17_configgpio(GPIO_UART2_RXD);
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irqrestore(flags);
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
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lpc17_configgpio(GPIO_UART3_TXD);
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lpc17_configgpio(GPIO_UART3_RXD);
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+175
-131
@@ -271,8 +271,166 @@ static uart_dev_t g_uart3port =
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/* Which UART with be tty0/console and which tty1? tty2? tty3? */
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#if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart0port /* UART0=console */
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#ifdef HAVE_CONSOLE
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# if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart0port /* UART0=console */
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# define TTYS0_DEV g_uart0port /* UART0=ttyS0 */
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# ifdef CONFIG_LPC17_UART1
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# define TTYS1_DEV g_uart1port /* UART0=ttyS0;UART1=ttyS1 */
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# ifdef CONFIG_LPC17_UART2
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# define TTYS2_DEV g_uart2port /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS2 */
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# ifdef CONFIG_LPC17_UART3
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# define TTYS3_DEV g_uart3port /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS2;UART3=ttyS3 */
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# else
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# undef TTYS3_DEV /* UART0=ttyS0;UART1=ttyS1;UART2=ttyS;No ttyS3 */
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# endif
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# else
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# ifdef CONFIG_LPC17_UART3
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# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART1=ttyS1;UART3=ttys2;No ttyS3 */
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# else
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# undef TTYS2_DEV /* UART0=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */
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# endif
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# undef TTYS3_DEV /* No ttyS3 */
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# endif
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# else
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# ifdef CONFIG_LPC17_UART2
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# define TTYS1_DEV g_uart2port /* UART0=ttyS0;UART2=ttyS1;No ttyS3 */
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# ifdef CONFIG_LPC17_UART3
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# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART2=ttyS1;UART3=ttyS2;No ttyS3 */
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# else
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# undef TTYS2_DEV /* UART0=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */
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# endif
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# undef TTYS3_DEV /* No ttyS3 */
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# else
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# ifdef CONFIG_LPC17_UART3
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# define TTYS1_DEV g_uart3port /* UART0=ttyS0;UART3=ttyS1;No ttyS2;No ttyS3 */
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# else
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# undef TTYS1_DEV /* UART0=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
|
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# endif
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# undef TTYS2_DEV /* No ttyS2 */
|
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# undef TTYS3_DEV /* No ttyS3 */
|
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# endif
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# endif
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# elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart1port /* UART1=console */
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# define TTYS0_DEV g_uart1port /* UART1=ttyS0 */
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# ifdef CONFIG_LPC17_UART
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# define TTYS1_DEV g_uart0port /* UART1=ttyS0;UART0=ttyS1 */
|
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# ifdef CONFIG_LPC17_UART2
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# define TTYS2_DEV g_uart2port /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS2 */
|
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# ifdef CONFIG_LPC17_UART3
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# define TTYS3_DEV g_uart3port /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS2;UART3=ttyS3 */
|
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# else
|
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# undef TTYS3_DEV /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS;No ttyS3 */
|
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# endif
|
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# else
|
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# ifdef CONFIG_LPC17_UART3
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# define TTYS2_DEV g_uart3port /* UART1=ttyS0;UART0=ttyS1;UART3=ttys2;No ttyS3 */
|
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# else
|
||||
# undef TTYS2_DEV /* UART1=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */
|
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# endif
|
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# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# else
|
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# ifdef CONFIG_LPC17_UART2
|
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# define TTYS1_DEV g_uart2port /* UART1=ttyS0;UART2=ttyS1 */
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS2_DEV g_uart3port /* UART1=ttyS0;UART2=ttyS1;UART3=ttyS2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART1=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS1_DEV g_uart3port /* UART1=ttyS0;UART3=ttyS1;No ttyS2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* UART1=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# endif
|
||||
# elif defined(CONFIG_UART2_SERIAL_CONSOLE)
|
||||
# define CONSOLE_DEV g_uart2port /* UART2=console */
|
||||
# define TTYS0_DEV g_uart2port /* UART2=ttyS0 */
|
||||
# ifdef CONFIG_LPC17_UART
|
||||
# define TTYS1_DEV g_uart0port /* UART2=ttyS0;UART0=ttyS1 */
|
||||
# ifdef CONFIG_LPC17_UART1
|
||||
# define TTYS2_DEV g_uart1port /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS2 */
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS3_DEV g_uart3port /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS2;UART3=ttyS3 */
|
||||
# else
|
||||
# undef TTYS3_DEV /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS;No ttyS3 */
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS2_DEV g_uart3port /* UART2=ttyS0;UART0=ttyS1;UART3=ttys2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART2=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART1
|
||||
# define TTYS1_DEV g_uart1port /* UART2=ttyS0;UART1=ttyS1 */
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS2_DEV g_uart3port /* UART2=ttyS0;UART1=ttyS1;UART3=ttyS2 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART2=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS1_DEV g_uart3port /* UART2=ttyS0;UART3=ttyS1;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* UART2=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# endif
|
||||
# elif defined(CONFIG_UART3_SERIAL_CONSOLE)
|
||||
# define CONSOLE_DEV g_uart3port /* UART3=console */
|
||||
# define TTYS0_DEV g_uart3port /* UART3=ttyS0 */
|
||||
# ifdef CONFIG_LPC17_UART
|
||||
# define TTYS1_DEV g_uart0port /* UART3=ttyS0;UART0=ttyS1 */
|
||||
# ifdef CONFIG_LPC17_UART1
|
||||
# define TTYS2_DEV g_uart1port /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS2 */
|
||||
# ifdef CONFIG_LPC17_UART2
|
||||
# define TTYS3_DEV g_uart2port /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS2;UART2=ttyS3 */
|
||||
# else
|
||||
# undef TTYS3_DEV /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS;No ttyS3 */
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART3=ttyS0;UART0=ttyS1;UART2=ttys2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART3=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART1
|
||||
# define TTYS1_DEV g_uart1port /* UART3=ttyS0;UART1=ttyS1 */
|
||||
# ifdef CONFIG_LPC17_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART3=ttyS0;UART1=ttyS1;UART2=ttyS2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART3=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART2
|
||||
# define TTYS1_DEV g_uart2port /* UART3=ttyS0;UART2=ttyS1;No ttyS3;No ttyS3 */
|
||||
# undef TTYS3_DEV /* UART3=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* UART3=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# endif
|
||||
# endif
|
||||
#else /* No console */
|
||||
# define TTYS0_DEV g_uart0port /* UART0=ttyS0 */
|
||||
# ifdef CONFIG_LPC17_UART1
|
||||
# define TTYS1_DEV g_uart1port /* UART0=ttyS0;UART1=ttyS1 */
|
||||
@@ -285,150 +443,32 @@ static uart_dev_t g_uart3port =
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART1=ttyS1;UART3=ttys2;No ttyS3 */
|
||||
# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART1=ttyS1;UART3=ttys2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART0=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */
|
||||
# undef TTYS2_DEV /* UART0=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART2
|
||||
# define TTYS1_DEV g_uart2port /* UART0=ttyS0;UART2=ttyS1;No ttyS3 */
|
||||
# define TTYS1_DEV g_uart2port /* UART0=ttyS0;UART2=ttyS1;No ttyS3 */
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART2=ttyS1;UART3=ttyS2;No ttyS3 */
|
||||
# define TTYS2_DEV g_uart3port /* UART0=ttyS0;UART2=ttyS1;UART3=ttyS2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART0=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */
|
||||
# undef TTYS2_DEV /* UART0=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS1_DEV g_uart3port /* UART0=ttyS0;UART3=ttyS1;No ttyS2;No ttyS3 */
|
||||
# define TTYS1_DEV g_uart3port /* UART0=ttyS0;UART3=ttyS1;No ttyS2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* UART0=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
|
||||
# undef TTYS1_DEV /* UART0=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# endif
|
||||
#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
|
||||
# define CONSOLE_DEV g_uart1port /* UART1=console */
|
||||
# define TTYS0_DEV g_uart1port /* UART1=ttyS0 */
|
||||
# ifdef CONFIG_LPC17_UART
|
||||
# define TTYS1_DEV g_uart0port /* UART1=ttyS0;UART0=ttyS1 */
|
||||
# ifdef CONFIG_LPC17_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS2 */
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS3_DEV g_uart3port /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS2;UART3=ttyS3 */
|
||||
# else
|
||||
# undef TTYS3_DEV /* UART1=ttyS0;UART0=ttyS1;UART2=ttyS;No ttyS3 */
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS2_DEV g_uart3port /* UART1=ttyS0;UART0=ttyS1;UART3=ttys2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART1=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART2
|
||||
# define TTYS1_DEV g_uart2port /* UART1=ttyS0;UART2=ttyS1 */
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS2_DEV g_uart3port /* UART1=ttyS0;UART2=ttyS1;UART3=ttyS2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART1=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS1_DEV g_uart3port /* UART1=ttyS0;UART3=ttyS1;No ttyS2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* UART1=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# endif
|
||||
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
|
||||
# define CONSOLE_DEV g_uart2port /* UART2=console */
|
||||
# define TTYS0_DEV g_uart2port /* UART2=ttyS0 */
|
||||
# ifdef CONFIG_LPC17_UART
|
||||
# define TTYS1_DEV g_uart0port /* UART2=ttyS0;UART0=ttyS1 */
|
||||
# ifdef CONFIG_LPC17_UART1
|
||||
# define TTYS2_DEV g_uart1port /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS2 */
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS3_DEV g_uart3port /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS2;UART3=ttyS3 */
|
||||
# else
|
||||
# undef TTYS3_DEV /* UART2=ttyS0;UART0=ttyS1;UART1=ttyS;No ttyS3 */
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS2_DEV g_uart3port /* UART2=ttyS0;UART0=ttyS1;UART3=ttys2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART2=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART1
|
||||
# define TTYS1_DEV g_uart1port /* UART2=ttyS0;UART1=ttyS1 */
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS2_DEV g_uart3port /* UART2=ttyS0;UART1=ttyS1;UART3=ttyS2 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART2=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART3
|
||||
# define TTYS1_DEV g_uart3port /* UART2=ttyS0;UART3=ttyS1;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* UART2=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# endif
|
||||
#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
|
||||
# define CONSOLE_DEV g_uart3port /* UART3=console */
|
||||
# define TTYS0_DEV g_uart3port /* UART3=ttyS0 */
|
||||
# ifdef CONFIG_LPC17_UART
|
||||
# define TTYS1_DEV g_uart0port /* UART3=ttyS0;UART0=ttyS1 */
|
||||
# ifdef CONFIG_LPC17_UART1
|
||||
# define TTYS2_DEV g_uart1port /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS2 */
|
||||
# ifdef CONFIG_LPC17_UART2
|
||||
# define TTYS3_DEV g_uart2port /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS2;UART2=ttyS3 */
|
||||
# else
|
||||
# undef TTYS3_DEV /* UART3=ttyS0;UART0=ttyS1;UART1=ttyS;No ttyS3 */
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART3=ttyS0;UART0=ttyS1;UART2=ttys2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART3=ttyS0;UART0=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART1
|
||||
# define TTYS1_DEV g_uart1port /* UART3=ttyS0;UART1=ttyS1 */
|
||||
# ifdef CONFIG_LPC17_UART2
|
||||
# define TTYS2_DEV g_uart2port /* UART3=ttyS0;UART1=ttyS1;UART2=ttyS2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS2_DEV /* UART3=ttyS0;UART1=ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# else
|
||||
# ifdef CONFIG_LPC17_UART2
|
||||
# define TTYS1_DEV g_uart2port /* UART3=ttyS0;UART2=ttyS1;No ttyS3;No ttyS3 */
|
||||
# undef TTYS3_DEV /* UART3=ttyS0;UART2=ttyS1;No ttyS2;No ttyS3 */
|
||||
# else
|
||||
# undef TTYS1_DEV /* UART3=ttyS0;No ttyS1;No ttyS2;No ttyS3 */
|
||||
# endif
|
||||
# undef TTYS2_DEV /* No ttyS2 */
|
||||
# undef TTYS3_DEV /* No ttyS3 */
|
||||
# endif
|
||||
# endif
|
||||
#endif
|
||||
#endif /*HAVE_CONSOLE*/
|
||||
|
||||
/************************************************************************************
|
||||
* Inline Functions
|
||||
@@ -1354,10 +1394,11 @@ void up_serialinit(void)
|
||||
|
||||
int up_putc(int ch)
|
||||
{
|
||||
#ifdef HAVE_CONSOLE
|
||||
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
|
||||
uint32_t ier;
|
||||
|
||||
up_disableuartint(priv, &ier);
|
||||
#endif
|
||||
|
||||
/* Check for LF */
|
||||
|
||||
@@ -1369,7 +1410,10 @@ int up_putc(int ch)
|
||||
}
|
||||
|
||||
up_lowputc(ch);
|
||||
#ifdef HAVE_CONSOLE
|
||||
up_restoreuartint(priv, ier);
|
||||
#endif
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
|
||||
@@ -198,6 +198,13 @@ enum lpc17_ledstate_e
|
||||
};
|
||||
#endif
|
||||
|
||||
enum output_state
|
||||
{
|
||||
RELAY_OPEN = 0,
|
||||
RELAY_CLOSED = 1,
|
||||
RELAY_TOGGLE = 2,
|
||||
};
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
@@ -218,7 +225,7 @@ extern "C" {
|
||||
*
|
||||
* Description:
|
||||
* All LPC17xx architectures must provide the following entry point. This entry point
|
||||
* is called early in the intitialization -- after all memory has been configured
|
||||
* is called early in the initialization -- after all memory has been configured
|
||||
* and mapped but before any devices have been initialized.
|
||||
*
|
||||
************************************************************************************/
|
||||
@@ -238,6 +245,22 @@ EXTERN void lpc17_led1(enum lpc17_ledstate_e state);
|
||||
EXTERN void lpc17_led2(enum lpc17_ledstate_e state);
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Name: nucleus_bms_relay 1-4
|
||||
*
|
||||
* Description:
|
||||
* once booted these functions control the 4 isolated FET outputs from the
|
||||
* master BMS controller
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_BOARD_NUCLEUS2G_BMS
|
||||
EXTERN void nucleus_bms_relay1(enum output_state state);
|
||||
EXTERN void nucleus_bms_relay2(enum output_state state);
|
||||
EXTERN void nucleus_bms_relay3(enum output_state state);
|
||||
EXTERN void nucleus_bms_relay4(enum output_state state);
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
############################################################################
|
||||
# configs/nucleus2g/src/Makefile
|
||||
#
|
||||
# Copyright (C) 2010 Gregory Nutt. All rights reserved.
|
||||
# Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
|
||||
@@ -120,6 +120,11 @@
|
||||
|
||||
#define NUCLEUS2G_MMCSD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN16)
|
||||
|
||||
#define NUCLEUS_BMS_RELAY1 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN20)
|
||||
#define NUCLEUS_BMS_RELAY2 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN21)
|
||||
#define NUCLEUS_BMS_RELAY3 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN22)
|
||||
#define NUCLEUS_BMS_RELAY4 (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN23)
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
@@ -144,6 +149,8 @@
|
||||
|
||||
extern void weak_function lpc17_sspinitialize(void);
|
||||
|
||||
extern void up_relayinit(void);
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_INTERNAL_H */
|
||||
|
||||
|
||||
@@ -67,7 +67,7 @@
|
||||
*
|
||||
* Description:
|
||||
* All LPC17xx architectures must provide the following entry point. This entry point
|
||||
* is called early in the intitialization -- after all memory has been configured
|
||||
* is called early in the initialization -- after all memory has been configured
|
||||
* and mapped but before any devices have been initialized.
|
||||
*
|
||||
************************************************************************************/
|
||||
@@ -106,4 +106,10 @@ void lpc17_boardinitialize(void)
|
||||
#ifdef CONFIG_ARCH_LEDS
|
||||
up_ledinit();
|
||||
#endif
|
||||
|
||||
/* Configure the relay outptus for use on the BMS master board */
|
||||
|
||||
#ifdef CONFIG_ARCH_BOARD_NUCLEUS2G_BMS
|
||||
up_relayinit();
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -59,3 +59,4 @@ flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 80000 calc_c
|
||||
|
||||
# 4MHz / 6 = 666kHz, so use 500
|
||||
jtag_khz 100
|
||||
|
||||
|
||||
@@ -1,16 +1,23 @@
|
||||
#!/bin/sh
|
||||
|
||||
TOPDIR=$1
|
||||
CFGFILE=$2
|
||||
USAGE="$0 <TOPDIR> [-d]"
|
||||
|
||||
if [ -z "${TOPDIR}" ]; then
|
||||
echo "Missing argument"
|
||||
echo $USAGE
|
||||
exit 1
|
||||
fi
|
||||
|
||||
if [ -z "${CFGFILE}" ]; then
|
||||
echo "Using olimex.cfg"
|
||||
CFGFILE=olimex.cfg
|
||||
fi
|
||||
|
||||
OPENOCD_PATH="/cygdrive/c/OpenOCD/openocd-0.4.0/src"
|
||||
OPENOCD_EXE=openocd.exe
|
||||
OPENOCD_CFG="${TOPDIR}/configs/nucleus2g/tools/olimex.cfg"
|
||||
OPENOCD_CFG="${TOPDIR}/configs/nucleus2g/tools/${CFGFILE}"
|
||||
OPENOCD_ARGS="-f `cygpath -w ${OPENOCD_CFG}`"
|
||||
|
||||
if [ "X$2" = "X-d" ]; then
|
||||
|
||||
Executable
+63
@@ -0,0 +1,63 @@
|
||||
#daemon configuration
|
||||
telnet_port 4444
|
||||
gdb_port 3333
|
||||
|
||||
#interface
|
||||
interface ft2232
|
||||
ft2232_device_desc "usbScarab A"
|
||||
ft2232_layout "olimex-jtag"
|
||||
ft2232_vid_pid 0x0403 0xbbe0
|
||||
|
||||
# NXP LPC1768 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, clocked with 4MHz internal RC oscillator
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
} else {
|
||||
set _CHIPNAME lpc1768
|
||||
}
|
||||
|
||||
if { [info exists ENDIAN] } {
|
||||
set _ENDIAN $ENDIAN
|
||||
} else {
|
||||
set _ENDIAN little
|
||||
}
|
||||
|
||||
if { [info exists CPUTAPID ] } {
|
||||
set _CPUTAPID $CPUTAPID
|
||||
} else {
|
||||
set _CPUTAPID 0x4ba00477
|
||||
}
|
||||
|
||||
#delays on reset lines
|
||||
jtag_nsrst_delay 200
|
||||
jtag_ntrst_delay 200
|
||||
|
||||
# LPC2000 & LPC1700 -> SRST causes TRST
|
||||
reset_config trst_and_srst srst_pulls_trst
|
||||
|
||||
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
||||
|
||||
set _TARGETNAME $_CHIPNAME.cpu
|
||||
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
|
||||
|
||||
# LPC1768 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
|
||||
$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 -work-area-backup 0
|
||||
|
||||
# REVISIT is there any good reason to have this reset-init event handler??
|
||||
# Normally they should set up (board-specific) clocking then probe the flash...
|
||||
$_TARGETNAME configure -event reset-init {
|
||||
# Force NVIC.VTOR to point to flash at 0 ...
|
||||
# WHY? This is it's reset value; we run right after reset!!
|
||||
mwb 0xE000ED08 0x00
|
||||
}
|
||||
|
||||
# LPC1768 has 512kB of user-available FLASH (bootloader is located in separate dedicated region).
|
||||
# flash bank lpc1700 <base> <size> 0 0 <target#> <variant> <cclk> [calc_checksum]
|
||||
|
||||
set _FLASHNAME $_CHIPNAME.flash
|
||||
flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 80000 calc_checksum
|
||||
|
||||
# 4MHz / 6 = 666kHz, so use 500
|
||||
jtag_khz 100
|
||||
#jtag_rclk 1000
|
||||
|
||||
Reference in New Issue
Block a user