arch/risc-v: Refine riscv_cpuindex.c

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>

arch/risc-v/src/common/riscv_cpuindex.c

@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/risc-v/src/k210/k210_cpuindex.c
+ * arch/risc-v/src/common/riscv_cpuindex.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -28,8 +28,6 @@
 
 #include "riscv_arch.h"
 
-#ifdef CONFIG_SMP
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -57,5 +55,3 @@ int up_cpu_index(void)
   asm volatile ("csrr %0, mhartid": "=r" (mhartid));
   return mhartid;
 }
-
-#endif /* CONFIG_SMP */

arch/risc-v/src/k210/Make.defs

@@ -35,6 +35,10 @@ CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
 CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
 CMN_CSRCS += riscv_mdelay.c riscv_copyfullstate.c
 
+ifeq ($(CONFIG_SMP), y)
+CMN_CSRCS += riscv_cpuindex.c
+endif
+
 ifeq ($(CONFIG_SCHED_BACKTRACE),y)
 CMN_CSRCS += riscv_backtrace.c
 endif
@@ -54,7 +58,7 @@ CHIP_CSRCS += k210_lowputc.c k210_serial.c k210_fpioa.c
 CHIP_CSRCS += k210_start.c k210_timerisr.c k210_gpiohs.c
 
 ifeq ($(CONFIG_SMP), y)
-CHIP_CSRCS += k210_cpuidlestack.c k210_cpuindex.c
+CHIP_CSRCS += k210_cpuidlestack.c
 CHIP_CSRCS += k210_cpupause.c k210_cpustart.c
 endif