diff --git a/arch/arm/src/lpc31xx/lpc31_ehci.c b/arch/arm/src/lpc31xx/lpc31_ehci.c
index c08b8712cfe..eec4f7cafef 100644
--- a/arch/arm/src/lpc31xx/lpc31_ehci.c
+++ b/arch/arm/src/lpc31xx/lpc31_ehci.c
@@ -3808,7 +3808,15 @@ static int lpc31_enumerate(FAR struct usbhost_connection_s *conn,
   ret = usbhost_enumerate(hport, &hport->devclass);
   if (ret < 0)
     {
+      /* Failed to enumerate */
+
       usbhost_trace2(EHCI_TRACE2_CLASSENUM_FAILED, hport->port + 1, -ret);
+
+      /* If this is a root hub port, then marking the hub port not connected will
+       * cause sam_wait() to return and we will try the connection again.
+       */
+
+      hport->connected = false;
     }
 
   return ret;
@@ -4018,7 +4026,7 @@ static int lpc31_alloc(FAR struct usbhost_driver_s *drvr,
    * cache line size in length.
    */
 
-  *buffer = (FAR uint8_t *)kmm_memalign(LPC31_EHCI_BUFSIZE, ARM_DCACHE_LINESIZE);
+  *buffer = (FAR uint8_t *)kmm_memalign(ARM_DCACHE_LINESIZE, LPC31_EHCI_BUFSIZE);
   if (*buffer)
     {
       *maxlen = LPC31_EHCI_BUFSIZE;
@@ -4100,7 +4108,7 @@ static int lpc31_ioalloc(FAR struct usbhost_driver_s *drvr, FAR uint8_t **buffer
    */
 
   buflen  = (buflen + DCACHE_LINEMASK) & ~DCACHE_LINEMASK;
-  *buffer = (FAR uint8_t *)kumm_memalign(buflen, ARM_DCACHE_LINESIZE);
+  *buffer = (FAR uint8_t *)kumm_memalign(ARM_DCACHE_LINESIZE, buflen);
   return *buffer ? OK : -ENOMEM;
 }
 
diff --git a/arch/arm/src/sama5/sam_ehci.c b/arch/arm/src/sama5/sam_ehci.c
index b5383c3b5fe..6f9d6ecfef1 100644
--- a/arch/arm/src/sama5/sam_ehci.c
+++ b/arch/arm/src/sama5/sam_ehci.c
@@ -3634,7 +3634,15 @@ static int sam_enumerate(FAR struct usbhost_connection_s *conn,
   ret = usbhost_enumerate(hport, &hport->devclass);
   if (ret < 0)
     {
+      /* Failed to enumerate */
+
       usbhost_trace2(EHCI_TRACE2_CLASSENUM_FAILED, hport->port + 1, -ret);
+
+      /* If this is a root hub port, then marking the hub port not connected will
+       * cause sam_wait() to return and we will try the connection again.
+       */
+
+      hport->connected = false;
     }
 
   return ret;
@@ -3845,7 +3853,7 @@ static int sam_alloc(FAR struct usbhost_driver_s *drvr,
    * cache line size in length.
    */
 
-  *buffer = (FAR uint8_t *)kmm_memalign(SAMA5_EHCI_BUFSIZE, ARMV7A_DCACHE_LINESIZE);
+  *buffer = (FAR uint8_t *)kmm_memalign(ARMV7A_DCACHE_LINESIZE, SAMA5_EHCI_BUFSIZE);
   if (*buffer)
     {
       *maxlen = SAMA5_EHCI_BUFSIZE;
@@ -3927,7 +3935,7 @@ static int sam_ioalloc(FAR struct usbhost_driver_s *drvr, FAR uint8_t **buffer,
    */
 
   buflen  = (buflen + DCACHE_LINEMASK) & ~DCACHE_LINEMASK;
-  *buffer = (FAR uint8_t *)kumm_memalign(buflen, ARMV7A_DCACHE_LINESIZE);
+  *buffer = (FAR uint8_t *)kumm_memalign(ARMV7A_DCACHE_LINESIZE, buflen);
   return *buffer ? OK : -ENOMEM;
 }
 
diff --git a/arch/arm/src/sama5/sam_ohci.c b/arch/arm/src/sama5/sam_ohci.c
index 971a398accc..3ead51d80a4 100644
--- a/arch/arm/src/sama5/sam_ohci.c
+++ b/arch/arm/src/sama5/sam_ohci.c
@@ -103,6 +103,16 @@
 #  error Insufficent number of transfer descriptors (CONFIG_SAMA5_OHCI_NTDS < 2)
 #endif
 
+/* Minimum alignment for DMA access is 16 bytes, but it is safer to align to the
+ * cache line size.
+ */
+
+#if ARMV7A_DCACHE_LINESIZE > 16
+#  define SAMA5_DMA_ALIGN ARMV7A_DCACHE_LINESIZE
+#else
+#  define SAMA5_DMA_ALIGN 16
+#endif
+
 /* Configurable number of request/descriptor buffers (TDBUFFER) */
 
 #ifndef CONFIG_SAMA5_OHCI_TDBUFFERS
@@ -487,11 +497,11 @@ static struct ohci_hcca_s g_hcca
  */
 
 static struct sam_ed_s    g_edalloc[SAMA5_OHCI_NEDS]
-                          __attribute__ ((aligned (16)));
+                          __attribute__ ((aligned (SAMA5_DMA_ALIGN)));
 static struct sam_gtd_s   g_tdalloc[SAMA5_OHCI_NTDS]
-                          __attribute__ ((aligned (16)));
+                          __attribute__ ((aligned (SAMA5_DMA_ALIGN)));
 static uint8_t            g_bufalloc[SAM_BUFALLOC]
-                          __attribute__ ((aligned (16)));
+                          __attribute__ ((aligned (SAMA5_DMA_ALIGN)));
 
 /*******************************************************************************
  * Public Data