diff --git a/arch/arm/src/stm32f7/stm32_adc.c b/arch/arm/src/stm32f7/stm32_adc.c index fa357867c84..c01db1e2b67 100644 --- a/arch/arm/src/stm32f7/stm32_adc.c +++ b/arch/arm/src/stm32f7/stm32_adc.c @@ -42,8 +42,10 @@ #include -#include #include +#include + +#include #include #include #include @@ -166,6 +168,7 @@ struct stm32_dev_s { + FAR const struct adc_callback_s *cb; uint8_t irq; /* Interrupt generated by this ADC block */ uint8_t nchannels; /* Number of channels */ uint8_t cchannels; /* Number of configured channels */ @@ -227,11 +230,14 @@ static void tim_dumpregs(FAR struct stm32_dev_s *priv, static void adc_rccreset(FAR struct stm32_dev_s *priv, bool reset); /* ADC Interrupt Handler */ + static int adc_interrupt(FAR struct adc_dev_s *dev); static int adc123_interrupt(int irq, FAR void *context); /* ADC Driver Methods */ +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback); static void adc_reset(FAR struct adc_dev_s *dev); static int adc_setup(FAR struct adc_dev_s *dev); static void adc_shutdown(FAR struct adc_dev_s *dev); @@ -263,6 +269,7 @@ static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable); static const struct adc_ops_s g_adcops = { + .ao_bind = adc_bind, .ao_reset = adc_reset, .ao_setup = adc_setup, .ao_shutdown = adc_shutdown, @@ -1096,15 +1103,22 @@ static void adc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr, FAR void *arg) FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv; int i; - for (i = 0; i < priv->nchannels; i++) - { - adc_receive(dev, priv->current, priv->dmabuffer[priv->current]); - priv->current++; - if (priv->current >= priv->nchannels) - { - /* Restart the conversion sequence from the beginning */ + /* Verify that the upper-half driver has bound its callback functions */ - priv->current = 0; + if (priv->cb != NULL) + { + DEBUGASSERT(priv->cb->au_receive != NULL); + + for (i = 0; i < priv->nchannels; i++) + { + priv->cb->au_receive(dev, priv->current, priv->dmabuffer[priv->current]); + priv->current++; + if (priv->current >= priv->nchannels) + { + /* Restart the conversion sequence from the beginning */ + + priv->current = 0; + } } } @@ -1115,6 +1129,25 @@ static void adc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr, FAR void *arg) } #endif +/**************************************************************************** + * Name: adc_bind + * + * Description: + * Bind the upper-half driver callbacks to the lower-half implementation. This + * must be called early in order to receive ADC event notifications. + * + ****************************************************************************/ + +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback) +{ + FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv; + + DEBUGASSERT(priv != NULL); + priv->cb = callback; + return OK; +} + /**************************************************************************** * Name: adc_reset * @@ -1138,7 +1171,7 @@ static void adc_reset(FAR struct adc_dev_s *dev) int ret; #endif - allvdbg("intf: %d\n", priv->intf); + allinfo("intf: %d\n", priv->intf); flags = enter_critical_section(); /* Enable ADC reset state */ @@ -1559,15 +1592,21 @@ static int adc_interrupt(FAR struct adc_dev_s *dev) data = adc_getreg(priv, STM32_ADC_DR_OFFSET) & ADC_DR_RDATA_MASK; - /* Give the ADC data to the ADC driver. adc_receive() accepts 3 - * parameters: - * - * 1) The first is the ADC device instance for this ADC block. - * 2) The second is the channel number for the data, and - * 3) The third is the converted data for the channel. - */ + /* Verify that the upper-half driver has bound its callback functions */ - adc_receive(dev, priv->chanlist[priv->current], data); + if (priv->cb != NULL) + { + /* Give the ADC data to the ADC driver. The ADC receive() method + * accepts 3 parameters: + * + * 1) The first is the ADC device instance for this ADC block. + * 2) The second is the channel number for the data, and + * 3) The third is the converted data for the channel. + */ + + DEBUGASSERT(priv->cb->au_receive != NULL); + priv->cb->au_receive(dev, priv->chanlist[priv->current], data); + } /* Set the channel number of the next channel that will complete * conversion. @@ -1686,6 +1725,7 @@ struct adc_dev_s *stm32_adc_initialize(int intf, FAR const uint8_t *chanlist, DEBUGASSERT(cchannels <= ADC_MAX_SAMPLES); + priv->cb = NULL; priv->cchannels = cchannels; memcpy(priv->chanlist, chanlist, cchannels); diff --git a/arch/arm/src/stm32f7/stm32_i2c.c b/arch/arm/src/stm32f7/stm32_i2c.c index 6d4793fda76..6aa9d2fde6d 100644 --- a/arch/arm/src/stm32f7/stm32_i2c.c +++ b/arch/arm/src/stm32f7/stm32_i2c.c @@ -2312,6 +2312,9 @@ static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s cr1, cr2,status ); } + UNUSED(cr1); + UNUSED(cr2); + i2cinfo("priv->status: 0x%08x\n", priv->status); /* Check for error status conditions */