From 2fc11920190aa98be188c1f8603bc6047e96723c Mon Sep 17 00:00:00 2001 From: duduita Date: Wed, 25 Jan 2023 20:18:20 -0300 Subject: [PATCH] Add initial support to Meadow F7Micro board --- boards/Kconfig | 13 + .../clicker2-stm32/kernel/stm32_userspace.c | 4 +- .../arm/stm32f7/stm32f777zit6-meadow/Kconfig | 8 + .../configs/nsh/defconfig | 42 ++ .../stm32f777zit6-meadow/include/board.h | 490 ++++++++++++++++++ .../stm32f777zit6-meadow/kernel/.gitignore | 1 + .../stm32f777zit6-meadow/kernel/Makefile | 93 ++++ .../kernel/stm32_userspace.c | 110 ++++ .../stm32f777zit6-meadow/scripts/Make.defs | 39 ++ .../stm32f777zit6-meadow/scripts/flash.ld | 132 +++++ .../scripts/kernel-space.ld | 94 ++++ .../stm32f777zit6-meadow/scripts/memory.ld | 114 ++++ .../scripts/user-space.ld | 98 ++++ .../stm32f777zit6-meadow/src/.gitignore | 2 + .../stm32f7/stm32f777zit6-meadow/src/Makefile | 51 ++ .../src/stm32_appinitialize.c | 70 +++ .../stm32f777zit6-meadow/src/stm32_autoleds.c | 174 +++++++ .../stm32f777zit6-meadow/src/stm32_boot.c | 175 +++++++ .../stm32f777zit6-meadow/src/stm32_bringup.c | 81 +++ .../stm32f777zit6-meadow/src/stm32_buttons.c | 96 ++++ .../stm32f777zit6-meadow/src/stm32_extmem.c | 218 ++++++++ .../stm32f777zit6-meadow/src/stm32_spi.c | 220 ++++++++ .../stm32f777zit6-meadow/src/stm32_sporadic.c | 78 +++ .../stm32f777zit6-meadow/src/stm32_userleds.c | 93 ++++ .../src/stm32f777zit6-meadow.h | 156 ++++++ 25 files changed, 2651 insertions(+), 1 deletion(-) create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/Kconfig create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/configs/nsh/defconfig create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/include/board.h create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/kernel/.gitignore create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/kernel/Makefile create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/kernel/stm32_userspace.c create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/scripts/Make.defs create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/scripts/flash.ld create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/scripts/kernel-space.ld create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/scripts/memory.ld create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/scripts/user-space.ld create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/.gitignore create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/Makefile create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_appinitialize.c create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_autoleds.c create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_boot.c create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_bringup.c create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_buttons.c create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_extmem.c create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_spi.c create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_sporadic.c create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_userleds.c create mode 100644 boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32f777zit6-meadow.h diff --git a/boards/Kconfig b/boards/Kconfig index 22c8830441b..618dfed1af8 100644 --- a/boards/Kconfig +++ b/boards/Kconfig @@ -2202,6 +2202,15 @@ config ARCH_BOARD_STM32F746_WS ---help--- Waveshare STM32F746 development board featuring the STM32F746IG MCU. +config ARCH_BOARD_MEADOW_F7MICRO + bool "Meadow F7 Micro board" + depends on ARCH_CHIP_STM32F777ZI + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + Meadow board powered by STM32F777ZI + config ARCH_BOARD_B_G474E_DPOW1 bool "ST Micro B-G474E-DPOW1 Discovery Kit" depends on ARCH_CHIP_STM32G474R @@ -2920,6 +2929,7 @@ config ARCH_BOARD default "steval-eth001v1" if ARCH_BOARD_STEVAL_ETH001V1 default "stm32h747i-disco" if ARCH_BOARD_STM32H747I_DISCO default "stm32f746-ws" if ARCH_BOARD_STM32F746_WS + default "stm32f777zit6-meadow" if ARCH_BOARD_MEADOW_F7MICRO default "b-g474e-dpow1" if ARCH_BOARD_B_G474E_DPOW1 default "b-g431b-esc1" if ARCH_BOARD_B_G431B_ESC1 default "nucleo-g431kb" if ARCH_BOARD_NUCLEO_G431KB @@ -3352,6 +3362,9 @@ endif if ARCH_BOARD_STM32F746_WS source "boards/arm/stm32f7/stm32f746-ws/Kconfig" endif +if ARCH_BOARD_MEADOW_F7MICRO +source "boards/arm/stm32f7/stm32f777zit6-meadow/Kconfig" +endif if ARCH_BOARD_STM32F746G_DISCO source "boards/arm/stm32f7/stm32f746g-disco/Kconfig" endif diff --git a/boards/arm/stm32/clicker2-stm32/kernel/stm32_userspace.c b/boards/arm/stm32/clicker2-stm32/kernel/stm32_userspace.c index cbfb7bb2455..f46599f7e25 100644 --- a/boards/arm/stm32/clicker2-stm32/kernel/stm32_userspace.c +++ b/boards/arm/stm32/clicker2-stm32/kernel/stm32_userspace.c @@ -51,7 +51,9 @@ * Public Data ****************************************************************************/ -/* These 'addresses' of these values are setup by the linker script. */ +/* These 'addresses' of these values are setup by + * the linker script. + */ extern uint8_t _stext[]; /* Start of .text */ extern uint8_t _etext[]; /* End_1 of .text + .rodata */ diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/Kconfig b/boards/arm/stm32f7/stm32f777zit6-meadow/Kconfig new file mode 100644 index 00000000000..2e0325b97ed --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_MEADOW_F7MICRO + +endif # ARCH_BOARD_MEADOW_F7MICRO diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/configs/nsh/defconfig b/boards/arm/stm32f7/stm32f777zit6-meadow/configs/nsh/defconfig new file mode 100644 index 00000000000..230a257c1eb --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/configs/nsh/defconfig @@ -0,0 +1,42 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f777zit6-meadow" +CONFIG_ARCH_BOARD_MEADOW_F7MICRO=y +CONFIG_ARCH_CHIP="stm32f7" +CONFIG_ARCH_CHIP_STM32F777ZI=y +CONFIG_ARCH_CHIP_STM32F7=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_DTCM=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_BOARD_LOOPSPERMSEC=43103 +CONFIG_BUILTIN=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_MM_REGIONS=3 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=245760 +CONFIG_RAM_START=0x20010000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SPI=y +CONFIG_START_DAY=14 +CONFIG_STM32F7_USART1=y +CONFIG_SYSTEM_NSH=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_USART1_SERIAL_CONSOLE=y diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/include/board.h b/boards/arm/stm32f7/stm32f777zit6-meadow/include/board.h new file mode 100644 index 00000000000..3fe65fdc766 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/include/board.h @@ -0,0 +1,490 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/include/board.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_STM32F777ZIT6_MEADOW_INCLUDE_BOARD_H +#define __BOARDS_ARM_STM32F777ZIT6_MEADOW_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +/* Do not include STM32F7 header files here */ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* The STM32F7 Discovery board provides the following clock sources: + * + * X2: 25 MHz oscillator for STM32F777ZIT6 microcontroller + * and Ethernet PHY. + * X1: 32.768 KHz crystal for STM32F777ZIT6 embedded RTC + * + * So we have these clock source available within the STM32 + * + * HSI: 16 MHz RC factory-trimmed + * LSI: 32 KHz RC + * HSE: On-board crystal frequency is 25MHz + * LSE: 32.768 kHz + */ + +#define STM32_BOARD_XTAL 25000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE = 25,000,000 + * + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * Subject to: + * + * 2 <= PLLM <= 63 + * 192 <= PLLN <= 432 + * 192 MHz <= PLL_VCO <= 432MHz + * + * SYSCLK = PLL_VCO / PLLP + * Subject to + * + * PLLP = {2, 4, 6, 8} + * SYSCLK <= 216 MHz + * + * USB OTG FS, SDMMC and RNG Clock = PLL_VCO / PLLQ + * Subject to + * The USB OTG FS requires a 48 MHz clock to work correctly. The SDMMC + * and the random number generator need a frequency lower than or equal + * to 48 MHz to work correctly. + * + * 2 <= PLLQ <= 15 + */ + +#if defined(CONFIG_STM32F7_OTGFS) +/* USB OTG FS clock (= SDMMCCLK = RNGCLK) must be 48 MHz + * + * PLL_VCO = (25,000,000 / 25) * 384 = 384 MHz + * SYSCLK = 384 MHz / 2 = 192 MHz + * USB OTG FS, SDMMC and RNG Clock = 384 MHz / 8 = 48MHz + * DSI CLK = PLL_VCO / PLLR = 384 / 7 = 54,86 MHz + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(384) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(8) +#define STM32_PLLCFG_PLLR RCC_PLLCFG_PLLR(7) + +#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 25) * 384) +#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) +#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 8) + +#elif defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_SDMMC2) || defined(CONFIG_STM32F7_RNG) +/* SDMMCCLK (= USB OTG FS clock = RNGCLK) should be <= 48MHz + * + * PLL_VCO = (25,000,000 / 25) * 432 = 432 MHz + * SYSCLK = 432 MHz / 2 = 216 MHz + * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 10 = 43.2 MHz + * DSI CLK = PLL_VCO / PLLR = 432 / 8 = 54 MHz + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10) +#define STM32_PLLCFG_PLLR RCC_PLLCFG_PLLR(8) + +#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 25) * 432) +#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) +#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10) + +#else +/* No restrictions by OTGFS + * + * PLL_VCO = (25,000,000 / 25) * 432 = 432 MHz + * SYSCLK = 432 MHz / 2 = 216 MHz + * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 10 = 43.2 MHz + * DSI CLK = PLL_VCO / PLLR = 432 / 8 = 54 MHz + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10) +#define STM32_PLLCFG_PLLR RCC_PLLCFG_PLLR(8) + +#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 25) * 432) +#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) +#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10) +#endif + +/* Configure factors for PLLSAI clock */ + +#define STM32_RCC_PLLSAICFGR_PLLSAIN RCC_PLLSAICFGR_PLLSAIN(192) +#define STM32_RCC_PLLSAICFGR_PLLSAIP RCC_PLLSAICFGR_PLLSAIP(2) +#define STM32_RCC_PLLSAICFGR_PLLSAIQ RCC_PLLSAICFGR_PLLSAIQ(2) +#define STM32_RCC_PLLSAICFGR_PLLSAIR RCC_PLLSAICFGR_PLLSAIR(2) + +/* Configure Dedicated Clock Configuration Register */ + +#define STM32_RCC_DCKCFGR1_PLLI2SDIVQ RCC_DCKCFGR1_PLLI2SDIVQ(1) +#define STM32_RCC_DCKCFGR1_PLLSAIDIVQ RCC_DCKCFGR1_PLLSAIDIVQ(1) +#define STM32_RCC_DCKCFGR1_PLLSAIDIVR RCC_DCKCFGR1_PLLSAIDIVR(0) +#define STM32_RCC_DCKCFGR1_SAI1SRC RCC_DCKCFGR1_SAI1SEL(0) +#define STM32_RCC_DCKCFGR1_SAI2SRC RCC_DCKCFGR1_SAI2SEL(0) +#define STM32_RCC_DCKCFGR1_TIMPRESRC 0 +#define STM32_RCC_DCKCFGR1_DFSDM1SRC 0 +#define STM32_RCC_DCKCFGR1_ADFSDM1SRC 0 + +/* Configure factors for PLLI2S clock */ + +#define STM32_RCC_PLLI2SCFGR_PLLI2SN RCC_PLLI2SCFGR_PLLI2SN(192) +#define STM32_RCC_PLLI2SCFGR_PLLI2SP RCC_PLLI2SCFGR_PLLI2SP(2) +#define STM32_RCC_PLLI2SCFGR_PLLI2SQ RCC_PLLI2SCFGR_PLLI2SQ(2) +#define STM32_RCC_PLLI2SCFGR_PLLI2SR RCC_PLLI2SCFGR_PLLI2SR(2) + +/* Configure Dedicated Clock Configuration Register 2 */ + +#define STM32_RCC_DCKCFGR2_USART1SRC RCC_DCKCFGR2_USART1SEL_APB +#define STM32_RCC_DCKCFGR2_USART2SRC RCC_DCKCFGR2_USART2SEL_APB +#define STM32_RCC_DCKCFGR2_UART4SRC RCC_DCKCFGR2_UART4SEL_APB +#define STM32_RCC_DCKCFGR2_UART5SRC RCC_DCKCFGR2_UART5SEL_APB +#define STM32_RCC_DCKCFGR2_USART6SRC RCC_DCKCFGR2_USART6SEL_APB +#define STM32_RCC_DCKCFGR2_UART7SRC RCC_DCKCFGR2_UART7SEL_APB +#define STM32_RCC_DCKCFGR2_UART8SRC RCC_DCKCFGR2_UART8SEL_APB +#define STM32_RCC_DCKCFGR2_I2C1SRC RCC_DCKCFGR2_I2C1SEL_HSI +#define STM32_RCC_DCKCFGR2_I2C2SRC RCC_DCKCFGR2_I2C2SEL_HSI +#define STM32_RCC_DCKCFGR2_I2C3SRC RCC_DCKCFGR2_I2C3SEL_HSI +#define STM32_RCC_DCKCFGR2_I2C4SRC RCC_DCKCFGR2_I2C4SEL_HSI +#define STM32_RCC_DCKCFGR2_LPTIM1SRC RCC_DCKCFGR2_LPTIM1SEL_APB +#define STM32_RCC_DCKCFGR2_CECSRC RCC_DCKCFGR2_CECSEL_HSI +#define STM32_RCC_DCKCFGR2_CK48MSRC RCC_DCKCFGR2_CK48MSEL_PLLSAI +#define STM32_RCC_DCKCFGR2_SDMMCSRC RCC_DCKCFGR2_SDMMCSEL_48MHZ +#define STM32_RCC_DCKCFGR2_SDMMC2SRC RCC_DCKCFGR2_SDMMC2SEL_48MHZ +#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_PHY + +/* Several prescalers allow the configuration of the two AHB buses, the + * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum + * frequency of the two AHB buses is 216 MHz while the maximum frequency of + * the high-speed APB domains is 108 MHz. The maximum allowed frequency of + * the low-speed APB domain is 54 MHz. + */ + +/* AHB clock (HCLK) is SYSCLK (216 MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +#define BOARD_AHB_FREQUENCY STM32_HCLK_FREQUENCY + +/* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (108MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* FLASH wait states + * + * --------- ---------- ----------- + * VDD MAX SYSCLK WAIT STATES + * --------- ---------- ----------- + * 1.7-2.1 V 180 MHz 8 + * 2.1-2.4 V 216 MHz 9 + * 2.4-2.7 V 216 MHz 8 + * 2.7-3.6 V 216 MHz 7 + * --------- ---------- ----------- + */ + +#define BOARD_FLASH_WAITSTATES 7 + +/* LED definitions **********************************************************/ + +/* The STM32F777ZIT6-MEADOW board has numerous LEDs but only one, LD1 + * located near the reset button, that can be controlled by software + * (LD2 is a power indicator, LD3-6 + * indicate USB status, LD7 is controlled by the ST-Link). + * + * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino + * interface. + * One end of LD1 is grounded so a high output on PI1 will illuminate + * the LED. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the + * LEDs in any way. + * The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_NLEDS 3 + +#define BOARD_LED_GREEN BOARD_LED1 +#define BOARD_LED_BLUE BOARD_LED2 +#define BOARD_LED_RED BOARD_LED3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) + +/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in + * include/board.h and src/stm32_leds.c. The LEDs are used + * to encode OS-related events as follows: + * + * SYMBOL Meaning LD1 + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt N/C + * LED_SIGNAL In a signal handler N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus is LD1 is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LD1 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */ +#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */ +#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */ +#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */ +#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */ +#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */ +#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */ +#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */ + +/* Button definitions *******************************************************/ + +/* The STM32F7 Discovery supports one button: + * Pushbutton B1, labelled "User", is connected to GPIO PA0. + * A high value will be sensed when the button is depressed. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Alternate function pin selections ****************************************/ + +/* USART6: + * + * These configurations assume that you are using a standard Arduio + * RS-232 shield with the serial interface with RX on pin D0 and TX + * on pin D1: + * + * -------- --------------- + * STM32F7 + * ARDUINO FUNCTION GPIO + * -- ----- --------- ----- + * DO RX USART6_RX PC7 + * D1 TX USART6_TX PC6 + * -- ----- --------- ----- + */ + +#define GPIO_USART6_RX GPIO_USART6_RX_1 +#define GPIO_USART6_TX GPIO_USART6_TX_1 + +/* USART1: + * USART1 is connected to the "Virtual Com Port" lines + * of the ST-LINK controller. + * + * -------- --------------- + * STM32F7 + * SIGNAME FUNCTION GPIO + * -- ----- --------- ----- + * VCP_RX USART1_RX PA10 + * VCP_TX USART1_TX PA9 + * -- ----- --------- ----- + */ + +#define GPIO_USART1_RX GPIO_USART1_RX_3 +#define GPIO_USART1_TX GPIO_USART1_TX_3 + +/* The STM32 F7 connects to a SMSC LAN8742A PHY using these pins: + * + * STM32 F7 BOARD LAN8742A + * GPIO SIGNAL PIN NAME + * -------- ------------ ------------- + * PG11 RMII_TX_EN TXEN + * PG13 RMII_TXD0 TXD0 + * PG14 RMII_TXD1 TXD1 + * PC4 RMII_RXD0 RXD0/MODE0 + * PC5 RMII_RXD1 RXD1/MODE1 + * PD5 RMII_RXER RXER/PHYAD0 + * PA7 RMII_CRS_DV CRS_DV/MODE2 + * PC1 RMII_MDC MDC + * PA2 RMII_MDIO MDIO + * N/A NRST nRST + * PA1 RMII_REF_CLK nINT/REFCLK0 + * N/A OSC_25M XTAL1/CLKIN + * + * The PHY address is 0, since RMII_RXER/PHYAD0 features a pull down. + * After reset, RMII_RXER/PHYAD0 switches to the RXER function, + * receive errors can be detected using GPIO pin PD5 + */ + +#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2 +#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 +#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 + +/* I2C Mapping + * I2C #4 is connected to the LCD daughter board + * and the WM8994 audio codec. + * + * I2C4_SCL - PD12 + * I2C4_SDA - PB7 + */ +#define GPIO_I2C4_SCL GPIO_I2C4_SCL_1 +#define GPIO_I2C4_SDA GPIO_I2C4_SDA_5 + +/* QSPI Mapping */ + +#define GPIO_QSPI_CS (GPIO_QUADSPI_BK1_NCS_2 | GPIO_FLOAT | GPIO_PUSHPULL | GPIO_SPEED_100MHz) +#define GPIO_QSPI_IO0 (GPIO_QUADSPI_BK1_IO0_3 | GPIO_FLOAT | GPIO_PUSHPULL | GPIO_SPEED_100MHz) +#define GPIO_QSPI_IO1 (GPIO_QUADSPI_BK1_IO1_3 | GPIO_FLOAT | GPIO_PUSHPULL | GPIO_SPEED_100MHz) +#define GPIO_QSPI_IO2 (GPIO_QUADSPI_BK1_IO2_1 | GPIO_FLOAT | GPIO_PUSHPULL | GPIO_SPEED_100MHz) +#define GPIO_QSPI_IO3 (GPIO_QUADSPI_BK1_IO3_2 | GPIO_FLOAT | GPIO_PUSHPULL | GPIO_SPEED_100MHz) +#define GPIO_QSPI_SCK (GPIO_QUADSPI_CLK_1 | GPIO_FLOAT | GPIO_PUSHPULL | GPIO_SPEED_100MHz) + +/* SDMMC */ + +/* Stream selections are arbitrary for now but might become important in the + * future if we set aside more DMA channels/streams. + * + * SDIO DMA + * DMAMAP_SDMMC1_1 = Channel 4, Stream 3 + * DMAMAP_SDMMC1_2 = Channel 4, Stream 6 + * + * DMAMAP_SDMMC2_1 = Channel 11, Stream 0 + * DMAMAP_SDMMC2_2 = Channel 11, Stream 5 + */ + +/* #define DMAMAP_SDMMC1 DMAMAP_SDMMC1_1 */ +#define DMAMAP_SDMMC2 DMAMAP_SDMMC2_1 + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz + */ + +#define STM32_SDMMC_INIT_CLKDIV (118 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define STM32_SDMMC_MMCXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) +#else +# define STM32_SDMMC_MMCXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define STM32_SDMMC_SDXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) +#else +# define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) +#endif + +/* SDMMC2 Pin mapping + * + * D0 - PG9 + * D1 - PG10 + * D2 - PB3 + * D3 - PB4 + */ +#define GPIO_SDMMC2_D0 GPIO_SDMMC2_D0_2 +#define GPIO_SDMMC2_D1 GPIO_SDMMC2_D1_2 +#define GPIO_SDMMC2_D2 GPIO_SDMMC2_D2_1 +#define GPIO_SDMMC2_D3 GPIO_SDMMC2_D3_1 + +/* FMC - SDRAM */ + +#define GPIO_FMC_SDCKE1 GPIO_FMC_SDCKE1_1 +#define GPIO_FMC_SDNE1 GPIO_FMC_SDNE1_1 +#define GPIO_FMC_SDNWE GPIO_FMC_SDNWE_1 + +/* LCD DISPLAY + * (work in progress as of 2017 07 19) + */ +#define BOARD_LTDC_WIDTH 800 +#define BOARD_LTDC_HEIGHT 472 + +#define BOARD_LTDC_HSYNC 10 +#define BOARD_LTDC_HFP 10 +#define BOARD_LTDC_HBP 20 +#define BOARD_LTDC_VSYNC 2 +#define BOARD_LTDC_VFP 4 +#define BOARD_LTDC_VBP 2 + +#define BOARD_LTDC_GCR_PCPOL 0 +#define BOARD_LTDC_GCR_DEPOL 0 +#define BOARD_LTDC_GCR_VSPOL 0 +#define BOARD_LTDC_GCR_HSPOL 0 + +#endif /* __BOARDS_ARM_STM32F777ZIT6_MEADOW_INCLUDE_BOARD_H */ diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/kernel/.gitignore b/boards/arm/stm32f7/stm32f777zit6-meadow/kernel/.gitignore new file mode 100644 index 00000000000..324b8d53ba3 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/kernel/.gitignore @@ -0,0 +1 @@ +/nuttx_user.elf diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/kernel/Makefile b/boards/arm/stm32f7/stm32f777zit6-meadow/kernel/Makefile new file mode 100644 index 00000000000..fa45155c062 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/kernel/Makefile @@ -0,0 +1,93 @@ +############################################################################ +# boards/arm/stm32f7/stm32f777zit6-meadow/kernel/Makefile +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/Make.defs + +# The entry point name (if none is provided in the .config file) + +CONFIG_INIT_ENTRYPOINT ?= user_start +ENTRYPT = $(patsubst "%",%,$(CONFIG_INIT_ENTRYPOINT)) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +USER_LIBPATHS = $(addprefix -L,$(call CONVERT_PATH,$(addprefix $(TOPDIR)$(DELIM),$(dir $(USERLIBS))))) +USER_LDSCRIPT = -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld) +USER_LDSCRIPT += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld) +USER_HEXFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.hex) +USER_SRECFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.srec) +USER_BINFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.bin) + +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) +USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) +USER_LIBGCC = "${shell "$(CC_NOCCACHE)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +# Source files + +CSRCS = stm32_userspace.c +COBJS = $(CSRCS:.c=$(OBJEXT)) +OBJS = $(COBJS) + +# Targets: + +all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map +.PHONY: nuttx_user.elf depend clean distclean + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +# Create the nuttx_user.elf file containing all of the user-mode code + +nuttx_user.elf: $(OBJS) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) $(MONO_AOBJS) $(MONO_LIBM) --end-group $(USER_LIBGCC) + + +$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf + @echo "LD: nuttx_user.elf" + $(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf +ifeq ($(CONFIG_INTELHEX_BINARY),y) + @echo "CP: nuttx_user.hex" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE) +endif +ifeq ($(CONFIG_MOTOROLA_SREC),y) + @echo "CP: nuttx_user.srec" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE) +endif +ifeq ($(CONFIG_RAW_BINARY),y) + @echo "CP: nuttx_user.bin" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE) +endif + +$(TOPDIR)$(DELIM)User.map: nuttx_user.elf + @echo "MK: User.map" + $(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map + $(Q) $(CROSSDEV)size nuttx_user.elf + +.depend: + +depend: .depend + +clean: + $(call DELFILE, nuttx_user.elf) + $(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*") + $(call DELFILE, "$(TOPDIR)$(DELIM)User.map") + $(call CLEAN) + +distclean: clean diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/kernel/stm32_userspace.c b/boards/arm/stm32f7/stm32f777zit6-meadow/kernel/stm32_userspace.c new file mode 100644 index 00000000000..07ee34d6508 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/kernel/stm32_userspace.c @@ -0,0 +1,110 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/kernel/stm32_userspace.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_NUTTX_USERSPACE +# error "CONFIG_NUTTX_USERSPACE not defined" +#endif + +#if CONFIG_NUTTX_USERSPACE != 0x08040000 +# error "CONFIG_NUTTX_USERSPACE must be 0x08040000 to match memory.ld" +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* These 'addresses' of these values are setup by the linker script. + * They are not actual uint32_t storage locations! They are only used + * meaningfully in the following way: + * + * - The linker script defines, for example, the symbol_sdata. + * - The declaration extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data + * (it is not!). + * - We can recover the linker value then by simply taking the address of + * of _data. like: uint32_t *pdata = &_sdata; + */ + +extern uint8_t _stext[]; /* Start of .text */ +extern uint8_t _etext[]; /* End_1 of .text + .rodata */ +extern const uint8_t _eronly[]; /* End+1 of read only section (.text + .rodata) */ +extern uint8_t _sdata[]; /* Start of .data */ +extern uint8_t _edata[]; /* End+1 of .data */ +extern uint8_t _sbss[]; /* Start of .bss */ +extern uint8_t _ebss[]; /* End+1 of .bss */ + +const struct userspace_s userspace locate_data(".userspace") = +{ + /* General memory map */ + + .us_entrypoint = CONFIG_INIT_ENTRYPOINT, + .us_textstart = (uintptr_t)_stext, + .us_textend = (uintptr_t)_etext, + .us_datasource = (uintptr_t)_eronly, + .us_datastart = (uintptr_t)_sdata, + .us_dataend = (uintptr_t)_edata, + .us_bssstart = (uintptr_t)_sbss, + .us_bssend = (uintptr_t)_ebss, + + /* Memory manager heap structure */ + + .us_heap = &g_mmheap, + + /* Task/thread startup routines */ + + .task_startup = nxtask_startup, + + /* Signal handler trampoline */ + + .signal_handler = up_signal_handler, + + /* User-space work queue support (declared in include/nuttx/wqueue.h) */ + +#ifdef CONFIG_LIBC_USRWORK + .work_usrstart = work_usrstart, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */ diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/Make.defs b/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/Make.defs new file mode 100644 index 00000000000..4d611ac2cbd --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/Make.defs @@ -0,0 +1,39 @@ +############################################################################ +# boards/arm/stm32f7/stm32f777zit6-meadow/scripts/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk +include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = flash.ld +ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) + +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/flash.ld b/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/flash.ld new file mode 100644 index 00000000000..a55ad436980 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/flash.ld @@ -0,0 +1,132 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/scripts/flash.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* The STM32F777ZIT6 has 2048Kb of main FLASH memory. This FLASH memory can + * be accessed from either the AXIM interface at address 0x0800:0000 or from + * the ITCM interface at address 0x0020:0000. + * + * Additional information, including the option bytes, is available at at + * FLASH at address 0x1ff0:0000. + * + * In the STM32F777ZIT6, two different boot spaces can be selected through + * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and + * BOOT_ADD1 option bytes: + * + * 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0]. + * ST programmed value: Flash on ITCM at 0x0020:0000 + * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. + * ST programmed value: System bootloader at 0x0010:0000 + * + * NuttX does not modify these option bytes. On the unmodified STM32F777ZIT6 + * MEADOW board, the BOOT0 pin is at ground so by default, the STM32 will boot + * to address 0x0020:0000 in ITCM FLASH. + * + * The STM32F777ZIT6 also has 512Kb of data SRAM (in addition to ITCM SRAM). + * SRAM is split up into three blocks: + * + * 1) 128Kb of DTCM SRM beginning at address 0x2000:0000 + * 2) 368Kb of SRAM1 beginning at address 0x2002:0000 + * 3) 16Kb of SRAM2 beginning at address 0x2007:c000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + */ + +MEMORY +{ + itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 2048K + flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K + dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K + sram1 (rwx) : ORIGIN = 0x20020000, LENGTH = 368K + sram2 (rwx) : ORIGIN = 0x2007c000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + . = ALIGN(4); + _edata = ABSOLUTE(.); + } > sram1 AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + _ebss = ABSOLUTE(.); + } > sram1 + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/kernel-space.ld b/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/kernel-space.ld new file mode 100644 index 00000000000..7e1a3aff345 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/kernel-space.ld @@ -0,0 +1,94 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/scripts/kernel-space.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/memory.ld b/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/memory.ld new file mode 100644 index 00000000000..bb2d40409e4 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/memory.ld @@ -0,0 +1,114 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/scripts/memory.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* The STM32F777ZIT6 has 2048Kb of main FLASH memory. This FLASH memory can + * be accessed from either the AXIM interface at address 0x0800:0000 or from + * the ITCM interface at address 0x0020:0000. + * + * Additional information, including the option bytes, is available at at + * FLASH at address 0x1ff0:0000. + * + * In the STM32F777ZIT6, two different boot spaces can be selected through + * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and + * BOOT_ADD1 option bytes: + * + * 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0]. + * ST programmed value: Flash on ITCM at 0x0020:0000 + * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. + * ST programmed value: System bootloader at 0x0010:0000 + * + * NuttX does not modify these option bytes. On the unmodified STM32F777ZIT6 + * MEADOW board, the BOOT0 pin is at ground so by default, the STM32 will boot + * to address 0x0020:0000 in ITCM FLASH. + * + * The STM32F777ZIT6 also has 512Kb of data SRAM (in addition to ITCM SRAM). + * SRAM is split up into three blocks: + * + * 1) 128Kb of DTCM SRM beginning at address 0x2000:0000 + * 2) 368Kb of SRAM1 beginning at address 0x2002:0000 + * 3) 16Kb of SRAM2 beginning at address 0x2007:c000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + * + * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of + * FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which + * should fit into 64KB and, of course, can be optimized as needed (See + * also boards/arm/stm32f7/stm32f777zit6-meadow/scripts/kernel-space.ld). Allowing the + * additional does permit addition debug instrumentation to be added to the + * kernel space without overflowing the partition. + * + * Alignment of the user space FLASH partition is also a critical factor: + * The user space FLASH partition will be spanned with a single region of + * size 2**n bytes. The alignment of the user-space region must be the same. + * As a consequence, as the user-space increases in size, the alignment + * requirement also increases. + * + * This alignment requirement means that the largest user space FLASH region + * you can have will be 512KB at it would have to be positioned at + * 0x08800000. If you change this address, don't forget to change the + * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify + * the check in kernel/userspace.c. + * + * For the same reasons, the maximum size of the SRAM mapping is limited to + * 4KB. Both of these alignment limitations could be reduced by using + * multiple regions to map the FLASH/SDRAM range or perhaps with some + * clever use of subregions. + * + * A detailed memory map for the 112KB SRAM region is as follows: + * + * 0x2002 0000: Kernel .data region. Typical size: 0.1KB + * ------ ---- Kernel .bss region. Typical size: 1.8KB + * 0x2002 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------ ---- Padded to 4KB + * 0x2002 1000: User .data region. Size is variable. + * ------ ---- User .bss region Size is variable. + * 0x2002 2000: Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------ ---- Beginning of user heap. Can vary with other settings. + * 0x2004 c000: End+1 of SRAM1 + */ + +MEMORY +{ + /* ITCM boot address */ + + itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 2048K + + /* 2048KB FLASH */ + + kflash (rx) : ORIGIN = 0x08000000, LENGTH = 256K + uflash (rx) : ORIGIN = 0x08040000, LENGTH = 1792K + xflash (rx) : ORIGIN = 0x08200000, LENGTH = 0K + + /* 368KB of contiguous SRAM1 */ + + ksram (rwx) : ORIGIN = 0x20020000, LENGTH = 64K + usram (rwx) : ORIGIN = 0x20030000, LENGTH = 192K + xsram (rwx) : ORIGIN = 0x20022000, LENGTH = 0K + + /* DTCM SRAM */ + + dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K + sram2 (rwx) : ORIGIN = 0x2007c000, LENGTH = 16K +} diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/user-space.ld b/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/user-space.ld new file mode 100644 index 00000000000..24f17e446a4 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/scripts/user-space.ld @@ -0,0 +1,98 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/scripts/user-space.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + . = ALIGN(4); + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/.gitignore b/boards/arm/stm32f7/stm32f777zit6-meadow/src/.gitignore new file mode 100644 index 00000000000..726d936e1e3 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/Makefile b/boards/arm/stm32f7/stm32f777zit6-meadow/src/Makefile new file mode 100644 index 00000000000..49dff624e03 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/Makefile @@ -0,0 +1,51 @@ +############################################################################ +# boards/arm/stm32f7/stm32f777zit6-meadow/src/Makefile +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/Make.defs + +CSRCS = stm32_boot.c stm32_bringup.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_BOARDCTL),y) +CSRCS += stm32_appinitialize.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += stm32_pwm.c +endif + +ifeq ($(CONFIG_SPORADIC_INSTRUMENTATION),y) +CSRCS += stm32_sporadic.c +endif + +ifeq ($(CONFIG_STM32F7_FMC),y) +CSRCS += stm32_extmem.c +endif + +include $(TOPDIR)/boards/Board.mk diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_appinitialize.c b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_appinitialize.c new file mode 100644 index 00000000000..6a6cc72129e --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_appinitialize.c @@ -0,0 +1,70 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_appinitialize.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "stm32f777zit6-meadow.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initialization logic and the + * matching application logic. The value could be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_app_initialize(uintptr_t arg) +{ +#ifdef CONFIG_BOARD_LATE_INITIALIZE + /* Board initialization already performed by board_late_initialize() */ + + return OK; +#else + /* Perform board-specific initialization */ + + return stm32_bringup(); +#endif +} diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_autoleds.c b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_autoleds.c new file mode 100644 index 00000000000..abcf74c08c3 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_autoleds.c @@ -0,0 +1,174 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_autoleds.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_gpio.h" +#include "stm32f777zit6-meadow.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0])) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Indexed by BOARD_LED_ */ + +static const uint32_t g_ledmap[BOARD_NLEDS] = +{ + GPIO_LED_GREEN, + GPIO_LED_BLUE, + GPIO_LED_RED, +}; + +static bool g_initialized; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void phy_set_led(int led, bool state) +{ + /* Active High */ + + stm32_gpiowrite(g_ledmap[led], !state); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + int i; + + /* Configure the LD1 GPIO for output. Initial state is OFF */ + + for (i = 0; i < ARRAYSIZE(g_ledmap); i++) + { + stm32_configgpio(g_ledmap[i]); + phy_set_led(i, false); + } +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + switch (led) + { + default: + break; + + case LED_HEAPALLOCATE: + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_IRQSENABLED: + phy_set_led(BOARD_LED_BLUE, false); + phy_set_led(BOARD_LED_GREEN, true); + break; + + case LED_STACKCREATED: + phy_set_led(BOARD_LED_GREEN, true); + phy_set_led(BOARD_LED_BLUE, true); + g_initialized = true; + break; + + case LED_INIRQ: + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_SIGNAL: + phy_set_led(BOARD_LED_GREEN, true); + break; + + case LED_ASSERTION: + phy_set_led(BOARD_LED_RED, true); + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_PANIC: + phy_set_led(BOARD_LED_RED, true); + break; + + case LED_IDLE : /* IDLE */ + phy_set_led(BOARD_LED_RED, true); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + default: + break; + + case LED_SIGNAL: + phy_set_led(BOARD_LED_GREEN, false); + break; + + case LED_INIRQ: + phy_set_led(BOARD_LED_BLUE, false); + break; + + case LED_ASSERTION: + phy_set_led(BOARD_LED_RED, false); + phy_set_led(BOARD_LED_BLUE, false); + break; + + case LED_PANIC: + phy_set_led(BOARD_LED_RED, false); + break; + + case LED_IDLE : /* IDLE */ + phy_set_led(BOARD_LED_RED, false); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_boot.c b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_boot.c new file mode 100644 index 00000000000..c9371cfba4f --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_boot.c @@ -0,0 +1,175 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_boot.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "stm32f777zit6-meadow.h" + +#ifdef CONFIG_STM32F7_QUADSPI +# include +# include "stm32_qspi.h" + +# ifdef CONFIG_FS_FAT +# include +# include +# endif + +/* MEADOW FIXME: header clash? */ + +extern FAR struct qspi_dev_s *stm32f7_qspi_initialize(int intf); +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This + * entry point is called early in the initialization -- after all memory + * has been configured and mapped but before any devices have been + * initialized. + * + ****************************************************************************/ + +void up_netinitialize(void) +{ +} + +void stm32_boardinitialize(void) +{ +#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \ + defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \ + defined(CONFIG_STM32F7_SPI5) + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak + * function stm32_spidev_initialize() has been brought into the link. + */ + + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + +#ifdef CONFIG_SPORADIC_INSTRUMENTATION + /* This configuration has been used for evaluating the NuttX sporadic + * scheduler. + * The following call initializes the sporadic scheduler monitor. + */ + + arch_sporadic_initialize(); +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif + +#ifdef CONFIG_STM32F7_FMC + stm32_sdram_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_late_initialize + * + * Description: + * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_late_initialize(). + * board_late_initialize() will be called immediately after up_initialize() + * is called and just before the initial application is started. + * This additional initialization phase may be used, for example, to + * initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_LATE_INITIALIZE +void board_late_initialize(void) +{ +#ifdef CONFIG_STM32F7_QUADSPI + FAR struct qspi_dev_s *qspi; + FAR struct mtd_dev_s *mtd; +#endif + +#ifdef CONFIG_STM32F7_QUADSPI + + struct qspi_meminfo_s meminfo; + + int ret; + + qspi = stm32f7_qspi_initialize(0); + if (!qspi) + { + syslog(LOG_ERR, "ERROR: sam_qspi_initialize muiled\n"); + return; + } + + mtd = s25fl5_initialize(qspi, true); + if (!mtd) + { + syslog(LOG_ERR, "ERROR: s25fl5_initialize failed\n"); + } + + ret = ftl_initialize(0, mtd); + if (ret < 0) + { + ferr("ERROR: Initialize the FTL layer\n"); + } + + meminfo.flags = QSPIMEM_READ | QSPIMEM_QUADIO; + meminfo.addrlen = 3; + meminfo.dummies = 6; + meminfo.cmd = 0xeb; /* S25FL1_FAST_READ_QUADIO; */ + meminfo.addr = 0; + meminfo.buflen = 0; + meminfo.buffer = NULL; + + stm32f7_qspi_enter_memorymapped(qspi, &meminfo, 80000000); + + stm32_mpu_uheap((uintptr_t)0x90000000, 0x4000000); + } + +#endif + stm32_bringup(); + +#endif diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_bringup.c b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_bringup.c new file mode 100644 index 00000000000..2a5b907bfb8 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_bringup.c @@ -0,0 +1,81 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_bringup.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include + +#include "stm32f777zit6-meadow.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int stm32_bringup(void) +{ + int ret = OK; + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = nx_mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n", + STM32_PROCFS_MOUNTPOINT, ret); + } +#endif + +#ifdef CONFIG_PWM + /* Initialize PWM and register the PWM device. */ + + ret = stm32_pwm_setup(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret); + } +#endif + + return ret; +} diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_buttons.c b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_buttons.c new file mode 100644 index 00000000000..0ba88d48885 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_buttons.c @@ -0,0 +1,96 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_buttons.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "stm32_gpio.h" +#include "stm32f777zit6-meadow.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +uint32_t board_button_initialize(void) +{ + stm32_configgpio(GPIO_BTN_USER); + return 1; +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint32_t board_buttons(void) +{ + return stm32_gpioread(GPIO_BTN_USER) ? 1 : 0; +} + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 32-bit bit set with each bit associated with a button. See the + * BUTTON_*_BIT definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that + * will be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See + * the BUTTON_* definitions in board.h for the meaning of enumeration + * value. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +int board_button_irq(int id, xcpt_t irqhandler, void *arg) +{ +#warning Missing logic + return -ENOSYS; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_extmem.c b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_extmem.c new file mode 100644 index 00000000000..53466475c9c --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_extmem.c @@ -0,0 +1,218 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_extmem.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "arm_internal.h" +#include "stm32_fmc.h" +#include "stm32_gpio.h" +#include "stm32_rcc.h" +#include "stm32f777zit6-meadow.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef CONFIG_STM32F7_FMC +# warning "FMC is not enabled" +#endif + +#if STM32F7_NGPIO < 6 +# error "Required GPIO ports not enabled" +#endif + +#define STM32_FMC_NADDRCONFIGS 23 +#define STM32_FMC_NDATACONFIGS 16 + +#define STM32_SDRAM_CLKEN FMC_SDRAM_MODE_CMD_CLK_ENABLE | FMC_SDRAM_CMD_BANK_1 +#define STM32_SDRAM_PALL FMC_SDRAM_MODE_CMD_PALL | FMC_SDRAM_CMD_BANK_1 +#define STM32_SDRAM_REFRESH FMC_SDRAM_MODE_CMD_AUTO_REFRESH | FMC_SDRAM_CMD_BANK_1 |\ + (3 << FMC_SDRAM_AUTO_REFRESH_SHIFT) +#define STM32_SDRAM_MODEREG FMC_SDRAM_MODE_CMD_LOAD_MODE | FMC_SDRAM_CMD_BANK_1 |\ + FMC_SDRAM_MODEREG_BURST_LENGTH_1 | \ + FMC_SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |\ + FMC_SDRAM_MODEREG_CAS_LATENCY_3 |\ + FMC_SDRAM_MODEREG_WRITEBURST_MODE_SINGLE + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* GPIO configurations common to most external memories */ + +static const uint32_t g_addressconfig[STM32_FMC_NADDRCONFIGS] = +{ + GPIO_FMC_A0, GPIO_FMC_A1, GPIO_FMC_A2, GPIO_FMC_A3, GPIO_FMC_A4, + GPIO_FMC_A5, GPIO_FMC_A6, GPIO_FMC_A7, GPIO_FMC_A8, GPIO_FMC_A9, + GPIO_FMC_A10, GPIO_FMC_A11, GPIO_FMC_A12, + + GPIO_FMC_SDCKE0_3, GPIO_FMC_SDNE0_3, GPIO_FMC_SDNWE_3, GPIO_FMC_NBL0, + GPIO_FMC_SDNRAS, GPIO_FMC_NBL1, GPIO_FMC_BA0, GPIO_FMC_BA1, + GPIO_FMC_SDCLK, GPIO_FMC_SDNCAS +}; + +static const uint32_t g_dataconfig[STM32_FMC_NDATACONFIGS] = +{ + GPIO_FMC_D0, GPIO_FMC_D1, GPIO_FMC_D2, GPIO_FMC_D3, GPIO_FMC_D4, + GPIO_FMC_D5, GPIO_FMC_D6, GPIO_FMC_D7, GPIO_FMC_D8, GPIO_FMC_D9, + GPIO_FMC_D10, GPIO_FMC_D11, GPIO_FMC_D12, GPIO_FMC_D13, GPIO_FMC_D14, + GPIO_FMC_D15 +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for external memory usage. + * + ****************************************************************************/ + +static void stm32_extmemgpios(const uint32_t *gpios, int ngpios) +{ + int i; + + /* Configure GPIOs */ + + for (i = 0; i < ngpios; i++) + { + stm32_configgpio(gpios[i]); + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_sdram_initialize + * + * Description: + * Called from stm32_bringup to initialize external SDRAM access. + * + ****************************************************************************/ + +void stm32_sdram_initialize(void) +{ + uint32_t val; + volatile int count; + + /* Enable GPIOs as FMC / memory pins */ + + stm32_extmemgpios(g_addressconfig, STM32_FMC_NADDRCONFIGS); + stm32_extmemgpios(g_dataconfig, STM32_FMC_NDATACONFIGS); + + /* Initialize the FMC peripheral */ + + stm32_fmc_init(); + + /* Configure and enable the SDRAM bank1 + * + * FMC clock = 180MHz/2 = 90MHz + * 90MHz = 11,11 ns + * All timings from the datasheet for Speedgrade -7 (=7ns) + */ + + putreg32(FMC_SDRAM_CR_RPIPE_1 | + FMC_SDRAM_CR_SDCLK_2X | + FMC_SDRAM_CR_CASLAT_3 | + FMC_SDRAM_CR_BANKS_4 | + FMC_SDRAM_CR_WIDTH_16 | + FMC_SDRAM_CR_ROWBITS_13 | + FMC_SDRAM_CR_COLBITS_9, + STM32_FMC_SDCR1); + + putreg32(FMC_SDRAM_CR_RPIPE_1 | + FMC_SDRAM_CR_SDCLK_2X | + FMC_SDRAM_CR_CASLAT_3 | + FMC_SDRAM_CR_BANKS_4 | + FMC_SDRAM_CR_WIDTH_16 | + FMC_SDRAM_CR_ROWBITS_13 | + FMC_SDRAM_CR_COLBITS_9, + STM32_FMC_SDCR2); + + putreg32((2 << FMC_SDRAM_TR_TRCD_SHIFT) | /* tRCD min = 15ns */ + (2 << FMC_SDRAM_TR_TRP_SHIFT) | /* tRP min = 15ns */ + (2 << FMC_SDRAM_TR_TWR_SHIFT) | /* tWR = 2CLK */ + (7 << FMC_SDRAM_TR_TRC_SHIFT) | /* tRC min = 63ns */ + (4 << FMC_SDRAM_TR_TRAS_SHIFT) | /* tRAS min = 42ns */ + (7 << FMC_SDRAM_TR_TXSR_SHIFT) | /* tXSR min = 70ns */ + (2 << FMC_SDRAM_TR_TMRD_SHIFT), /* tMRD = 2CLK */ + STM32_FMC_SDTR1); + + /* SDRAM Initialization sequence */ + + stm32_sdramcommand(STM32_SDRAM_CLKEN); /* Clock enable command */ + for (count = 0; count < 10000; count++) ; /* Delay */ + stm32_sdramcommand(STM32_SDRAM_PALL); /* Precharge ALL command */ + stm32_sdramcommand(STM32_SDRAM_REFRESH); /* Auto refresh command */ + stm32_sdramcommand(STM32_SDRAM_MODEREG); /* Mode Register program */ + + /* Set refresh count + * + * FMC_CLK = 90MHz + * Refresh_Rate = 7.81us + * Counter = (FMC_CLK * Refresh_Rate) - 20 + */ + + putreg32(683 << 1, STM32_FMC_SDRTR); + + /* Disable write protection */ + + regval = getreg32(STM32_FMC_SDCR1); + putreg32(regval & 0xfffffdff, STM32_FMC_SDCR1); +} + +/**************************************************************************** + * Name: stm32_disablefmc + * + * Description: + * enable clocking to the FMC module + * + ****************************************************************************/ + +void stm32_disablefmc(void) +{ + uint32_t regval; + + /* Disable AHB clocking to the FMC */ + + regval = getreg32(STM32_RCC_AHB3ENR); + regval &= ~RCC_AHB3ENR_FMCEN; + putreg32(regval, STM32_RCC_AHB3ENR); +} diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_spi.c b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_spi.c new file mode 100644 index 00000000000..7ec427457d8 --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_spi.c @@ -0,0 +1,220 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_spi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "arm_internal.h" +#include "chip.h" +#include "stm32_spi.h" + +#include "stm32f777zit6-meadow.h" + +#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \ + defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \ + defined(CONFIG_STM32F7_SPI5) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the + * stm32f777zit6-meadow board. + * + ****************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +} + +/**************************************************************************** + * Name: stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status + * must be provided by board-specific logic. They are implementations of + * the select and status methods of the SPI interface defined by struct + * spi_ops_s (see include/nuttx/spi/spi.h). All other methods + * (including stm32_spibus_initialize()) are provided by common STM32 + * logic. To use this common SPI logic on your board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board is + * configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level + * application initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to + * bind the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32F7_SPI1 +void stm32_spi1select(struct spi_dev_s *dev, + uint32_t devid, bool selected) +{ + spiinfo("devid: %d CS: %s\n", + (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi1status(struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI2 +void stm32_spi2select(struct spi_dev_s *dev, + uint32_t devid, bool selected) +{ + spiinfo("devid: %d CS: %s\n", + (int)devid, + selected ? "assert" : "de-assert" + ); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI3 +void stm32_spi3select(struct spi_dev_s *dev, + uint32_t devid, bool selected) +{ + spiinfo("devid: %d CS: %s\n", + (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI4 +void stm32_spi4select(struct spi_dev_s *dev, + uint32_t devid, bool selected) +{ + spiinfo("devid: %d CS: %s\n", + (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi4status(struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI5 +void stm32_spi5select(struct spi_dev_s *dev, + uint32_t devid, bool selected) +{ + spiinfo("devid: %d CS: %s\n", + (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi5status(struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32F7_SPI1 +int stm32_spi1cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI2 +int stm32_spi2cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI3 +int stm32_spi3cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI4 +int stm32_spi4cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI5 +int stm32_spi5cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#endif /* CONFIG_SPI_CMDDATA */ +#endif /* CONFIG_STM32F7_SPI1 || ... CONFIG_STM32F7_SPI5 */ diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_sporadic.c b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_sporadic.c new file mode 100644 index 00000000000..00d1e824f6d --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_sporadic.c @@ -0,0 +1,78 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_sporadic.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "stm32_gpio.h" +#include "stm32f777zit6-meadow.h" + +#ifdef CONFIG_SPORADIC_INSTRUMENTATION + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arch_sporadic_* + * + * Description: + * This configuration has been used for evaluating the NuttX sporadic + * scheduler. This only makes sense when uses with the sporadic test + * which is a part of apps/examples/ostest. If would make generate + * meaningful output in its current state if there were multiple sporadic + * threads + * + ****************************************************************************/ + +void arch_sporadic_initialize(void) +{ + stm32_configgpio(GPIO_SCHED_HIGHPRI); + stm32_configgpio(GPIO_SCHED_RUNNING); +} + +void arch_sporadic_start(struct tcb_s *tcb) +{ + stm32_gpiowrite(GPIO_SCHED_HIGHPRI, true); +} + +void arch_sporadic_lowpriority(struct tcb_s *tcb) +{ + stm32_gpiowrite(GPIO_SCHED_HIGHPRI, false); +} + +void arch_sporadic_suspend(struct tcb_s *tcb) +{ + stm32_gpiowrite(GPIO_SCHED_RUNNING, false); +} + +void arch_sporadic_resume(struct tcb_s *tcb) +{ + stm32_gpiowrite(GPIO_SCHED_RUNNING, true); +} + +#endif /* CONFIG_SPORADIC_INSTRUMENTATION */ diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_userleds.c b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_userleds.c new file mode 100644 index 00000000000..a0fd4677bbc --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_userleds.c @@ -0,0 +1,93 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32_userleds.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_gpio.h" +#include "stm32f777zit6-meadow.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the + * board_userled_initialize() is available to initialize the LED from user + * application logic. + * + ****************************************************************************/ + +uint32_t board_userled_initialize(void) +{ + stm32_configgpio(GPIO_LD3); + return BOARD_NLEDS; +} + +/**************************************************************************** + * Name: board_userled + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is + * available to control the LED from user application logic. + * + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == 0 /* BOARD_LED1 */) + { + stm32_gpiowrite(GPIO_LD3, !ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() + * is available to control the LED from user application logic. NOTE: since + * there is only a single LED on-board, this is function is not very useful. + * + ****************************************************************************/ + +void board_userled_all(uint32_t ledset) +{ + stm32_gpiowrite(GPIO_LD3, (ledset & 1 /* BOARD_LED1_BIT */) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32f777zit6-meadow.h b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32f777zit6-meadow.h new file mode 100644 index 00000000000..58572a2f45f --- /dev/null +++ b/boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32f777zit6-meadow.h @@ -0,0 +1,156 @@ +/**************************************************************************** + * boards/arm/stm32f7/stm32f777zit6-meadow/src/stm32f777zit6-meadow.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_MEADOW_SRC_STM32F777ZIT6_MEADOW__H +#define __BOARDS_ARM_MEADOW_SRC_STM32F777ZIT6_MEADOW__H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define STM32_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | GPIO_PORTA | GPIO_PIN1) +#define GPIO_LD2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | GPIO_PORTA | GPIO_PIN0) +#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | GPIO_PORTA | GPIO_PIN2) + +#define GPIO_LED_GREEN GPIO_LD1 +#define GPIO_LED_BLUE GPIO_LD2 +#define GPIO_LED_RED GPIO_LD3 + +/* Pushbutton B1, labelled "User", is connected to GPIO PA0. A high + * value will be sensed when the button is depressed. Note that + * the EXTI interrupt is configured. + */ + +#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTA | GPIO_PIN0) + +/* Sporadic scheduler instrumentation. + * This configuration has been used for evaluating the NuttX sporadic + * scheduler. + * In this evaluation, two GPIO outputs are used. One indicating the priority + * (high or low) of the sporadic thread and one indicating where the thread + * is running or not. + * + * There is nothing special about the pin selections: + * + * Arduino D2 PJ1 - Indicates priority1 + * Arduino D4 PJ0 - Indicates that the thread is running + */ + +#define GPIO_SCHED_HIGHPRI (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTJ | GPIO_PIN1) +#define GPIO_SCHED_RUNNING (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTJ | GPIO_PIN0) + +/**************************************************************************** + * Public data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int stm32_bringup(void); + +/**************************************************************************** + * Name: stm32_pwm_setup + * + * Description: + * Initialize PWM and register the PWM device. + * + ****************************************************************************/ + +#ifdef CONFIG_PWM +int stm32_pwm_setup(void); +#endif + +/**************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f769i-disco + * board. + * + ****************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************** + * Name: arch_sporadic_initialize + * + * Description: + * This configuration has been used for evaluating the NuttX sporadic + * scheduler. + * + ****************************************************************************/ + +#ifdef CONFIG_SPORADIC_INSTRUMENTATION +void arch_sporadic_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_sdram_initialize + * + * Description: + * Called from stm32_bringup to initialize external SDRAM access. + * + ****************************************************************************/ + +#ifdef CONFIG_STM32F7_FMC +void stm32_disablefmc(void); +#endif + +void stm32_quadspi_init(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_ARM_MEADOW_SRC_STM32F777ZIT6_MEADOW_H */