mirror of
https://github.com/apache/nuttx.git
synced 2026-06-05 15:58:59 +08:00
SAMV7: Add serial driver
This commit is contained in:
Gregory Nutt
@@ -120,6 +120,10 @@ config SAMV7_HAVE_SDRAMC
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bool
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bool
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default n
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default n
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config SAMV7_HAVE_SPI
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bool
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default n
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config SAMV7_HAVE_SPI0
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config SAMV7_HAVE_SPI0
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bool
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bool
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default n
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default n
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@@ -257,12 +261,14 @@ config SAMV7_SPI0
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bool "Serial Peripheral Interface 0 (SPI0)"
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bool "Serial Peripheral Interface 0 (SPI0)"
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default n
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default n
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depends on SAMV7_HAVE_SPI0
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depends on SAMV7_HAVE_SPI0
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select SAMV7_HAVE_SPI
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select SPI
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select SPI
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config SAMV7_SPI1
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config SAMV7_SPI1
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bool "Serial Peripheral Interface 1 (SPI1)"
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bool "Serial Peripheral Interface 1 (SPI1)"
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default n
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default n
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depends on SAMV7_HAVE_SPI1
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depends on SAMV7_HAVE_SPI1
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select SAMV7_HAVE_SPI
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select SPI
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select SPI
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config SAMV7_SSC
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config SAMV7_SSC
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@@ -92,6 +92,7 @@ endif
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CHIP_ASRCS =
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CHIP_ASRCS =
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CHIP_CSRCS = sam_start.c sam_clockconfig.c sam_irq.c sam_allocateheap.c
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CHIP_CSRCS = sam_start.c sam_clockconfig.c sam_irq.c sam_allocateheap.c
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CHIP_CSRCS += sam_lowputc.c sam_serial.c
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# Configuration-dependent SAM3/4 files
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# Configuration-dependent SAM3/4 files
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@@ -100,7 +100,7 @@
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# define SAM_UART0_RHR (SAM_UART0_BASE+SAM_UART_RHR_OFFSET)
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# define SAM_UART0_RHR (SAM_UART0_BASE+SAM_UART_RHR_OFFSET)
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# define SAM_UART0_THR (SAM_UART0_BASE+SAM_UART_THR_OFFSET)
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# define SAM_UART0_THR (SAM_UART0_BASE+SAM_UART_THR_OFFSET)
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# define SAM_UART0_BRGR (SAM_UART0_BASE+SAM_UART_BRGR_OFFSET)
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# define SAM_UART0_BRGR (SAM_UART0_BASE+SAM_UART_BRGR_OFFSET)
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# define SAM_UART1_CMPR (SAM_UART0_BASE+SAM_UART_CMPR_OFFSET)
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# define SAM_UART0_CMPR (SAM_UART0_BASE+SAM_UART_CMPR_OFFSET)
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#endif
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#endif
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#if SAMV7_NUART > 1
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#if SAMV7_NUART > 1
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@@ -285,7 +285,7 @@
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# define UART_MR_MODE_LON (9 << UART_MR_MODE_SHIFT) /* LON */
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# define UART_MR_MODE_LON (9 << UART_MR_MODE_SHIFT) /* LON */
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# define UART_MR_MODE_SPIMSTR (14 << UART_MR_MODE_SHIFT) /* SPI Master (SPI mode only) */
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# define UART_MR_MODE_SPIMSTR (14 << UART_MR_MODE_SHIFT) /* SPI Master (SPI mode only) */
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# define UART_MR_MODE_SPISLV (15 << UART_MR_MODE_SHIFT) /* SPI Slave (SPI mode only) */
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# define UART_MR_MODE_SPISLV (15 << UART_MR_MODE_SHIFT) /* SPI Slave (SPI mode only) */
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#define UART_MR_FILTER (1 << 4) /* Bit 4: Receiver Digital Filter (UART only) */
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#define UART_MR_DFILTER (1 << 4) /* Bit 4: Receiver Digital Filter (UART only) */
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#define UART_MR_USCLKS_SHIFT (4) /* Bits 4-5: Clock Selection (USART only) */
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#define UART_MR_USCLKS_SHIFT (4) /* Bits 4-5: Clock Selection (USART only) */
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#define UART_MR_USCLKS_MASK (3 << UART_MR_USCLKS_SHIFT)
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#define UART_MR_USCLKS_MASK (3 << UART_MR_USCLKS_SHIFT)
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# define UART_MR_USCLKS_MCK (0 << UART_MR_USCLKS_SHIFT) /* MCK */
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# define UART_MR_USCLKS_MCK (0 << UART_MR_USCLKS_SHIFT) /* MCK */
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@@ -327,7 +327,7 @@
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#define UART_MR_OVER (1 << 19) /* Bit 19: Oversampling Mode (USART, UART mode only) */
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#define UART_MR_OVER (1 << 19) /* Bit 19: Oversampling Mode (USART, UART mode only) */
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#define UART_MR_WRDBT (1 << 20) /* Bit 20: Wait Read Data Before Transfer (USART, SPI mode only) */
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#define UART_MR_WRDBT (1 << 20) /* Bit 20: Wait Read Data Before Transfer (USART, SPI mode only) */
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#define UART_MR_VARSYNC (1 << 22) /* Bit 22: Variable Synchronization of Command/Data Sync Start Frame Delimiter (USART, UART mode only) */
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#define UART_MR_VARSYNC (1 << 22) /* Bit 22: Variable Synchronization of Command/Data Sync Start Frame Delimiter (USART, UART mode only) */
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#define UART_MR_FILTER (1 << 28) /* Bit 28: Infrared Receive Line Filter (USART only) */
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#define UART_MR_IRFILTER (1 << 28) /* Bit 28: Infrared Receive Line Filter (USART only) */
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#define UART_MR_MAN (1 << 29) /* Bit 29: Manchester Encoder/Decoder Enable (USART only) */
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#define UART_MR_MAN (1 << 29) /* Bit 29: Manchester Encoder/Decoder Enable (USART only) */
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#define UART_MR_MODSYNC (1 << 30) /* Bit 30: Manchester Synchronization Mode (USART only) */
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#define UART_MR_MODSYNC (1 << 30) /* Bit 30: Manchester Synchronization Mode (USART only) */
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#define UART_MR_ONEBIT (1 << 31) /* Bit 31: Start Frame Delimiter Selector (USART only) */
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#define UART_MR_ONEBIT (1 << 31) /* Bit 31: Start Frame Delimiter Selector (USART only) */
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@@ -0,0 +1,292 @@
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/****************************************************************************
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* arch/arm/src/samv7/sam-config.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMV7_SAMV7_CONFIG_H
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#define __ARCH_ARM_SRC_SAMV7_SAMV7_CONFIG_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/chip/chip.h>
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#include <arch/board/board.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* GPIO IRQs ****************************************************************/
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#ifndef CONFIG_SAMV7_GPIO_IRQ
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# undef CONFIG_SAMV7_GPIOA_IRQ
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# undef CONFIG_SAMV7_GPIOB_IRQ
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# undef CONFIG_SAMV7_GPIOC_IRQ
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# undef CONFIG_SAMV7_GPIOD_IRQ
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# undef CONFIG_SAMV7_GPIOE_IRQ
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#endif
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#if SAMV7_NPIO < 1
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# undef CONFIG_SAMV7_GPIOA_IRQ
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#endif
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#if SAMV7_NPIO < 2
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# undef CONFIG_SAMV7_GPIOB_IRQ
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#endif
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#if SAMV7_NPIO < 3
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# undef CONFIG_SAMV7_GPIOC_IRQ
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#endif
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#if SAMV7_NPIO < 4
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# undef CONFIG_SAMV7_GPIOD_IRQ
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#endif
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#if SAMV7_NPIO < 5
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# undef CONFIG_SAMV7_GPIOE_IRQ
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#endif
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/* UARTs ********************************************************************/
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/* Don't enable UARTs not supported by the chip. */
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#if SAMV7_NUART < 1
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# undef CONFIG_SAMV7_UART0
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# undef CONFIG_SAMV7_UART1
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# undef CONFIG_SAMV7_UART2
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# undef CONFIG_SAMV7_UART3
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# undef CONFIG_SAMV7_UART4
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#elif SAMV7_NUART < 2
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# undef CONFIG_SAMV7_UART1
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# undef CONFIG_SAMV7_UART2
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# undef CONFIG_SAMV7_UART3
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# undef CONFIG_SAMV7_UART4
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#elif SAMV7_NUART < 3
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# undef CONFIG_SAMV7_UART2
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# undef CONFIG_SAMV7_UART3
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# undef CONFIG_SAMV7_UART4
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#elif SAMV7_NUART < 4
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# undef CONFIG_SAMV7_UART3
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# undef CONFIG_SAMV7_UART4
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#elif SAMV7_NUART < 5
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# undef CONFIG_SAMV7_UART4
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#endif
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/* Are any UARTs enabled? */
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#undef HAVE_UART_DEVICE
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#if defined(CONFIG_SAMV7_UART0) || defined(CONFIG_SAMV7_UART1) || \
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defined(CONFIG_SAMV7_UART2) || defined(CONFIG_SAMV7_UART3) || \
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defined(CONFIG_SAMV7_UART4)
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# define HAVE_UART_DEVICE 1
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#endif
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/* USARTs *******************************************************************/
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/* If the USART is not being used as a UART, then it really isn't enabled
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* for our purposes.
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*/
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#ifndef CONFIG_USART0_ISUART
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# undef CONFIG_SAMV7_USART0
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#endif
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#ifndef CONFIG_USART1_ISUART
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# undef CONFIG_SAMV7_USART1
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#endif
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#ifndef CONFIG_USART2_ISUART
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# undef CONFIG_SAMV7_USART2
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#endif
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/* Don't enable USARTs not supported by the chip. */
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#if SAMV7_NUSART < 1
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# undef CONFIG_SAMV7_USART0
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# undef CONFIG_SAMV7_USART1
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# undef CONFIG_SAMV7_USART2
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#elif SAMV7_NUSART < 2
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# undef CONFIG_SAMV7_USART1
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# undef CONFIG_SAMV7_USART2
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#elif SAMV7_NUSART < 3
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# undef CONFIG_SAMV7_USART2
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#endif
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/* Are any USARTs enabled? */
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#if defined(CONFIG_SAMV7_USART0) || defined(CONFIG_SAMV7_USART1) || \
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defined(CONFIG_SAMV7_USART2)
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# undef HAVE_UART_DEVICE
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# define HAVE_UART_DEVICE 1
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#endif
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/* UART Flow Control ********************************************************/
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/* UARTs do not support flow control */
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#undef CONFIG_UART0_IFLOWCONTROL
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#undef CONFIG_UART1_IFLOWCONTROL
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#undef CONFIG_UART2_IFLOWCONTROL
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#undef CONFIG_UART3_IFLOWCONTROL
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#undef CONFIG_UART4_IFLOWCONTROL
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/* Hardware flow control requires using DMAC channel (not yet supported) */
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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# warning PDC or DMAC support is required for RTS hardware flow control
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# undef CONFIG_SERIAL_IFLOWCONTROL
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# undef CONFIG_USART0_IFLOWCONTROL
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# undef CONFIG_USART1_IFLOWCONTROL
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# undef CONFIG_USART2_IFLOWCONTROL
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#endif
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/* Serial Console ***********************************************************/
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/* Is there a serial console? There should be no more than one defined. It
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* could be on any UARTn, n=1,..,SAMV7_NUART, or USARTn, n=1,.., SAMV7_NUSART
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*/
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#undef HAVE_SERIAL_CONSOLE
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#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_SAMV7_UART0)
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_SAMV7_UART1)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_SAMV7_UART2)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_SAMV7_UART3)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_SAMV7_UART4)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_USART0_SERIAL_CONSOLE) && defined(CONFIG_SAMV7_USART0)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_SAMV7_USART1)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART2_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_SAMV7_USART2)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
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# undef CONFIG_USART0_SERIAL_CONSOLE
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# undef CONFIG_USART1_SERIAL_CONSOLE
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# define HAVE_SERIAL_CONSOLE 1
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#else
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# undef CONFIG_UART3_SERIAL_CONSOLE
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# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||||
|
# undef CONFIG_USART0_SERIAL_CONSOLE
|
||||||
|
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||||
|
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* SPI ******************************************************************************/
|
||||||
|
/* Don't enable SPI peripherals not supported by the chip. */
|
||||||
|
|
||||||
|
#if CHIP_NSPI < 1
|
||||||
|
# undef CONFIG_SAMV7_SPI0
|
||||||
|
# undef CONFIG_SAMV7_SPI1
|
||||||
|
#elif CHIP_NSPI < 2
|
||||||
|
# undef CONFIG_SAMV7_SPI1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef CONFIG_SAMV7_HAVE_SPI
|
||||||
|
# undef CONFIG_SAMV7_SPI0
|
||||||
|
# undef CONFIG_SAMV7_SPI1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Are any SPI peripherals enabled? */
|
||||||
|
|
||||||
|
#if !defined(CONFIG_SAMV7_SPI0) && !defined(CONFIG_SAMV7_SPI0)
|
||||||
|
# undef CONFIG_SAMV7_HAVE_SPI
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Types
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Data
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Inline Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_SRC_SAMV7_SAMV7_CONFIG_H */
|
||||||
@@ -0,0 +1,379 @@
|
|||||||
|
/**************************************************************************
|
||||||
|
* arch/arm/src/samv7/sam_lowputc.c
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
/**************************************************************************
|
||||||
|
* Included Files
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
#include <arch/irq.h>
|
||||||
|
#include <arch/board/board.h>
|
||||||
|
|
||||||
|
#include "up_internal.h"
|
||||||
|
#include "up_arch.h"
|
||||||
|
|
||||||
|
#include "sam_gpio.h"
|
||||||
|
#include "sam_periphclks.h"
|
||||||
|
#include "sam_lowputc.h"
|
||||||
|
|
||||||
|
#include "chip/sam_uart.h"
|
||||||
|
#include "chip/sam_pinmap.h"
|
||||||
|
|
||||||
|
/**************************************************************************
|
||||||
|
* Private Definitions
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
/* Configuration **********************************************************/
|
||||||
|
|
||||||
|
#ifdef HAVE_SERIAL_CONSOLE
|
||||||
|
|
||||||
|
/* BAUD definitions
|
||||||
|
*
|
||||||
|
* The source clock is selectable and could be one of:
|
||||||
|
*
|
||||||
|
* - The peripheral clock
|
||||||
|
* - A division of the peripheral clock, where the divider is product-
|
||||||
|
* dependent, but generally set to 8
|
||||||
|
* - A processor/peripheral independent clock source fully programmable
|
||||||
|
* provided by PMC (PCK)
|
||||||
|
* - The external clock, available on the SCK pin
|
||||||
|
*
|
||||||
|
* Only the first two options are supported by this driver. The divided
|
||||||
|
* peripheral clock is only used for very low BAUD selections.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FAST_USART_CLOCK BOARD_MCK_FREQUENCY
|
||||||
|
#define SLOW_USART_CLOCK (BOARD_MCK_FREQUENCY >> 3)
|
||||||
|
|
||||||
|
/* Select USART parameters for the selected console */
|
||||||
|
|
||||||
|
# if defined(CONFIG_UART0_SERIAL_CONSOLE)
|
||||||
|
# define SAM_CONSOLE_BASE SAM_UART0_BASE
|
||||||
|
# define SAM_CONSOLE_BAUD CONFIG_UART0_BAUD
|
||||||
|
# define SAM_CONSOLE_BITS CONFIG_UART0_BITS
|
||||||
|
# define SAM_CONSOLE_PARITY CONFIG_UART0_PARITY
|
||||||
|
# define SAM_CONSOLE_2STOP CONFIG_UART0_2STOP
|
||||||
|
# elif defined(CONFIG_UART1_SERIAL_CONSOLE)
|
||||||
|
# define SAM_CONSOLE_BASE SAM_UART1_BASE
|
||||||
|
# define SAM_CONSOLE_BAUD CONFIG_UART1_BAUD
|
||||||
|
# define SAM_CONSOLE_BITS CONFIG_UART1_BITS
|
||||||
|
# define SAM_CONSOLE_PARITY CONFIG_UART1_PARITY
|
||||||
|
# define SAM_CONSOLE_2STOP CONFIG_UART1_2STOP
|
||||||
|
# elif defined(CONFIG_UART2_SERIAL_CONSOLE)
|
||||||
|
# define SAM_CONSOLE_BASE SAM_UART2_BASE
|
||||||
|
# define SAM_CONSOLE_BAUD CONFIG_UART2_BAUD
|
||||||
|
# define SAM_CONSOLE_BITS CONFIG_UART2_BITS
|
||||||
|
# define SAM_CONSOLE_PARITY CONFIG_UART2_PARITY
|
||||||
|
# define SAM_CONSOLE_2STOP CONFIG_UART2_2STOP
|
||||||
|
# elif defined(CONFIG_UART3_SERIAL_CONSOLE)
|
||||||
|
# define SAM_CONSOLE_BASE SAM_UART3_BASE
|
||||||
|
# define SAM_CONSOLE_BAUD CONFIG_UART3_BAUD
|
||||||
|
# define SAM_CONSOLE_BITS CONFIG_UART3_BITS
|
||||||
|
# define SAM_CONSOLE_PARITY CONFIG_UART3_PARITY
|
||||||
|
# define SAM_CONSOLE_2STOP CONFIG_UART3_2STOP
|
||||||
|
# elif defined(CONFIG_UART4_SERIAL_CONSOLE)
|
||||||
|
# define SAM_CONSOLE_BASE SAM_UART4_BASE
|
||||||
|
# define SAM_CONSOLE_BAUD CONFIG_UART4_BAUD
|
||||||
|
# define SAM_CONSOLE_BITS CONFIG_UART4_BITS
|
||||||
|
# define SAM_CONSOLE_PARITY CONFIG_UART4_PARITY
|
||||||
|
# define SAM_CONSOLE_2STOP CONFIG_UART4_2STOP
|
||||||
|
# elif defined(CONFIG_USART0_SERIAL_CONSOLE)
|
||||||
|
# define SAM_CONSOLE_BASE SAM_USART0_BASE
|
||||||
|
# define SAM_CONSOLE_BAUD CONFIG_USART0_BAUD
|
||||||
|
# define SAM_CONSOLE_BITS CONFIG_USART0_BITS
|
||||||
|
# define SAM_CONSOLE_PARITY CONFIG_USART0_PARITY
|
||||||
|
# define SAM_CONSOLE_2STOP CONFIG_USART0_2STOP
|
||||||
|
# elif defined(CONFIG_USART1_SERIAL_CONSOLE)
|
||||||
|
# define SAM_CONSOLE_BASE SAM_USART1_BASE
|
||||||
|
# define SAM_CONSOLE_BAUD CONFIG_USART1_BAUD
|
||||||
|
# define SAM_CONSOLE_BITS CONFIG_USART1_BITS
|
||||||
|
# define SAM_CONSOLE_PARITY CONFIG_USART1_PARITY
|
||||||
|
# define SAM_CONSOLE_2STOP CONFIG_USART1_2STOP
|
||||||
|
# elif defined(CONFIG_USART2_SERIAL_CONSOLE)
|
||||||
|
# define SAM_CONSOLE_BASE SAM_USART2_BASE
|
||||||
|
# define SAM_CONSOLE_BAUD CONFIG_USART2_BAUD
|
||||||
|
# define SAM_CONSOLE_BITS CONFIG_USART2_BITS
|
||||||
|
# define SAM_CONSOLE_PARITY CONFIG_USART2_PARITY
|
||||||
|
# define SAM_CONSOLE_2STOP CONFIG_USART2_2STOP
|
||||||
|
# else
|
||||||
|
# error "No CONFIG_U[S]ARTn_SERIAL_CONSOLE Setting"
|
||||||
|
# endif
|
||||||
|
|
||||||
|
/* Select the settings for the mode register */
|
||||||
|
|
||||||
|
# if SAM_CONSOLE_BITS == 5
|
||||||
|
# define MR_CHRL_VALUE UART_MR_CHRL_5BITS /* 5 bits */
|
||||||
|
# elif SAM_CONSOLE_BITS == 6
|
||||||
|
# define MR_CHRL_VALUE UART_MR_CHRL_6BITS /* 6 bits */
|
||||||
|
# elif SAM_CONSOLE_BITS == 7
|
||||||
|
# define MR_CHRL_VALUE UART_MR_CHRL_7BITS /* 7 bits */
|
||||||
|
# elif SAM_CONSOLE_BITS == 8
|
||||||
|
# define MR_CHRL_VALUE UART_MR_CHRL_8BITS /* 8 bits */
|
||||||
|
# elif SAM_CONSOLE_BITS == 9 && !defined(CONFIG_UART0_SERIAL_CONSOLE) && \
|
||||||
|
!defined(CONFIG_UART1_SERIAL_CONSOLE)
|
||||||
|
# define MR_CHRL_VALUE UART_MR_MODE9
|
||||||
|
# else
|
||||||
|
# error "Invalid number of bits"
|
||||||
|
# endif
|
||||||
|
|
||||||
|
# if SAM_CONSOLE_PARITY == 1
|
||||||
|
# define MR_PAR_VALUE UART_MR_PAR_ODD
|
||||||
|
# elif SAM_CONSOLE_PARITY == 2
|
||||||
|
# define MR_PAR_VALUE UART_MR_PAR_EVEN
|
||||||
|
# else
|
||||||
|
# define MR_PAR_VALUE UART_MR_PAR_NONE
|
||||||
|
# endif
|
||||||
|
|
||||||
|
# if SAM_CONSOLE_2STOP != 0
|
||||||
|
# define MR_NBSTOP_VALUE UART_MR_NBSTOP_2
|
||||||
|
# else
|
||||||
|
# define MR_NBSTOP_VALUE UART_MR_NBSTOP_1
|
||||||
|
# endif
|
||||||
|
|
||||||
|
# define MR_VALUE (UART_MR_MODE_NORMAL | UART_MR_USCLKS_MCK | \
|
||||||
|
MR_CHRL_VALUE | MR_PAR_VALUE | MR_NBSTOP_VALUE)
|
||||||
|
|
||||||
|
#endif /* HAVE_SERIAL_CONSOLE */
|
||||||
|
|
||||||
|
/**************************************************************************
|
||||||
|
* Private Types
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
/**************************************************************************
|
||||||
|
* Private Function Prototypes
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
/**************************************************************************
|
||||||
|
* Global Variables
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
/**************************************************************************
|
||||||
|
* Private Variables
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
/**************************************************************************
|
||||||
|
* Private Functions
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
/**************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
/**************************************************************************
|
||||||
|
* Name: up_lowputc
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Output one byte on the serial console
|
||||||
|
*
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
void up_lowputc(char ch)
|
||||||
|
{
|
||||||
|
#ifdef HAVE_SERIAL_CONSOLE
|
||||||
|
irqstate_t flags;
|
||||||
|
|
||||||
|
for (;;)
|
||||||
|
{
|
||||||
|
/* Wait for the transmitter to be available */
|
||||||
|
|
||||||
|
while ((getreg32(SAM_CONSOLE_BASE + SAM_UART_SR_OFFSET) &
|
||||||
|
UART_INT_TXEMPTY) == 0);
|
||||||
|
|
||||||
|
/* Disable interrupts so that the test and the transmission are
|
||||||
|
* atomic.
|
||||||
|
*/
|
||||||
|
|
||||||
|
flags = irqsave();
|
||||||
|
if ((getreg32(SAM_CONSOLE_BASE + SAM_UART_SR_OFFSET) &
|
||||||
|
UART_INT_TXEMPTY) != 0)
|
||||||
|
{
|
||||||
|
/* Send the character */
|
||||||
|
|
||||||
|
putreg32((uint32_t)ch, SAM_CONSOLE_BASE + SAM_UART_THR_OFFSET);
|
||||||
|
irqrestore(flags);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
irqrestore(flags);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: up_putc
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Provide priority, low-level access to support OS debug writes
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
int up_putc(int ch)
|
||||||
|
{
|
||||||
|
#ifdef HAVE_SERIAL_CONSOLE
|
||||||
|
/* Check for LF */
|
||||||
|
|
||||||
|
if (ch == '\n')
|
||||||
|
{
|
||||||
|
/* Add CR */
|
||||||
|
|
||||||
|
up_lowputc('\r');
|
||||||
|
}
|
||||||
|
|
||||||
|
up_lowputc(ch);
|
||||||
|
#endif
|
||||||
|
return ch;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**************************************************************************
|
||||||
|
* Name: sam_lowsetup
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* This performs basic initialization of the USART used for the serial
|
||||||
|
* console. Its purpose is to get the console output availabe as soon
|
||||||
|
* as possible.
|
||||||
|
*
|
||||||
|
**************************************************************************/
|
||||||
|
|
||||||
|
void sam_lowsetup(void)
|
||||||
|
{
|
||||||
|
/* Enable clocking for all selected UART/USARTs */
|
||||||
|
|
||||||
|
#ifdef CONFIG_SAM34_UART0
|
||||||
|
sam_uart0_enableclk();
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_SAM34_UART1
|
||||||
|
sam_uart1_enableclk();
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_SAM34_USART0
|
||||||
|
sam_usart0_enableclk();
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_SAM34_USART1
|
||||||
|
sam_usart1_enableclk();
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_SAM34_USART2
|
||||||
|
sam_usart2_enableclk();
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_SAM34_USART3
|
||||||
|
sam_usart3_enableclk();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Configure UART pins for all selected UART/USARTs */
|
||||||
|
|
||||||
|
#ifdef CONFIG_SAM34_UART0
|
||||||
|
(void)sam_configgpio(GPIO_UART0_RXD);
|
||||||
|
(void)sam_configgpio(GPIO_UART0_TXD);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_SAM34_UART1
|
||||||
|
(void)sam_configgpio(GPIO_UART1_RXD);
|
||||||
|
(void)sam_configgpio(GPIO_UART1_TXD);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_SAM34_USART0
|
||||||
|
(void)sam_configgpio(GPIO_USART0_RXD);
|
||||||
|
(void)sam_configgpio(GPIO_USART0_TXD);
|
||||||
|
#ifdef CONFIG_USART0_OFLOWCONTROL
|
||||||
|
(void)sam_configgpio(GPIO_USART0_CTS);
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_USART0_IFLOWCONTROL
|
||||||
|
(void)sam_configgpio(GPIO_USART0_RTS);
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_SAM34_USART1
|
||||||
|
(void)sam_configgpio(GPIO_USART1_RXD);
|
||||||
|
(void)sam_configgpio(GPIO_USART1_TXD);
|
||||||
|
#ifdef CONFIG_USART1_OFLOWCONTROL
|
||||||
|
(void)sam_configgpio(GPIO_USART1_CTS);
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_USART1_IFLOWCONTROL
|
||||||
|
(void)sam_configgpio(GPIO_USART1_RTS);
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_SAM34_USART2
|
||||||
|
(void)sam_configgpio(GPIO_USART2_RXD);
|
||||||
|
(void)sam_configgpio(GPIO_USART2_TXD);
|
||||||
|
#ifdef CONFIG_USART2_OFLOWCONTROL
|
||||||
|
(void)sam_configgpio(GPIO_USART2_CTS);
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_USART2_IFLOWCONTROL
|
||||||
|
(void)sam_configgpio(GPIO_USART2_RTS);
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_SAM34_USART3
|
||||||
|
(void)sam_configgpio(GPIO_USART3_RXD);
|
||||||
|
(void)sam_configgpio(GPIO_USART3_TXD);
|
||||||
|
#ifdef CONFIG_USART3_OFLOWCONTROL
|
||||||
|
(void)sam_configgpio(GPIO_USART3_CTS);
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_USART3_IFLOWCONTROL
|
||||||
|
(void)sam_configgpio(GPIO_USART3_RTS);
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Configure the console (only) */
|
||||||
|
#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
|
||||||
|
/* Reset and disable receiver and transmitter */
|
||||||
|
|
||||||
|
putreg32((UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS),
|
||||||
|
SAM_CONSOLE_BASE + SAM_UART_CR_OFFSET);
|
||||||
|
|
||||||
|
/* Disable all interrupts */
|
||||||
|
|
||||||
|
putreg32(0xffffffff, SAM_CONSOLE_BASE + SAM_UART_IDR_OFFSET);
|
||||||
|
|
||||||
|
/* Set up the mode register */
|
||||||
|
|
||||||
|
putreg32(MR_VALUE, SAM_CONSOLE_BASE + SAM_UART_MR_OFFSET);
|
||||||
|
|
||||||
|
/* Configure the console baud. NOTE: Oversampling by 8 is not supported.
|
||||||
|
* This may limit BAUD rates for lower USART clocks.
|
||||||
|
*/
|
||||||
|
|
||||||
|
putreg32(((FAST_USART_CLOCK + (SAM_CONSOLE_BAUD << 3)) / (SAM_CONSOLE_BAUD << 4)),
|
||||||
|
SAM_CONSOLE_BASE + SAM_UART_BRGR_OFFSET);
|
||||||
|
|
||||||
|
/* Enable receiver & transmitter */
|
||||||
|
|
||||||
|
putreg32((UART_CR_RXEN | UART_CR_TXEN),
|
||||||
|
SAM_CONSOLE_BASE + SAM_UART_CR_OFFSET);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
File diff suppressed because it is too large
Load Diff
@@ -50,7 +50,7 @@
|
|||||||
************************************************************************************/
|
************************************************************************************/
|
||||||
/* GPIO IRQs ************************************************************************/
|
/* GPIO IRQs ************************************************************************/
|
||||||
|
|
||||||
#ifndef PIC32MZ_GPIOIRQ
|
#ifndef CONFIG_PIC32MZ_GPIOIRQ
|
||||||
# undef CONFIG_PIC32MZ_GPIOIRQ_PORTA
|
# undef CONFIG_PIC32MZ_GPIOIRQ_PORTA
|
||||||
# undef CONFIG_PIC32MZ_GPIOIRQ_PORTB
|
# undef CONFIG_PIC32MZ_GPIOIRQ_PORTB
|
||||||
# undef CONFIG_PIC32MZ_GPIOIRQ_PORTC
|
# undef CONFIG_PIC32MZ_GPIOIRQ_PORTC
|
||||||
@@ -130,7 +130,7 @@
|
|||||||
|
|
||||||
#undef HAVE_UART_DEVICE
|
#undef HAVE_UART_DEVICE
|
||||||
#if defined(CONFIG_PIC32MZ_UART1) || defined(CONFIG_PIC32MZ_UART2) || \
|
#if defined(CONFIG_PIC32MZ_UART1) || defined(CONFIG_PIC32MZ_UART2) || \
|
||||||
defined(CONFIG_PIC32MZ_UART4) || defined(CONFIG_PIC32MZ_UART4) || \
|
defined(CONFIG_PIC32MZ_UART3) || defined(CONFIG_PIC32MZ_UART4) || \
|
||||||
defined(CONFIG_PIC32MZ_UART5) || defined(CONFIG_PIC32MZ_UART6)
|
defined(CONFIG_PIC32MZ_UART5) || defined(CONFIG_PIC32MZ_UART6)
|
||||||
# define HAVE_UART_DEVICE 1
|
# define HAVE_UART_DEVICE 1
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@@ -41,6 +41,7 @@
|
|||||||
************************************************************************************/
|
************************************************************************************/
|
||||||
|
|
||||||
#include <nuttx/config.h>
|
#include <nuttx/config.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
|
||||||
/************************************************************************************
|
/************************************************************************************
|
||||||
* Pre-processor Definitions
|
* Pre-processor Definitions
|
||||||
|
|||||||
Reference in New Issue
Block a user