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Cosmetic cleanup

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This commit is contained in:
Gregory Nutt
2014-06-18 08:24:53 -06:00
parent 9c0de33715
commit 2b5f8dbba5
2 changed files with 6 additions and 16 deletions
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arch/arm/src/sama5/sam_xdmac.c
+3 -13
View File
@@ -104,11 +104,6 @@
# define CONFIG_SAMA5_NLLDESC SAM_NDMACHAN # define CONFIG_SAMA5_NLLDESC SAM_NDMACHAN
#endif #endif
/* Register values **********************************************************/
#define XDMAC_CH_CC_BOTHDSCR \
(XDMAC_CH_CC_SRCDSCR | XDMAC_CH_CC_DSTDSCR)
/**************************************************************************** /****************************************************************************
* Private Types * Private Types
****************************************************************************/ ****************************************************************************/
@@ -135,7 +130,7 @@ struct sam_xdmach_s
uint32_t cc; /* Pre-calculated CC register for transfer */ uint32_t cc; /* Pre-calculated CC register for transfer */
dma_callback_t callback; /* Callback invoked when the DMA completes */ dma_callback_t callback; /* Callback invoked when the DMA completes */
void *arg; /* Argument passed to callback function */ void *arg; /* Argument passed to callback function */
uint32_t rxaddr; /* RX memory address */ uint32_t rxaddr; /* RX memory address to be invalidated */
size_t rxsize; /* Size of RX memory region */ size_t rxsize; /* Size of RX memory region */
struct chnext_view1_s *llhead; /* DMA link list head */ struct chnext_view1_s *llhead; /* DMA link list head */
struct chnext_view1_s *lltail; /* DMA link list head */ struct chnext_view1_s *lltail; /* DMA link list head */
@@ -931,7 +926,8 @@ static size_t sam_maxtransfer(struct sam_xdmach_s *xdmach)
* *
****************************************************************************/ ****************************************************************************/
static uint32_t sam_ntxtransfers(struct sam_xdmach_s *xdmach, uint32_t dmasize) static uint32_t sam_ntxtransfers(struct sam_xdmach_s *xdmach,
uint32_t dmasize)
{ {
unsigned int srcwidth; unsigned int srcwidth;
@@ -1653,12 +1649,6 @@ static inline int sam_multiple(struct sam_xdmach_s *xdmach)
DEBUGASSERT(llhead != NULL && llhead->csa != 0); DEBUGASSERT(llhead != NULL && llhead->csa != 0);
/* Check the first and last Channel Control (CC) Register values */
DEBUGASSERT((llhead->cc & XDMAC_CH_CC_BOTHDSCR) == 0);
DEBUGASSERT((xdmach->lltail->cc & XDMAC_CH_CC_BOTHDSCR) ==
XDMAC_CH_CC_BOTHDSCR);
/* 1. Read the XDMAC Global Channel Status Register (XDMAC_GS) to choose a /* 1. Read the XDMAC Global Channel Status Register (XDMAC_GS) to choose a
* free channel. * free channel.
* *
libc/Kconfig
+3 -3
View File
@@ -197,7 +197,7 @@ config ARCH_ROMGETC
default n default n
---help--- ---help---
In Harvard architectures, data accesses and instruction accesses In Harvard architectures, data accesses and instruction accesses
occur on different busses, perhaps concurrently. All data accesses occur on different buses, perhaps concurrently. All data accesses
are performed on the data bus unless special machine instructions are performed on the data bus unless special machine instructions
are used to read data from the instruction address space. Also, in are used to read data from the instruction address space. Also, in
the typical MCU, the available SRAM data memory is much smaller that the typical MCU, the available SRAM data memory is much smaller that
@@ -210,8 +210,8 @@ config ARCH_ROMGETC
the function up_romgetc(). up_romgetc() will simply read one byte the function up_romgetc(). up_romgetc() will simply read one byte
of data from the instruction space. of data from the instruction space.
If ARCH_ROMGETC, certain C stdio functions are effected: (1) All If ARCH_ROMGETC is selected, certain C stdio functions are effected: (1)
format strings in printf, fprintf, sprintf, etc. are assumed to lie All format strings in printf, fprintf, sprintf, etc. are assumed to lie
in FLASH (string arguments for %s are still assumed to reside in SRAM). in FLASH (string arguments for %s are still assumed to reside in SRAM).
And (2), the string argument to puts and fputs is assumed to reside And (2), the string argument to puts and fputs is assumed to reside
in FLASH. Clearly, these assumptions may have to modified for the in FLASH. Clearly, these assumptions may have to modified for the