diff --git a/arch/z80/src/z180/chip.h b/arch/z80/src/z180/chip.h index b90efabf8a9..4c6c0e43bf0 100644 --- a/arch/z80/src/z180/chip.h +++ b/arch/z80/src/z180/chip.h @@ -1,4 +1,4 @@ -/************************************************************************************ +/**************************************************************************** * arch/z80/src/z180/chip.h * * Licensed to the Apache Software Foundation (ASF) under one or more @@ -16,23 +16,23 @@ * License for the specific language governing permissions and limitations * under the License. * - ************************************************************************************/ + ****************************************************************************/ #ifndef __ARCH_Z80_SRC_Z180_CHIP_H #define __ARCH_Z80_SRC_Z180_CHIP_H -/************************************************************************************ +/**************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************/ #include -/************************************************************************************ +/**************************************************************************** * Pre-processor Definitions - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Public Function Prototypes - ************************************************************************************/ + ****************************************************************************/ #endif /* __ARCH_Z80_SRC_Z180_CHIP_H */ diff --git a/arch/z80/src/z180/switch.h b/arch/z80/src/z180/switch.h index 2209c97f3ce..090d7e001c2 100644 --- a/arch/z80/src/z180/switch.h +++ b/arch/z80/src/z180/switch.h @@ -1,4 +1,4 @@ -/************************************************************************************ +/**************************************************************************** * arch/z80/src/z180/switch.h * * Licensed to the Apache Software Foundation (ASF) under one or more @@ -16,14 +16,14 @@ * License for the specific language governing permissions and limitations * under the License. * - ************************************************************************************/ + ****************************************************************************/ #ifndef __ARCH_Z80_SRC_Z180_SWITCH_H #define __ARCH_Z80_SRC_Z180_SWITCH_H -/************************************************************************************ +/**************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************/ #include @@ -33,14 +33,14 @@ #include "z180_iomap.h" #include "z80_internal.h" -/************************************************************************************ +/**************************************************************************** * Pre-processor Definitions - ************************************************************************************/ + ****************************************************************************/ -/* Macros for portability *********************************************************** +/* Macros for portability *************************************************** * - * Common logic in arch/z80/src/common is customized for the z180 context switching - * logic via the following macros. + * Common logic in arch/z80/src/common is customized for + * the z180 context switching logic via the following macros. */ /* Initialize the IRQ state */ @@ -48,34 +48,36 @@ #define INIT_IRQCONTEXT() \ g_current_regs = NULL -/* IN_INTERRUPT returns true if the system is currently operating in the interrupt - * context. IN_INTERRUPT is the inline equivalent of up_interrupt_context(). +/* IN_INTERRUPT returns true if the system is currently operating + * in the interrupt context. IN_INTERRUPT is the inline equivalent + * of up_interrupt_context(). */ #define IN_INTERRUPT() \ (g_current_regs != NULL) -/* The following macro declares the variables need by IRQ_ENTER and IRQ_LEAVE. - * These variables are used to support nested interrupts. +/* The following macro declares the variables need by IRQ_ENTER + * and IRQ_LEAVE. These variables are used to support nested interrupts. * * - savestate holds the previous value of current_state. * - savecpr holds the previous value of current_cpr. * - * NOTE: Nested interrupts are not supported in this implementation. If you want - * to implement nested interrupts, you would have to change the way that - * g_current_regs/cbr is handled. The savestate/savecbr variables would not work - * for that purpose as implemented here because only the outermost nested - * interrupt can result in a context switch (they can probably be deleted). + * NOTE: Nested interrupts are not supported in this implementation. + * If you want to implement nested interrupts, you would have to change + * the way that g_current_regs/cbr is handled. The savestate/savecbr + * variables would not work for that purpose as implemented here because + * only the outermost nested interrupt can result in a context switch + * (they can probably be deleted). */ #define DECL_SAVESTATE() \ FAR chipreg_t *savestate; \ uint8_t savecbr; -/* The following macro is used when the system enters interrupt handling logic. - * The entry values of g_current_regs and current_cbr and stored in local variables. - * Then g_current_regs and current_cbr are set to the values of the interrupted - * task. +/* The following macro is used when the system enters interrupt + * handling logic. The entry values of g_current_regs and current_cbr + * and stored in local variables. Then g_current_regs and current_cbr + * are set to the values of the interrupted task. */ #define IRQ_ENTER(irq, regs) \ @@ -88,9 +90,10 @@ } \ while (0) -/* The following macro is used when the system exits interrupt handling logic. - * The value of g_current_regs is restored. If we are not processing a nested - * interrupt (meaning that we going to return to the user task), then also +/* The following macro is used when the system exits interrupt + * handling logic. The value of g_current_regs is restored. + * If we are not processing a nested interrupt (meaning + * that we going to return to the user task), then also * set the MMU's CBR register. */ @@ -109,7 +112,9 @@ } \ while (0) -/* The following macro is used to sample the interrupt state (as a opaque handle) */ +/* The following macro is used to sample the interrupt state + * (as a opaque handle) + */ #define IRQ_STATE() \ (g_current_regs) @@ -132,8 +137,9 @@ } \ while (0) -/* Save the user context in the specified TCB. User context saves can be simpler - * because only those registers normally saved in a C called need be stored. +/* Save the user context in the specified TCB. User context saves can be + * simpler because only those registers normally saved in a C called + * need be stored. */ #define SAVE_USERCONTEXT(tcb) \ @@ -154,33 +160,33 @@ } \ while (0) -/************************************************************************************ +/**************************************************************************** * Public Types - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Public Data - ************************************************************************************/ + ****************************************************************************/ #ifndef __ASSEMBLY__ -/* This holds a references to the current interrupt level register storage structure. - * If is non-NULL only during interrupt processing. +/* This holds a references to the current interrupt level register + * storage structure. If is non-NULL only during interrupt processing. */ extern volatile chipreg_t *g_current_regs; /* This holds the value of the MMU's CBR register. This value is set to the - * interrupted tasks's CBR on interrupt entry, changed to the new task's CBR if - * an interrupt level context switch occurs, and restored on interrupt exit. In - * this way, the CBR is always correct on interrupt exit. + * interrupted tasks's CBR on interrupt entry, changed to the new task's CBR + * if an interrupt level context switch occurs, and restored on interrupt + * exit. In this way, the CBR is always correct on interrupt exit. */ extern uint8_t current_cbr; #endif -/************************************************************************************ +/**************************************************************************** * Public Function Prototypes - ************************************************************************************/ + ****************************************************************************/ #ifndef __ASSEMBLY__ #ifdef __cplusplus diff --git a/arch/z80/src/z180/z180_config.h b/arch/z80/src/z180/z180_config.h index e6cd914be26..d3dc550af14 100644 --- a/arch/z80/src/z180/z180_config.h +++ b/arch/z80/src/z180/z180_config.h @@ -1,4 +1,4 @@ -/************************************************************************************ +/**************************************************************************** * arch/z80/src/z180/z180_config.h * * Licensed to the Apache Software Foundation (ASF) under one or more @@ -16,14 +16,14 @@ * License for the specific language governing permissions and limitations * under the License. * - ************************************************************************************/ + ****************************************************************************/ #ifndef __ARCH_Z80_SRC_Z180_Z180_CONFIG_H #define __ARCH_Z80_SRC_Z180_Z180_CONFIG_H -/************************************************************************************ +/**************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************/ #include @@ -31,9 +31,9 @@ #include "z80_internal.h" -/************************************************************************************ +/**************************************************************************** * Pre-processor Definitions - ************************************************************************************/ + ****************************************************************************/ /* Verify that selected features match the capability of the selected CPU */ @@ -71,8 +71,8 @@ # define HAVE_SERIAL 1 #endif -/* Make sure all features are disabled for disabled UARTs/[E]SCC channels. This - * simplifies checking later. +/* Make sure all features are disabled for disabled UARTs/[E]SCC channels. + * This simplifies checking later. */ #ifndef CONFIG_Z180_UART0 @@ -204,16 +204,16 @@ #endif -/************************************************************************************ +/**************************************************************************** * Public Types - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Public Data - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Public Functions Prototypes - ************************************************************************************/ + ****************************************************************************/ #endif /* __ARCH_Z80_SRC_Z180_Z180_CONFIG_H */ diff --git a/arch/z80/src/z180/z180_iomap.h b/arch/z80/src/z180/z180_iomap.h index 5ae9cb4ced6..aef5a3a581d 100644 --- a/arch/z80/src/z180/z180_iomap.h +++ b/arch/z80/src/z180/z180_iomap.h @@ -1,4 +1,4 @@ -/************************************************************************************ +/**************************************************************************** * arch/z80/src/z180/z180_iomap.h * * Licensed to the Apache Software Foundation (ASF) under one or more @@ -16,22 +16,22 @@ * License for the specific language governing permissions and limitations * under the License. * - ************************************************************************************/ + ****************************************************************************/ #ifndef __ARCH_Z80_SRC_Z180_Z180_IOMAP_H #define __ARCH_Z80_SRC_Z180_Z180_IOMAP_H -/************************************************************************************ +/**************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************/ #include -/************************************************************************************ +/**************************************************************************** * Pre-processor Definitions - ************************************************************************************/ + ****************************************************************************/ -/* Configuration ********************************************************************/ +/* Configuration ************************************************************/ /* These registers may be relocated to multiples of 0x40 by setting the IO * Control Register (ICR). Relocatable to 0x40-0x7f, or 0x80-0xbf. The @@ -45,7 +45,7 @@ # define SFR_OFFSET 0 #endif -/* Z180 Register Bit addresses ******************************************************/ +/* Z180 Register Bit addresses **********************************************/ /* ASCI Registers */ @@ -291,9 +291,9 @@ #define Z18X_SCC_WR14 0x0e /* Miscellaneous control bits */ #define Z18X_SCC_WR15 0x0f /* External status interrupt enable control */ -/* Z180 Register Bit definitions ****************************************************/ +/* Z180 Register Bit definitions ********************************************/ -/* ASCI Registers *******************************************************************/ +/* ASCI Registers ***********************************************************/ /* ASCI Control Register A 0 (CNTLA0: 0x00) */ @@ -389,7 +389,7 @@ * (Z8S180/L180-Class Processors Only) -- 8-bit data */ -/* CSI/O Registers ******************************************************************/ +/* CSI/O Registers **********************************************************/ /* CSI/O Control/Status Register (CNTR: 0x0a) */ @@ -411,7 +411,7 @@ /* CSI/O Transmit/Receive Register (TRDR: 0x0b) -- 8-bit data */ -/* Timer Registers ******************************************************************/ +/* Timer Registers **********************************************************/ /* Timer Data Register 0L (TMDR0L: 0x0c) -- 8-bit data */ @@ -442,7 +442,7 @@ /* Free Running counter (FRC: 0x18) -- 8-bit data */ -/* DMA Registers ********************************************************************/ +/* DMA Registers ************************************************************/ /* DMA Destination Address Register Channel 0 * (DAR0 I/O Address 0x23 to 0x25) -- 8-bit data @@ -527,7 +527,7 @@ # define DCNTL_DIM_IO2MI (2 << DCNTL_DIM_SHIFT) /* I/O to memory, increment MARI */ # define DCNTL_DIM_IO2MD (3 << DCNTL_DIM_SHIFT) /* I/O to memory, decrement MARI */ -/* System Control Registers *********************************************************/ +/* System Control Registers *************************************************/ /* Clock Multiplier Register (CMR: 0x1e) * (Z8S180/L180-Class Processors Only) @@ -577,7 +577,9 @@ # define RCR_CYC0 (1 << RCR_CYC_SHIFT) # define RCR_CYC1 (2 << RCR_CYC_SHIFT) -/* MMU Common Base Register (CBR: 0x38) - 8-bit base address of Common Area 1 */ +/* MMU Common Base Register (CBR: 0x38) + * - 8-bit base address of Common Area 1 + */ /* MMU Bank Base Register (BBR: 0x39) - 8-bit address of Bank area */ @@ -602,7 +604,7 @@ # define ICR_IOA7 (2 << ICR_IOA_SHIFT) #define ICR_IOSTP (0x20) /* Bit 5: Enable I/O stop mode */ -/* Registers unique to Z8x181 class CPUs ********************************************/ +/* Registers unique to Z8x181 class CPUs ************************************/ #ifdef HAVE_Z8X181 /* PIA Registers */ @@ -653,7 +655,7 @@ #endif -/* Registers unique to Z8x182 class CPUs ********************************************/ +/* Registers unique to Z8x182 class CPUs ************************************/ #ifdef HAVE_Z8X182 /* PIA Registers */ @@ -681,7 +683,7 @@ #endif -/* [E]SCC Internal Register Definitions *********************************************/ +/* [E]SCC Internal Register Definitions *************************************/ /* Read Registers */ @@ -707,7 +709,9 @@ #define RR0_RES2 (0x02) /* Bit 1: Residue Code 2 */ #define RR0_ALL (0x01) /* Bit 0: All Sent */ -/* RR2: Interrupt vector (modified if VIS Bit in WR9 is set) -- 8-bit vector value */ +/* RR2: Interrupt vector (modified if VIS Bit in WR9 is set) + * -- 8-bit vector value + */ /* RR3: Interrupt pending bits */ diff --git a/arch/z80/src/z180/z80_mem.h b/arch/z80/src/z180/z80_mem.h index 1a0683b9a9c..8cff9a56b7d 100644 --- a/arch/z80/src/z180/z80_mem.h +++ b/arch/z80/src/z180/z80_mem.h @@ -1,4 +1,4 @@ -/************************************************************************************ +/**************************************************************************** * arch/z80/src/z180/z80_mem.h * * Licensed to the Apache Software Foundation (ASF) under one or more @@ -16,43 +16,44 @@ * License for the specific language governing permissions and limitations * under the License. * - ************************************************************************************/ + ****************************************************************************/ #ifndef __ARCH_Z80_SRC_Z180_Z80_MEM_H #define __ARCH_Z80_SRC_Z180_Z80_MEM_H -/************************************************************************************ +/**************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************/ #include -/************************************************************************************ +/**************************************************************************** * Pre-processor Definitions - ************************************************************************************/ + ****************************************************************************/ /* Locate the IDLE thread stack at the end of RAM. */ #define CONFIG_STACK_END CONFIG_RAM_SIZE #define CONFIG_STACK_BASE (CONFIG_STACK_END - CONFIG_IDLETHREAD_STACKSIZE) -/* The heap then extends from the linker determined beginning of the heap (s__HEAP). - * to the bottom of the IDLE thread stack. NOTE: The symbol s__HEAP is not - * accessible from C because it does not begin with the _ character. g_heapbase - * is defined in z180_head.asm to provide that value to the C code. +/* The heap then extends from the linker determined beginning of the + * heap (s__HEAP). to the bottom of the IDLE thread stack. + * NOTE: The symbol s__HEAP is not accessible from C because + * it does not begin with the _ character. g_heapbase is defined + * in z180_head.asm to provide that value to the C code. */ #define CONFIG_HEAP1_END CONFIG_STACK_BASE #define CONFIG_HEAP1_BASE g_heapbase -/************************************************************************************ +/**************************************************************************** * Public variables - ************************************************************************************/ + ****************************************************************************/ -/* This is the bottom of the heap as provided by the linker symbol s__HEAP. NOTE: - * The symbol s__HEAP is not accessible from C because it does not begin with the _ - * character. g_heapbase is defined in z180_head.asm to provide that value to the C - * code. +/* This is the bottom of the heap as provided by the linker symbol s__HEAP. + * NOTE: The symbol s__HEAP is not accessible from C because + * it does not begin with the _ character. g_heapbase is defined + * in z180_head.asm to provide that value to the C code. */ extern const uint16_t g_heapbase;