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https://github.com/apache/nuttx.git
synced 2026-06-06 16:50:55 +08:00
Add SPI driver for the Freescale KL25Z
This commit is contained in:
Gregory Nutt
@@ -79,12 +79,16 @@ config KL_FLEXCAN1
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config KL_SPI0
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bool "SPI0"
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default n
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select SPI
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select SPI_EXCHANGE
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---help---
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Support SPI0
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config KL_SPI1
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bool "SPI1"
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default n
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select SPI
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select SPI_EXCHANGE
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---help---
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Support SPI1
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@@ -33,7 +33,7 @@
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#
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############################################################################
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HEAD_ASRC =
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HEAD_ASRC =
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CMN_ASRCS = up_exception.S up_saveusercontext.S up_fullcontextrestore.S
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CMN_ASRCS += up_switchcontext.S vfork.S
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@@ -67,7 +67,7 @@ ifeq ($(CONFIG_DEBUG),y)
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CMN_CSRCS += up_dumpnvic.c
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endif
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CHIP_ASRCS =
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CHIP_ASRCS =
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CHIP_CSRCS = kl_clockconfig.c kl_gpio.c kl_idle.c kl_irq.c kl_irqprio.c
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CHIP_CSRCS += kl_lowputc.c kl_serial.c kl_start.c kl_timerisr.c kl_cfmconfig.c
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@@ -75,6 +75,14 @@ ifeq ($(CONFIG_NUTTX_KERNEL),y)
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CHIP_CSRCS += kl_userspace.c
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endif
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ifeq ($(CONFIG_KL_SPI0),y)
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CHIP_CSRCS += kl_spi.c
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else
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ifeq ($(CONFIG_KL_SPI1),y)
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CHIP_CSRCS += kl_spi.c
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endif
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endif
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ifeq ($(CONFIG_DEBUG),y)
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CHIP_CSRCS += kl_dumpgpio.c
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endif
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@@ -260,7 +260,7 @@
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#define SIM_SCGC4_USBOTG (1 << 18) /* Bit 18: USB Clock Gate Control */
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#define SIM_SCGC4_CMP (1 << 19) /* Bit 19: Comparator Clock Gate Control */
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/* Bits 20-21: Reserved */
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#define SIM_SCGC4_SPI10 (1 << 22) /* Bit 22: SPI0 Clock Gate Control */
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#define SIM_SCGC4_SPI0 (1 << 22) /* Bit 22: SPI0 Clock Gate Control */
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#define SIM_SCGC4_SPI1 (1 << 23) /* Bit 23: SPI1 Clock Gate Control */
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/* Bits 24-31: Reserved */
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/* System Clock Gating Control Register 5 */
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@@ -77,7 +77,6 @@
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/* SPI control register 1 */
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#define SPI_C1_LSBFE (1 << 0) /* Bit 0: LSB first (shifter direction) */
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#define SPI_C1_SSOE (1 << 1) /* Bit 1: Slave select output enable */
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#define SPI_C1_CPHA (1 << 2) /* Bit 2: Clock phase */
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@@ -87,7 +86,6 @@
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#define SPI_C1_SPE (1 << 6) /* Bit 6: SPI system enable */
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#define SPI_C1_SPIE (1 << 7) /* Bit 7: SPI interrupt enable: for SPRF and MODF */
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/* SPI control register 2 */
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#define SPI_C2_SPC0 (1 << 0) /* Bit 0: SPI pin control 0 */
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@@ -102,6 +100,7 @@
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#define SPI_BR_SPR_SHIFT (0) /* Bits 0-3: SPI baud rate divisor */
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#define SPI_BR_SPR_MASK (15 << SPI_BR_SPR_SHIFT)
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# define SPI_BR_SPR_DIV(n) (((n)-1) << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 2^(n-1) */
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# define SPI_BR_SPR_DIV2 (0 << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 2 */
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# define SPI_BR_SPR_DIV4 (1 << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 4 */
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# define SPI_BR_SPR_DIV8 (2 << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 8 */
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@@ -113,7 +112,7 @@
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# define SPI_BR_SPR_DIV512 (8 << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 512 */
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#define SPI_BR_SPPR_SHIFT (4) /* Bits 4-6: SPI baud rate prescale divisor */
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#define SPI_BR_SPPR_MASK (7 << SPI_BR_SPPR_SHIFT)
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# define SPI_BR_SPPR(n) (((n)-1) << SPI_BR_SPPR_SHIFT) /* Prescaler=n, n=1-8 */
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# define SPI_BR_SPPR(n) (((n)-1) << SPI_BR_SPPR_SHIFT) /* Prescaler=n, n=1-8 */
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/* Bit 7: Reserved */
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/* SPI status register */
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/* Bits 0-3: Reserved */
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Executable
+737
File diff suppressed because it is too large
Load Diff
+33
-41
@@ -1,4 +1,4 @@
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/****************************************************************************
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/************************************************************************************
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* arch/arm/src/kl/kl_gpio.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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@@ -31,24 +31,26 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_KL_KL_SPI_H
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#define __ARCH_ARM_SRC_KL_KL_SPI_H
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/****************************************************************************
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/************************************************************************************
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* Included Files
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****************************************************************************/
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************************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Declarations
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****************************************************************************/
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#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1)
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/****************************************************************************
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/************************************************************************************
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* Pre-processor Declarations
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************************************************************************************/
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/************************************************************************************
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* Public Data
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****************************************************************************/
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************************************************************************************/
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#ifndef __ASSEMBLY__
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@@ -60,17 +62,34 @@ extern "C" {
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#define EXTERN extern
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#endif
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/****************************************************************************
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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/****************************************************************************
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* Name: kl_spiinitialize
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*
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* Description:
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* Initialize the selected SPI port.
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*
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* Input Parameter:
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* Port number (for hardware that has mutiple SPI interfaces)
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*
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* Returned Value:
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* Valid SPI device structure reference on succcess; a NULL on failure
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*
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****************************************************************************/
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struct spi_dev_s;
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FAR struct spi_dev_s *kl_spiinitialize(int port);
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/************************************************************************************
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* Name: kl_spi[n]select, kl_spi[n]status, and kl_spi[n]cmddata
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*
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* Description:
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* These external functions must be provided by board-specific logic. They are
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* implementations of the select, status, and cmddata methods of the SPI interface
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* defined by struct spi_ops_s (see include/nuttx/spi.h). All other methods
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* defined by struct spi_ops_s (see include/nuttx/spi.h). All other methods
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* including up_spiinitialize()) are provided by common Kinetis logic. To use
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* this common SPI logic on your board:
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*
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@@ -86,13 +105,12 @@ extern "C" {
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* 3. Add a call to up_spiinitialize() in your low level application
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* initialization logic
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* 4. The handle returned by up_spiinitialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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************************************************************************************/
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struct spi_dev_s;
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enum spi_dev_e;
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#ifdef CONFIG_KL_SPI0
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@@ -102,6 +120,7 @@ uint8_t kl_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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int kl_spi0cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
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#endif
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#endif
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#ifdef CONFIG_KL_SPI1
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void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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uint8_t kl_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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@@ -109,34 +128,7 @@ uint8_t kl_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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int kl_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
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#endif
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#endif
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#ifdef CONFIG_KL_SPI2
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void kl_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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uint8_t kl_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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#ifdef CONFIG_SPI_CMDDATA
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int kl_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
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#endif
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#endif
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/****************************************************************************
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* Name: ssp_flush
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*
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* Description:
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* Flush and discard any words left in the RX fifo. This can be called
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* from spi[n]select after a device is deselected (if you worry about such
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* things).
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*
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* Input Parameters:
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* dev - Device-specific state data
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI2)
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struct spi_dev_s;
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void spi_flush(FAR struct spi_dev_s *dev);
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_KL_SPI0 || CONFIG_KL_SPI1 */
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#endif /* __ARCH_ARM_SRC_KL_KL_SPI_H */
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@@ -1,6 +1,5 @@
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/****************************************************************************
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* arch/arm/src/kl/kl_start.c
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* arch/arm/src/chip/kl_start.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@@ -72,7 +72,7 @@
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/* Debug ********************************************************************/
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/* The following enable debug output from this file:
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*
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*
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* CONFIG_DEBUG - Define to enable general debug features
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* CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG)
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* CONFIG_DEBUG_VERBOSE - Define to enable verbose SSP debug
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@@ -171,7 +171,7 @@ static const struct spi_ops_s g_spiops =
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static struct lpc17_spidev_s g_spidev =
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{
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.spidev = { &g_spiops },
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};
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};
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/****************************************************************************
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* Public Data
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@@ -279,7 +279,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
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divisor = (divisor + 1) & ~1;
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/* Save the new divisor value */
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putreg32(divisor, LPC17_SPI_CCR);
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/* Calculate the new actual */
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@@ -332,19 +332,19 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
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{
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case SPIDEV_MODE0: /* CPOL=0; CPHA=0 */
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break;
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case SPIDEV_MODE1: /* CPOL=0; CPHA=1 */
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regval |= SPI_CR_CPHA;
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break;
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case SPIDEV_MODE2: /* CPOL=1; CPHA=0 */
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regval |= SPI_CR_CPOL;
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break;
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case SPIDEV_MODE3: /* CPOL=1; CPHA=1 */
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regval |= (SPI_CR_CPOL|SPI_CR_CPHA);
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break;
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default:
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DEBUGASSERT(FALSE);
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return;
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@@ -527,7 +527,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
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(void)getreg32(LPC17_SPI_SR);
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/* Read the received data from the SPI Data Register */
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/* Read the received data from the SPI Data Register */
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*ptr++ = (uint8_t)getreg32(LPC17_SPI_DR);
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nwords--;
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@@ -585,7 +585,7 @@ FAR struct spi_dev_s *lpc17_spiinitialize(int port)
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regval |= SYSCON_PCONP_PCSPI;
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putreg32(regval, LPC17_SYSCON_PCONP);
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irqrestore(flags);
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/* Configure 8-bit SPI mode and master mode */
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putreg32(SPI_CR_BITS_8BITS|SPI_CR_BITENABLE|SPI_CR_MSTR, LPC17_SPI_CR);
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