mirror of
https://github.com/apache/nuttx.git
synced 2026-05-29 20:56:47 +08:00
libc/machine/arm: align related implementations of armv7 architecture
1. sync arch elf changes 2. fix cmake compilation break 3. remove the definition of related math files Signed-off-by: chao an <anchao@xiaomi.com>
This commit is contained in:
@@ -24,22 +24,28 @@ if(CONFIG_ARMV7M_MEMCPY)
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list(APPEND SRCS gnu/arch_memcpy.S)
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endif()
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if(CONFIG_ARMV7M_MEMSET)
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list(APPEND SRCS arch_memset.S)
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endif()
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if(CONFIG_ARMV7M_MEMMOVE)
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list(APPEND SRCS arch_memmove.S)
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endif()
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if(CONFIG_ARMV7M_STRCMP)
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list(APPEND SRCS arch_strcmp.S)
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endif()
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if(CONFIG_ARMV7M_STRCPY)
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list(APPEND SRCS arch_strcpy.S)
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endif()
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if(CONFIG_ARMV7M_STRLEN)
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list(APPEND SRCS arch_strlen.S)
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endif()
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if(CONFIG_LIBC_ARCH_ELF)
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list(APPEND SRCS arch_elf.c)
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endif()
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if(CONFIG_MACHINE_OPTS_ARMV7M)
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if(CONFIG_LIBM_ARCH_FABSF)
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list(APPEND SRCS arch_fabsf.c)
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endif()
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if(CONFIG_LIBM_ARCH_SQRTF)
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list(APPEND SRCS arch_sqrtf.c)
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endif()
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endif()
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if(CONFIG_ARCH_SETJMP_H)
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list(APPEND SRCS gnu/arch_setjmp.S)
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endif()
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target_sources(c PRIVATE ${SRCS})
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@@ -143,10 +143,10 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
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case R_ARM_JUMP24:
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{
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binfo("Performing PC24 [%" PRId32 "] link at "
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"addr %08lx [%08lx] to sym '%p' st_value=%08lx\n",
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ELF32_R_TYPE(rel->r_info), (long)addr,
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(long)(*(uint32_t *)addr),
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sym, (long)sym->st_value);
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"addr %08" PRIxPTR " [%08" PRIx32 "] to "
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"sym '%p' st_value=%08" PRIx32 "\n",
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ELF32_R_TYPE(rel->r_info), addr,
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*(uint32_t *)addr, sym, sym->st_value);
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offset = (*(uint32_t *)addr & 0x00ffffff) << 2;
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if (offset & 0x02000000)
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@@ -176,9 +176,9 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
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case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
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{
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binfo("Performing ABS32 link "
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"at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
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(long)addr, (long)(*(uint32_t *)addr),
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sym, (long)sym->st_value);
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"at addr=%08" PRIxPTR " [%08" PRIx32 "] to "
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"sym=%p st_value=%08" PRIx32 "\n",
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addr, *(uint32_t *)addr, sym, sym->st_value);
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*(uint32_t *)addr += sym->st_value;
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}
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@@ -189,9 +189,9 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
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* performs a self relocation */
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{
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binfo("Performing TARGET2 link "
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"at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
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(long)addr, (long)(*(uint32_t *)addr),
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sym, (long)sym->st_value);
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"at addr=%08" PRIx32 " [%08" PRIx32 "] to "
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"sym=%p st_value=%08" PRIx32 "\n",
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addr, *(uint32_t *)addr, sym, sym->st_value);
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*(uint32_t *)addr += sym->st_value - addr;
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}
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@@ -225,7 +225,7 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
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* |OP | | 32-Bit
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* +---+--+---+---+---+---------------------------------+
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* |1 1 |J1 | 1 |J2 | imm11 | BL
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* +------+---+---+---+--------------------------------+
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* +------+---+---+---+---------------------------------+
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*
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* The branch target is encoded in these bits:
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*
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@@ -240,10 +240,11 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
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lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
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binfo("Performing THM_JUMP24 [%" PRId32 "] link "
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"at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
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ELF32_R_TYPE(rel->r_info), (long)addr,
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"at addr=%08" PRIxPTR " [%04x %04x] to "
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"sym=%p st_value=%08" PRIx32 "\n",
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ELF32_R_TYPE(rel->r_info), addr,
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(int)upper_insn, (int)lower_insn,
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sym, (long)sym->st_value);
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sym, sym->st_value);
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/* Extract the 25-bit offset from the 32-bit instruction:
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*
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@@ -329,8 +330,9 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
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case R_ARM_V4BX:
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{
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binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
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(long)addr, (long)(*(uint32_t *)addr));
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binfo("Performing V4BX link at addr=%08" PRIxPTR
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" [%08" PRIx32 "]\n",
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addr, *(uint32_t *)addr);
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/* Preserve only Rm and the condition code */
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@@ -345,9 +347,9 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
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case R_ARM_PREL31:
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{
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binfo("Performing PREL31 link "
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"at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
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(long)addr, (long)(*(uint32_t *)addr),
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sym, (long)sym->st_value);
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"at addr=%08" PRIxPTR " [%08" PRIx32 "] to "
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"sym=%p st_value=%08" PRIx32 "\n",
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addr, *(uint32_t *)addr, sym, sym->st_value);
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offset = *(uint32_t *)addr + sym->st_value - addr;
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*(uint32_t *)addr = offset & 0x7fffffff;
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@@ -358,10 +360,10 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
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case R_ARM_MOVT_ABS:
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{
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binfo("Performing MOVx_ABS [%" PRId32 "] link "
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"at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
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ELF32_R_TYPE(rel->r_info), (long)addr,
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(long)(*(uint32_t *)addr),
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sym, (long)sym->st_value);
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"at addr=%08" PRIxPTR " [%08" PRIx32 "] to "
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"sym=%p st_value=%08" PRIx32 "\n",
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ELF32_R_TYPE(rel->r_info), addr,
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*(uint32_t *)addr, sym, sym->st_value);
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offset = *(uint32_t *)addr;
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offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
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@@ -414,10 +416,11 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
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lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
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binfo("Performing THM_MOVx [%" PRId32 "] link "
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"at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
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ELF32_R_TYPE(rel->r_info), (long)addr,
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"at addr=%08" PRIxPTR " [%04x %04x] to "
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"sym=%p st_value=%08" PRIx32 "\n",
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ELF32_R_TYPE(rel->r_info), addr,
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(int)upper_insn, (int)lower_insn,
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sym, (long)sym->st_value);
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sym, sym->st_value);
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/* Extract the 16-bit offset from the 32-bit instruction */
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