libc/machine/arm: align related implementations of armv7 architecture

1. sync arch elf changes
2. fix cmake compilation break
3. remove the definition of related math files

Signed-off-by: chao an <anchao@xiaomi.com>
This commit is contained in:
chao an
2023-11-28 12:35:06 +08:00
committed by Xiang Xiao
parent 74874e0874
commit 29bda7cf27
10 changed files with 470 additions and 223 deletions
+20 -14
View File
@@ -24,22 +24,28 @@ if(CONFIG_ARMV7M_MEMCPY)
list(APPEND SRCS gnu/arch_memcpy.S)
endif()
if(CONFIG_ARMV7M_MEMSET)
list(APPEND SRCS arch_memset.S)
endif()
if(CONFIG_ARMV7M_MEMMOVE)
list(APPEND SRCS arch_memmove.S)
endif()
if(CONFIG_ARMV7M_STRCMP)
list(APPEND SRCS arch_strcmp.S)
endif()
if(CONFIG_ARMV7M_STRCPY)
list(APPEND SRCS arch_strcpy.S)
endif()
if(CONFIG_ARMV7M_STRLEN)
list(APPEND SRCS arch_strlen.S)
endif()
if(CONFIG_LIBC_ARCH_ELF)
list(APPEND SRCS arch_elf.c)
endif()
if(CONFIG_MACHINE_OPTS_ARMV7M)
if(CONFIG_LIBM_ARCH_FABSF)
list(APPEND SRCS arch_fabsf.c)
endif()
if(CONFIG_LIBM_ARCH_SQRTF)
list(APPEND SRCS arch_sqrtf.c)
endif()
endif()
if(CONFIG_ARCH_SETJMP_H)
list(APPEND SRCS gnu/arch_setjmp.S)
endif()
target_sources(c PRIVATE ${SRCS})
+29 -26
View File
@@ -143,10 +143,10 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
case R_ARM_JUMP24:
{
binfo("Performing PC24 [%" PRId32 "] link at "
"addr %08lx [%08lx] to sym '%p' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr,
(long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
"addr %08" PRIxPTR " [%08" PRIx32 "] to "
"sym '%p' st_value=%08" PRIx32 "\n",
ELF32_R_TYPE(rel->r_info), addr,
*(uint32_t *)addr, sym, sym->st_value);
offset = (*(uint32_t *)addr & 0x00ffffff) << 2;
if (offset & 0x02000000)
@@ -176,9 +176,9 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
binfo("Performing ABS32 link "
"at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
"at addr=%08" PRIxPTR " [%08" PRIx32 "] to "
"sym=%p st_value=%08" PRIx32 "\n",
addr, *(uint32_t *)addr, sym, sym->st_value);
*(uint32_t *)addr += sym->st_value;
}
@@ -189,9 +189,9 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
* performs a self relocation */
{
binfo("Performing TARGET2 link "
"at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
"at addr=%08" PRIx32 " [%08" PRIx32 "] to "
"sym=%p st_value=%08" PRIx32 "\n",
addr, *(uint32_t *)addr, sym, sym->st_value);
*(uint32_t *)addr += sym->st_value - addr;
}
@@ -225,7 +225,7 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
* |OP | | 32-Bit
* +---+--+---+---+---+---------------------------------+
* |1 1 |J1 | 1 |J2 | imm11 | BL
* +------+---+---+---+--------------------------------+
* +------+---+---+---+---------------------------------+
*
* The branch target is encoded in these bits:
*
@@ -240,10 +240,11 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
binfo("Performing THM_JUMP24 [%" PRId32 "] link "
"at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr,
"at addr=%08" PRIxPTR " [%04x %04x] to "
"sym=%p st_value=%08" PRIx32 "\n",
ELF32_R_TYPE(rel->r_info), addr,
(int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
sym, sym->st_value);
/* Extract the 25-bit offset from the 32-bit instruction:
*
@@ -329,8 +330,9 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
case R_ARM_V4BX:
{
binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t *)addr));
binfo("Performing V4BX link at addr=%08" PRIxPTR
" [%08" PRIx32 "]\n",
addr, *(uint32_t *)addr);
/* Preserve only Rm and the condition code */
@@ -345,9 +347,9 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
case R_ARM_PREL31:
{
binfo("Performing PREL31 link "
"at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
"at addr=%08" PRIxPTR " [%08" PRIx32 "] to "
"sym=%p st_value=%08" PRIx32 "\n",
addr, *(uint32_t *)addr, sym, sym->st_value);
offset = *(uint32_t *)addr + sym->st_value - addr;
*(uint32_t *)addr = offset & 0x7fffffff;
@@ -358,10 +360,10 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
case R_ARM_MOVT_ABS:
{
binfo("Performing MOVx_ABS [%" PRId32 "] link "
"at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr,
(long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
"at addr=%08" PRIxPTR " [%08" PRIx32 "] to "
"sym=%p st_value=%08" PRIx32 "\n",
ELF32_R_TYPE(rel->r_info), addr,
*(uint32_t *)addr, sym, sym->st_value);
offset = *(uint32_t *)addr;
offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
@@ -414,10 +416,11 @@ int up_relocate(const Elf32_Rel *rel, const Elf32_Sym *sym, uintptr_t addr)
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
binfo("Performing THM_MOVx [%" PRId32 "] link "
"at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr,
"at addr=%08" PRIxPTR " [%04x %04x] to "
"sym=%p st_value=%08" PRIx32 "\n",
ELF32_R_TYPE(rel->r_info), addr,
(int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
sym, sym->st_value);
/* Extract the 16-bit offset from the 32-bit instruction */